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IR: Move AtomicRMW string names into class
This will be used to improve error messages in a future commit. llvm-svn: 343647
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@ -735,6 +735,8 @@ public:
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return static_cast<BinOp>(getSubclassDataFromInstruction() >> 5);
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}
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static StringRef getOperationName(BinOp Op);
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void setOperation(BinOp Operation) {
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unsigned short SubclassData = getSubclassDataFromInstruction();
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setInstructionSubclassData((SubclassData & 31) |
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@ -1241,24 +1241,6 @@ static void WriteAsOperandInternal(raw_ostream &Out, const Metadata *MD,
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SlotTracker *Machine, const Module *Context,
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bool FromValue = false);
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static void writeAtomicRMWOperation(raw_ostream &Out,
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AtomicRMWInst::BinOp Op) {
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switch (Op) {
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default: Out << " <unknown operation " << Op << ">"; break;
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case AtomicRMWInst::Xchg: Out << " xchg"; break;
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case AtomicRMWInst::Add: Out << " add"; break;
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case AtomicRMWInst::Sub: Out << " sub"; break;
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case AtomicRMWInst::And: Out << " and"; break;
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case AtomicRMWInst::Nand: Out << " nand"; break;
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case AtomicRMWInst::Or: Out << " or"; break;
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case AtomicRMWInst::Xor: Out << " xor"; break;
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case AtomicRMWInst::Max: Out << " max"; break;
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case AtomicRMWInst::Min: Out << " min"; break;
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case AtomicRMWInst::UMax: Out << " umax"; break;
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case AtomicRMWInst::UMin: Out << " umin"; break;
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}
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}
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static void WriteOptimizationInfo(raw_ostream &Out, const User *U) {
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if (const FPMathOperator *FPO = dyn_cast<const FPMathOperator>(U)) {
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// 'Fast' is an abbreviation for all fast-math-flags.
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@ -3612,7 +3594,7 @@ void AssemblyWriter::printInstruction(const Instruction &I) {
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// Print out the atomicrmw operation
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if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I))
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writeAtomicRMWOperation(Out, RMWI->getOperation());
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Out << ' ' << AtomicRMWInst::getOperationName(RMWI->getOperation());
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// Print out the type of the operands...
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const Value *Operand = I.getNumOperands() ? I.getOperand(0) : nullptr;
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@ -1336,6 +1336,37 @@ AtomicRMWInst::AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val,
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Init(Operation, Ptr, Val, Ordering, SSID);
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}
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StringRef AtomicRMWInst::getOperationName(BinOp Op) {
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switch (Op) {
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case AtomicRMWInst::Xchg:
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return "xchg";
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case AtomicRMWInst::Add:
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return "add";
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case AtomicRMWInst::Sub:
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return "sub";
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case AtomicRMWInst::And:
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return "and";
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case AtomicRMWInst::Nand:
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return "nand";
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case AtomicRMWInst::Or:
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return "or";
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case AtomicRMWInst::Xor:
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return "xor";
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case AtomicRMWInst::Max:
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return "max";
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case AtomicRMWInst::Min:
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return "min";
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case AtomicRMWInst::UMax:
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return "umax";
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case AtomicRMWInst::UMin:
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return "umin";
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case AtomicRMWInst::BAD_BINOP:
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return "<invalid operation>";
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}
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llvm_unreachable("invalid atomicrmw operation");
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}
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//===----------------------------------------------------------------------===//
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// FenceInst Implementation
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//===----------------------------------------------------------------------===//
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