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[SimplifyCFG] Preserve !llvm.mem.parallel_loop_access when merging

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When SimplifyCFG merges identical instructions from both sides of a diamond, it
can preserve !llvm.mem.parallel_loop_access (as it does with most of the other
metadata). There's no real data or control dependency change in this case.

llvm-svn: 267515
This commit is contained in:
Hal Finkel 2016-04-26 02:06:06 +00:00
parent 7956f36dac
commit bee4e0db1c
3 changed files with 58 additions and 1 deletions
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1
lib/Transforms/Utils/Local.cpp
View File

@ -1539,6 +1539,7 @@ void llvm::combineMetadata(Instruction *K, const Instruction *J,
K->setMetadata(Kind, MDNode::getMostGenericAliasScope(JMD, KMD));
break;
case LLVMContext::MD_noalias:
case LLVMContext::MD_mem_parallel_loop_access:
K->setMetadata(Kind, MDNode::intersect(JMD, KMD));
break;
case LLVMContext::MD_range:

3
lib/Transforms/Utils/SimplifyCFG.cpp
View File

@ -1143,7 +1143,8 @@ static bool HoistThenElseCodeToIf(BranchInst *BI,
LLVMContext::MD_fpmath, LLVMContext::MD_invariant_load,
LLVMContext::MD_nonnull, LLVMContext::MD_invariant_group,
LLVMContext::MD_align, LLVMContext::MD_dereferenceable,
LLVMContext::MD_dereferenceable_or_null};
LLVMContext::MD_dereferenceable_or_null,
LLVMContext::MD_mem_parallel_loop_access};
combineMetadata(I1, I2, KnownIDs);
I2->eraseFromParent();
Changed = true;

55
test/Transforms/SimplifyCFG/combine-parallel-mem-md.ll Normal file
View File

@ -0,0 +1,55 @@
; RUN: opt -simplifycfg -S < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: norecurse nounwind uwtable
define void @Test(i32* nocapture %res, i32* nocapture readnone %c, i32* nocapture readonly %d, i32* nocapture readonly %p) #0 {
entry:
br label %for.body
; CHECK-LABEL: @Test
; CHECK: load i32, i32* {{.*}}, align 4, !llvm.mem.parallel_loop_access !0
; CHECK: load i32, i32* {{.*}}, align 4, !llvm.mem.parallel_loop_access !0
; CHECK: store i32 {{.*}}, align 4, !llvm.mem.parallel_loop_access !0
; CHECK-NOT: load
; CHECK-NOT: store
for.body: ; preds = %cond.end, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %cond.end ]
%arrayidx = getelementptr inbounds i32, i32* %p, i64 %indvars.iv
%0 = load i32, i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !0
%cmp1 = icmp eq i32 %0, 0
br i1 %cmp1, label %cond.true, label %cond.false
cond.false: ; preds = %for.body
%arrayidx3 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
%v = load i32, i32* %arrayidx3, align 4, !llvm.mem.parallel_loop_access !0
%arrayidx7 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
%1 = load i32, i32* %arrayidx7, align 4, !llvm.mem.parallel_loop_access !0
%add = add nsw i32 %1, %v
br label %cond.end
cond.true: ; preds = %for.body
%arrayidx4 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
%w = load i32, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !0
%arrayidx8 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
%2 = load i32, i32* %arrayidx8, align 4, !llvm.mem.parallel_loop_access !0
%add2 = add nsw i32 %2, %w
br label %cond.end
cond.end: ; preds = %for.body, %cond.false
%cond = phi i32 [ %add, %cond.false ], [ %add2, %cond.true ]
%arrayidx9 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
store i32 %cond, i32* %arrayidx9, align 4, !llvm.mem.parallel_loop_access !0
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 16
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
for.end: ; preds = %cond.end
ret void
}
attributes #0 = { norecurse nounwind uwtable }
!0 = distinct !{!0, !1}
!1 = !{!"llvm.loop.vectorize.enable", i1 true}