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[InstCombine] Add a combine for a shuffle of similar bitcasts
Some intrinsics wrapper code has the habit of ignoring the type of the elements in vectors, thinking of vector registers as a "bag of bits". As a consequence, some operations are shared between vectors of different types are shared. For example, functions that rearrange elements in a vector can be shared between vectors of int32 and float. This can result in bitcasts in awkward places that prevent the backend from recognizing some instructions. For AArch64 in particular, it inhibits the selection of dup from a general purpose register (GPR), and mov from GPR to a vector lane. This patch adds a pattern in InstCombine to move the bitcasts past the shufflevector if this is possible. Sometimes this even allows InstCombine to remove the bitcast entirely, as in the included tests. Alternatively this could be done with a few extra patterns in the AArch64 backend, but InstCombine seems like a better place for this. Differential Revision: https://reviews.llvm.org/D97397
This commit is contained in:
Sanne Wouda
parent
851f54855d
commit
bf6c4851ee
@ -2289,6 +2289,25 @@ Instruction *InstCombinerImpl::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
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unsigned VWidth = cast<FixedVectorType>(SVI.getType())->getNumElements();
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unsigned LHSWidth = cast<FixedVectorType>(LHS->getType())->getNumElements();
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// shuffle (bitcast X), (bitcast Y), Mask --> bitcast (shuffle X, Y, Mask)
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//
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// if X and Y are of the same (vector) type, and the element size is not
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// changed by the bitcasts, we can distribute the bitcasts through the
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// shuffle, hopefully reducing the number of instructions. We make sure that
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// at least one bitcast only has one use, so we don't *increase* the number of
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// instructions here.
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Value *X, *Y;
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if (match(LHS, m_BitCast(m_Value(X))) && match(RHS, m_BitCast(m_Value(Y))) &&
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X->getType()->isVectorTy() && X->getType() == Y->getType() &&
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X->getType()->getScalarSizeInBits() ==
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SVI.getType()->getScalarSizeInBits() &&
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(LHS->hasOneUse() || RHS->hasOneUse())) {
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Value *V = Builder.CreateShuffleVector(X, Y, SVI.getShuffleMask(),
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SVI.getName() + ".uncasted");
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return new BitCastInst(V, SVI.getType());
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}
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ArrayRef<int> Mask = SVI.getShuffleMask();
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Type *Int32Ty = Type::getInt32Ty(SVI.getContext());
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@ -2298,7 +2317,6 @@ Instruction *InstCombinerImpl::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
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// TODO: This could be extended to allow length-changing shuffles.
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// The transform might also be obsoleted if we allowed canonicalization
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// of bitcasted shuffles.
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Value *X;
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if (match(LHS, m_BitCast(m_Value(X))) && match(RHS, m_Undef()) &&
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X->getType()->isVectorTy() && VWidth == LHSWidth) {
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// Try to create a scaled mask constant.
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153
test/Transforms/InstCombine/shuffle-cast-dist.ll
Normal file
153
test/Transforms/InstCombine/shuffle-cast-dist.ll
Normal file
@ -0,0 +1,153 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define <2 x float> @vtrn1(<2 x i32> %v)
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; CHECK-LABEL: @vtrn1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[R_UNCASTED:%.*]] = shufflevector <2 x i32> [[V:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[R:%.*]] = bitcast <2 x i32> [[R_UNCASTED]] to <2 x float>
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; CHECK-NEXT: ret <2 x float> [[R]]
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;
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{
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entry:
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%vb1 = bitcast <2 x i32> %v to <2 x float>
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%vb2 = bitcast <2 x i32> %v to <2 x float>
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%r = shufflevector <2 x float> %vb1, <2 x float> %vb2, <2 x i32> <i32 0, i32 2>
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ret <2 x float> %r
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}
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define <2 x float> @vtrn2(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @vtrn2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[R_UNCASTED:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> <i32 1, i32 3>
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; CHECK-NEXT: [[R:%.*]] = bitcast <2 x i32> [[R_UNCASTED]] to <2 x float>
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; CHECK-NEXT: ret <2 x float> [[R]]
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;
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entry:
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%xb = bitcast <2 x i32> %x to <2 x float>
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%yb = bitcast <2 x i32> %y to <2 x float>
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%r = shufflevector <2 x float> %xb, <2 x float> %yb, <2 x i32> <i32 1, i32 3>
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ret <2 x float> %r
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}
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define <4 x float> @bc_shuf_lenchange(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @bc_shuf_lenchange(
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; CHECK-NEXT: [[R_UNCASTED:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: [[R:%.*]] = bitcast <4 x i32> [[R_UNCASTED]] to <4 x float>
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%xb = bitcast <2 x i32> %x to <2 x float>
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%yb = bitcast <2 x i32> %y to <2 x float>
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%r = shufflevector <2 x float> %xb, <2 x float> %yb, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x float> %r
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}
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define <4 x float> @bc_shuf_nonvec(i64 %x, i64 %y) {
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; CHECK-LABEL: @bc_shuf_nonvec(
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; CHECK-NEXT: [[XB:%.*]] = bitcast i64 [[X:%.*]] to <2 x float>
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; CHECK-NEXT: [[YB:%.*]] = bitcast i64 [[Y:%.*]] to <2 x float>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[XB]], <2 x float> [[YB]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%xb = bitcast i64 %x to <2 x float>
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%yb = bitcast i64 %y to <2 x float>
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%r = shufflevector <2 x float> %xb, <2 x float> %yb, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x float> %r
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}
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define <4 x double> @bc_shuf_size(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @bc_shuf_size(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <4 x i32> [[X:%.*]] to <2 x double>
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; CHECK-NEXT: [[YB:%.*]] = bitcast <4 x i32> [[Y:%.*]] to <2 x double>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x double> [[XB]], <2 x double> [[YB]], <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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; CHECK-NEXT: ret <4 x double> [[R]]
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;
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%xb = bitcast <4 x i32> %x to <2 x double>
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%yb = bitcast <4 x i32> %y to <2 x double>
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%r = shufflevector <2 x double> %xb, <2 x double> %yb, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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ret <4 x double> %r
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}
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define <2 x double> @bc_shuf_mismatch(<4 x i32> %x, <2 x i64> %y) {
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; CHECK-LABEL: @bc_shuf_mismatch(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <4 x i32> [[X:%.*]] to <2 x double>
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; CHECK-NEXT: [[YB:%.*]] = bitcast <2 x i64> [[Y:%.*]] to <2 x double>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x double> [[XB]], <2 x double> [[YB]], <2 x i32> <i32 1, i32 3>
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; CHECK-NEXT: ret <2 x double> [[R]]
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;
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%xb = bitcast <4 x i32> %x to <2 x double>
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%yb = bitcast <2 x i64> %y to <2 x double>
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%r = shufflevector <2 x double> %xb, <2 x double> %yb, <2 x i32> <i32 1, i32 3>
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ret <2 x double> %r
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}
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define <8 x half> @bc_shuf_i8_float(<8 x i8> %x, <8 x i8> %y) {
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; CHECK-LABEL: @bc_shuf_i8_float(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <8 x i8> [[X:%.*]] to <4 x half>
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; CHECK-NEXT: [[YB:%.*]] = bitcast <8 x i8> [[Y:%.*]] to <4 x half>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x half> [[XB]], <4 x half> [[YB]], <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
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; CHECK-NEXT: ret <8 x half> [[R]]
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;
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%xb = bitcast <8 x i8> %x to <4 x half>
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%yb = bitcast <8 x i8> %y to <4 x half>
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%r = shufflevector <4 x half> %xb, <4 x half> %yb, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
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ret <8 x half> %r
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}
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define <4 x i16> @bc_shuf_elemtype_mismatch(<2 x half> %x, <2 x bfloat> %y) {
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; CHECK-LABEL: @bc_shuf_elemtype_mismatch(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <2 x half> [[X:%.*]] to <2 x i16>
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; CHECK-NEXT: [[YB:%.*]] = bitcast <2 x bfloat> [[Y:%.*]] to <2 x i16>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i16> [[XB]], <2 x i16> [[YB]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: ret <4 x i16> [[R]]
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;
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%xb = bitcast <2 x half> %x to <2 x i16>
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%yb = bitcast <2 x bfloat> %y to <2 x i16>
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%r = shufflevector <2 x i16> %xb, <2 x i16> %yb, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x i16> %r
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}
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define <2 x float> @bc_shuf_reuse(<4 x i32> %x){
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; CHECK-LABEL: @bc_shuf_reuse(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <4 x i32> [[X:%.*]] to <4 x float>
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; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[XB]], <4 x float> undef, <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x float> [[R]]
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;
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%xb = bitcast <4 x i32> %x to <4 x float>
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%r = shufflevector <4 x float> %xb, <4 x float> %xb, <2 x i32> <i32 0, i32 4>
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ret <2 x float> %r
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}
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define <4 x float> @bc_shuf_y_hasoneuse(<4 x i32> %x, <4 x i32> %y){
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; CHECK-LABEL: @bc_shuf_y_hasoneuse(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <4 x i32> [[X:%.*]] to <4 x float>
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; CHECK-NEXT: [[SHUF_UNCASTED:%.*]] = shufflevector <4 x i32> [[X]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT: [[SHUF:%.*]] = bitcast <4 x i32> [[SHUF_UNCASTED]] to <4 x float>
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; CHECK-NEXT: [[R:%.*]] = fadd <4 x float> [[XB]], [[SHUF]]
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%xb = bitcast <4 x i32> %x to <4 x float>
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%yb = bitcast <4 x i32> %y to <4 x float>
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%shuf = shufflevector <4 x float> %xb, <4 x float> %yb, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%r = fadd <4 x float> %xb, %shuf
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ret <4 x float> %r
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}
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define <4 x float> @bc_shuf_neither_hasoneuse(<4 x i32> %x, <4 x i32> %y){
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; CHECK-LABEL: @bc_shuf_neither_hasoneuse(
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; CHECK-NEXT: [[XB:%.*]] = bitcast <4 x i32> [[X:%.*]] to <4 x float>
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; CHECK-NEXT: [[YB:%.*]] = bitcast <4 x i32> [[Y:%.*]] to <4 x float>
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; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[XB]], <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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; CHECK-NEXT: [[SUM:%.*]] = fadd <4 x float> [[XB]], [[YB]]
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; CHECK-NEXT: [[R:%.*]] = fadd <4 x float> [[SUM]], [[SHUF]]
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%xb = bitcast <4 x i32> %x to <4 x float>
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%yb = bitcast <4 x i32> %y to <4 x float>
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%shuf = shufflevector <4 x float> %xb, <4 x float> %xb, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%sum = fadd <4 x float> %xb, %yb
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%r = fadd <4 x float> %sum, %shuf
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ret <4 x float> %r
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}
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