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https://github.com/RPCS3/llvm-mirror.git
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[WebAssembly] Optimize memcpy/memmove/memcpy calls.
These calls return their first argument, but because LLVM uses an intrinsic with a void return type, they can't use the returned attribute. Generalize the store results pass to optimize these calls too. llvm-svn: 258781
This commit is contained in:
Dan Gohman
parent
82741c1205
commit
bf8e0c60a6
@ -78,11 +78,6 @@ stores.
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//===---------------------------------------------------------------------===//
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Memset/memcpy/memmove should be marked with the "returned" attribute somehow,
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even when they are translated through intrinsics.
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//===---------------------------------------------------------------------===//
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Consider implementing optimizeSelect, optimizeCompareInstr, optimizeCondBranch,
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optimizeLoadInstr, and/or getMachineCombinerPatterns.
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@ -15,7 +15,10 @@
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#include "WebAssembly.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-peephole"
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@ -28,6 +31,7 @@ class WebAssemblyPeephole final : public MachineFunctionPass {
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<TargetLibraryInfoWrapperPass>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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@ -44,11 +48,36 @@ FunctionPass *llvm::createWebAssemblyPeephole() {
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return new WebAssemblyPeephole();
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}
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bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
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/// If desirable, rewrite NewReg to a discard register.
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static bool MaybeRewriteToDiscard(unsigned OldReg, unsigned NewReg,
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MachineOperand &MO,
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WebAssemblyFunctionInfo &MFI,
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MachineRegisterInfo &MRI) {
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bool Changed = false;
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// TODO: Handle SP/physregs
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if (OldReg == NewReg && TargetRegisterInfo::isVirtualRegister(NewReg)) {
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Changed = true;
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unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
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MO.setReg(NewReg);
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MO.setIsDead();
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MFI.stackifyVReg(NewReg);
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MFI.addWAReg(NewReg, WebAssemblyFunctionInfo::UnusedReg);
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}
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return Changed;
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}
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bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
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DEBUG({
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dbgs() << "********** Store Results **********\n"
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<< "********** Function: " << MF.getName() << '\n';
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});
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MachineRegisterInfo &MRI = MF.getRegInfo();
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WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
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const WebAssemblyTargetLowering &TLI =
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*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
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auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
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bool Changed = false;
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for (auto &MBB : MF)
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for (auto &MI : MBB)
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@ -69,17 +98,33 @@ bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
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// can use $discard instead.
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MachineOperand &MO = MI.getOperand(0);
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unsigned OldReg = MO.getReg();
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// TODO: Handle SP/physregs
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if (OldReg ==
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MI.getOperand(WebAssembly::StoreValueOperandNo).getReg() &&
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TargetRegisterInfo::isVirtualRegister(
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MI.getOperand(WebAssembly::StoreValueOperandNo).getReg())) {
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Changed = true;
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unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
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MO.setReg(NewReg);
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MO.setIsDead();
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MFI.stackifyVReg(NewReg);
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MFI.addWAReg(NewReg, WebAssemblyFunctionInfo::UnusedReg);
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unsigned NewReg =
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MI.getOperand(WebAssembly::StoreValueOperandNo).getReg();
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Changed |= MaybeRewriteToDiscard(OldReg, NewReg, MO, MFI, MRI);
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break;
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}
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case WebAssembly::CALL_I32:
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case WebAssembly::CALL_I64: {
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MachineOperand &Op1 = MI.getOperand(1);
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if (Op1.isSymbol()) {
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StringRef Name(Op1.getSymbolName());
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if (Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
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Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
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Name == TLI.getLibcallName(RTLIB::MEMSET)) {
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LibFunc::Func Func;
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if (LibInfo.getLibFunc(Name, Func)) {
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if (!MI.getOperand(2).isReg())
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report_fatal_error(
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"Call to builtin function with wrong signature");
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MachineOperand &MO = MI.getOperand(0);
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unsigned OldReg = MO.getReg();
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unsigned NewReg = MI.getOperand(2).getReg();
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if (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg))
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report_fatal_error(
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"Call to builtin function with wrong signature");
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Changed |= MaybeRewriteToDiscard(OldReg, NewReg, MO, MFI, MRI);
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}
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}
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}
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}
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}
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@ -17,12 +17,18 @@
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/// potentially also exposing the store to register stackifying. These both can
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/// reduce get_local/set_local traffic.
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///
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/// This pass also performs this optimization for memcpy, memmove, and memset
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/// calls, since the LLVM intrinsics for these return void so they can't use the
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/// returned attribute and consequently aren't handled by the OptimizeReturned
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/// pass.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssembly.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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@ -49,6 +55,7 @@ public:
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AU.addPreserved<MachineBlockFrequencyInfo>();
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<TargetLibraryInfoWrapperPass>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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@ -63,6 +70,40 @@ FunctionPass *llvm::createWebAssemblyStoreResults() {
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return new WebAssemblyStoreResults();
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}
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// Replace uses of FromReg with ToReg if they are dominated by MI.
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static bool ReplaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI,
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unsigned FromReg, unsigned ToReg,
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const MachineRegisterInfo &MRI,
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MachineDominatorTree &MDT) {
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bool Changed = false;
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for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
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MachineOperand &O = *I++;
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MachineInstr *Where = O.getParent();
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if (Where->getOpcode() == TargetOpcode::PHI) {
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// PHIs use their operands on their incoming CFG edges rather than
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// in their parent blocks. Get the basic block paired with this use
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// of FromReg and check that MI's block dominates it.
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MachineBasicBlock *Pred =
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Where->getOperand(&O - &Where->getOperand(0) + 1).getMBB();
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if (!MDT.dominates(&MBB, Pred))
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continue;
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} else {
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// For a non-PHI, check that MI dominates the instruction in the
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// normal way.
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if (&MI == Where || !MDT.dominates(&MI, Where))
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continue;
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}
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Changed = true;
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DEBUG(dbgs() << "Setting operand " << O << " in " << *Where << " from "
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<< MI << "\n");
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O.setReg(ToReg);
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// If the store's def was previously dead, it is no longer. But the
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// dead flag shouldn't be set yet.
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assert(!MI.getOperand(0).isDead() && "Unexpected dead flag");
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}
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return Changed;
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}
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bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
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DEBUG({
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dbgs() << "********** Store Results **********\n"
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@ -71,6 +112,9 @@ bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>();
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const WebAssemblyTargetLowering &TLI =
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*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
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auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
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bool Changed = false;
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assert(MRI.isSSA() && "StoreResults depends on SSA form");
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@ -89,36 +133,38 @@ bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
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case WebAssembly::STORE_F32:
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case WebAssembly::STORE_F64:
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case WebAssembly::STORE_I32:
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case WebAssembly::STORE_I64:
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case WebAssembly::STORE_I64: {
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unsigned ToReg = MI.getOperand(0).getReg();
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unsigned FromReg =
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MI.getOperand(WebAssembly::StoreValueOperandNo).getReg();
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for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
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MachineOperand &O = *I++;
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MachineInstr *Where = O.getParent();
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if (Where->getOpcode() == TargetOpcode::PHI) {
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// PHIs use their operands on their incoming CFG edges rather than
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// in their parent blocks. Get the basic block paired with this use
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// of FromReg and check that MI's block dominates it.
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MachineBasicBlock *Pred =
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Where->getOperand(&O - &Where->getOperand(0) + 1).getMBB();
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if (!MDT.dominates(&MBB, Pred))
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continue;
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} else {
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// For a non-PHI, check that MI dominates the instruction in the
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// normal way.
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if (&MI == Where || !MDT.dominates(&MI, Where))
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continue;
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Changed |= ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
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break;
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}
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case WebAssembly::CALL_I32:
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case WebAssembly::CALL_I64: {
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MachineOperand &Op1 = MI.getOperand(1);
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if (Op1.isSymbol()) {
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StringRef Name(Op1.getSymbolName());
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if (Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
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Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
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Name == TLI.getLibcallName(RTLIB::MEMSET)) {
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LibFunc::Func Func;
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if (LibInfo.getLibFunc(Name, Func)) {
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if (!MI.getOperand(2).isReg())
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report_fatal_error(
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"Call to builtin function with wrong signature");
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unsigned FromReg = MI.getOperand(2).getReg();
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unsigned ToReg = MI.getOperand(0).getReg();
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if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg))
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report_fatal_error(
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"Call to builtin function with wrong signature");
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Changed |=
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ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
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}
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}
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Changed = true;
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DEBUG(dbgs() << "Setting operand " << O << " in " << *Where
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<< " from " << MI << "\n");
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O.setReg(ToReg);
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// If the store's def was previously dead, it is no longer. But the
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// dead flag shouldn't be set yet.
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assert(!MI.getOperand(0).isDead() && "Dead flag set on store result");
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}
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}
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}
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}
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return Changed;
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@ -21,8 +21,8 @@ define i32 @foo() {
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; CHECK-LABEL: call_memcpy:
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; CHECK-NEXT: .param i32, i32, i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.call $discard=, memcpy@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $0{{$}}
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; CHECK-NEXT: i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) {
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
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60
test/CodeGen/WebAssembly/mem-intrinsics.ll
Normal file
60
test/CodeGen/WebAssembly/mem-intrinsics.ll
Normal file
@ -0,0 +1,60 @@
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; RUN: llc < %s -asm-verbose=false | FileCheck %s
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; Test memcpy, memmove, and memset intrinsics.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
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; Test that return values are optimized.
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; CHECK-LABEL: copy_yes:
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; CHECK: i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i8* @copy_yes(i8* %dst, i8* %src, i32 %len) {
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i32 1, i1 false)
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ret i8* %dst
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}
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; CHECK-LABEL: copy_no:
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; CHECK: i32.call $discard=, memcpy@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return{{$}}
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define void @copy_no(i8* %dst, i8* %src, i32 %len) {
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i32 1, i1 false)
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ret void
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}
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; CHECK-LABEL: move_yes:
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; CHECK: i32.call $push0=, memmove@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i8* @move_yes(i8* %dst, i8* %src, i32 %len) {
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call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i32 1, i1 false)
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ret i8* %dst
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}
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; CHECK-LABEL: move_no:
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; CHECK: i32.call $discard=, memmove@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return{{$}}
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define void @move_no(i8* %dst, i8* %src, i32 %len) {
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call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i32 1, i1 false)
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ret void
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}
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; CHECK-LABEL: set_yes:
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; CHECK: i32.call $push0=, memset@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i8* @set_yes(i8* %dst, i8 %src, i32 %len) {
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call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i32 1, i1 false)
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ret i8* %dst
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}
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; CHECK-LABEL: set_no:
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; CHECK: i32.call $discard=, memset@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return{{$}}
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define void @set_no(i8* %dst, i8 %src, i32 %len) {
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call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i32 1, i1 false)
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ret void
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}
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