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AMDGPU: Switch backend default max workgroup size to 1024
Previously this would default to 256, not the maximum supported size of 1024. Using a maximum lower than the hardware maximum requires language runtimes to enforce this limit for correctness, which no language has correctly done. Switch the default to the conservatively correct maximum, and force frontends to opt-in to the more optimal 256 default maximum. I don't really understand why the changes in occupancy-levels.ll increased the computed occupancy, which I expected to decrease. I'm not sure if these tests should be forcing the old maximum.
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@ -343,11 +343,6 @@ AMDGPUSubtarget::getOccupancyWithLocalMemSize(const MachineFunction &MF) const {
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std::pair<unsigned, unsigned>
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AMDGPUSubtarget::getDefaultFlatWorkGroupSize(CallingConv::ID CC) const {
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switch (CC) {
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case CallingConv::AMDGPU_CS:
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case CallingConv::AMDGPU_KERNEL:
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case CallingConv::SPIR_KERNEL:
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return std::make_pair(getWavefrontSize() * 2,
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std::max(getWavefrontSize() * 4, 256u));
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case CallingConv::AMDGPU_VS:
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case CallingConv::AMDGPU_LS:
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case CallingConv::AMDGPU_HS:
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@ -356,13 +351,12 @@ AMDGPUSubtarget::getDefaultFlatWorkGroupSize(CallingConv::ID CC) const {
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case CallingConv::AMDGPU_PS:
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return std::make_pair(1, getWavefrontSize());
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default:
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return std::make_pair(1, 16 * getWavefrontSize());
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return std::make_pair(1u, getMaxFlatWorkGroupSize());
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}
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}
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std::pair<unsigned, unsigned> AMDGPUSubtarget::getFlatWorkGroupSizes(
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const Function &F) const {
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// FIXME: 1024 if function.
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// Default minimum/maximum flat work group sizes.
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std::pair<unsigned, unsigned> Default =
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getDefaultFlatWorkGroupSize(F.getCallingConv());
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@ -412,7 +412,7 @@ define amdgpu_kernel void @ptrtoint(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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; OPT-LABEL: @pointer_typed_alloca(
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; OPT: getelementptr inbounds [256 x i32 addrspace(1)*], [256 x i32 addrspace(1)*] addrspace(3)* @pointer_typed_alloca.A.addr, i32 0, i32 %{{[0-9]+}}
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; OPT: load i32 addrspace(1)*, i32 addrspace(1)* addrspace(3)* %{{[0-9]+}}, align 4
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define amdgpu_kernel void @pointer_typed_alloca(i32 addrspace(1)* %A) {
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define amdgpu_kernel void @pointer_typed_alloca(i32 addrspace(1)* %A) #1 {
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entry:
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%A.addr = alloca i32 addrspace(1)*, align 4, addrspace(5)
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store i32 addrspace(1)* %A, i32 addrspace(1)* addrspace(5)* %A.addr, align 4
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@ -556,7 +556,8 @@ entry:
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ret void
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}
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" }
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" "amdgpu-flat-work-group-size"="1,256" }
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attributes #1 = { nounwind "amdgpu-flat-work-group-size"="1,256" }
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; HSAOPT: !0 = !{}
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; HSAOPT: !1 = !{i32 0, i32 257}
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@ -43,7 +43,7 @@ define amdgpu_kernel void @test_private_array_ptr_calc(i32 addrspace(1)* noalias
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ret void
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}
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" }
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,256" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind convergent }
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@ -8,11 +8,11 @@
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; CHECK: ---
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; CHECK: amdhsa.kernels:
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; CHECK: - .args:
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; CHECK: - .args:
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; CHECK: .group_segment_fixed_size: 0
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; CHECK: .kernarg_segment_align: 8
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; CHECK: .kernarg_segment_size: 24
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; CHECK: .max_flat_workgroup_size: 256
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; CHECK: .max_flat_workgroup_size: 1024
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; CHECK: .name: test
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; CHECK: .private_segment_fixed_size: 0
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; WAVE64: .sgpr_count: 8
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@ -33,6 +33,20 @@ entry:
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ret void
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}
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; CHECK: - .args:
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; CHECK: .max_flat_workgroup_size: 256
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define amdgpu_kernel void @test_max_flat_workgroup_size(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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half addrspace(1)* %b) #2 {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%r.val = fadd half %a.val, %b.val
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; CHECK: .name: num_spilled_sgprs
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; GFX700: .sgpr_spill_count: 40
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; GFX803: .sgpr_spill_count: 24
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@ -149,3 +163,4 @@ define amdgpu_kernel void @num_spilled_vgprs() #1 {
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attributes #0 = { "amdgpu-num-sgpr"="14" }
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attributes #1 = { "amdgpu-num-vgpr"="20" }
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attributes #2 = { "amdgpu-flat-work-group-size"="1,256" }
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@ -18,7 +18,7 @@
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; CHECK: WavefrontSize: 64
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; CHECK: NumSGPRs: 8
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; CHECK: NumVGPRs: 6
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; CHECK: MaxFlatWorkGroupSize: 256
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; CHECK: MaxFlatWorkGroupSize: 1024
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define amdgpu_kernel void @test(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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@ -31,6 +31,29 @@ entry:
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ret void
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}
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; CHECK-LABEL: - Name: test_max_flat_workgroup_size
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; CHECK: SymbolName: 'test_max_flat_workgroup_size@kd'
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; CHECK: CodeProps:
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; CHECK: KernargSegmentSize: 24
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; CHECK: GroupSegmentFixedSize: 0
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; CHECK: PrivateSegmentFixedSize: 0
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; CHECK: KernargSegmentAlign: 8
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; CHECK: WavefrontSize: 64
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; CHECK: NumSGPRs: 8
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; CHECK: NumVGPRs: 6
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; CHECK: MaxFlatWorkGroupSize: 256
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define amdgpu_kernel void @test_max_flat_workgroup_size(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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half addrspace(1)* %b) #2 {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%r.val = fadd half %a.val, %b.val
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; CHECK-LABEL: - Name: num_spilled_sgprs
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; CHECK: SymbolName: 'num_spilled_sgprs@kd'
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; CHECK: CodeProps:
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@ -144,3 +167,4 @@ define amdgpu_kernel void @num_spilled_vgprs() #1 {
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attributes #0 = { "amdgpu-num-sgpr"="14" }
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attributes #1 = { "amdgpu-num-vgpr"="20" }
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attributes #2 = { "amdgpu-flat-work-group-size"="1,256" }
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@ -39,7 +39,7 @@ entry:
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { norecurse nounwind }
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attributes #0 = { norecurse nounwind "amdgpu-flat-work-group-size"="1,256" }
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attributes #1 = { nounwind readnone }
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!0 = !{i32 0, i32 1024}
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@ -262,8 +262,8 @@ define amdgpu_kernel void @used_lds_6552() {
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}
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; GCN-LABEL: {{^}}used_lds_6556:
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; GFX9: ; Occupancy: 9
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; GFX1010W64: ; Occupancy: 19
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; GFX9: ; Occupancy: 10
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; GFX1010W64: ; Occupancy: 20
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; GFX1010W32: ; Occupancy: 20
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@lds6556 = internal addrspace(3) global [6556 x i8] undef, align 4
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define amdgpu_kernel void @used_lds_6556() {
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@ -273,9 +273,9 @@ define amdgpu_kernel void @used_lds_6556() {
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}
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; GCN-LABEL: {{^}}used_lds_13112:
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; GFX9: ; Occupancy: 4
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; GFX1010W64: ; Occupancy: 9
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; GFX1010W32: ; Occupancy: 19
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; GFX9: ; Occupancy: 10
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; GFX1010W64: ; Occupancy: 20
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; GFX1010W32: ; Occupancy: 20
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@lds13112 = internal addrspace(3) global [13112 x i8] undef, align 4
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define amdgpu_kernel void @used_lds_13112() {
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%p = bitcast [13112 x i8] addrspace(3)* @lds13112 to i8 addrspace(3)*
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@ -300,4 +300,4 @@ define amdgpu_kernel void @ptrtoint(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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; OPT: !0 = !{i32 0, i32 257}
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; OPT: !1 = !{i32 0, i32 256}
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" }
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" "amdgpu-flat-work-group-size"="1,256" }
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@ -18,4 +18,4 @@ entry:
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ret void
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}
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attributes #0 = { nounwind }
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attributes #0 = { nounwind "amdgpu-flat-work-group-size"="1,256" }
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@ -64,4 +64,4 @@ define amdgpu_kernel void @lds_promoted_alloca_icmp_unknown_ptr(i32 addrspace(1)
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declare i32* @get_unknown_pointer() #0
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" }
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,256" }
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@ -201,4 +201,4 @@ for.body: ; preds = %for.body, %for.body
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declare i32* @get_unknown_pointer() #0
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" }
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,256" }
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@ -131,5 +131,5 @@ bb:
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ret void
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}
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attributes #0 = { norecurse nounwind "amdgpu-waves-per-eu"="1,1" }
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attributes #0 = { norecurse nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,256" }
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attributes #1 = { norecurse nounwind }
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