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Fix the Sparc backend with Evan's recent tblgen changes
llvm-svn: 26009
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5a9a874f44
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@ -983,24 +983,24 @@ bool SparcDAGToDAGISel::SelectADDRri(SDOperand Addr, SDOperand &Base,
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// Constant offset from frame ref.
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Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
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} else {
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Base = Select(Addr.getOperand(0));
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Base = Addr.getOperand(0);
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}
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Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
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return true;
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}
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}
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if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
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Base = Select(Addr.getOperand(1));
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Base = Addr.getOperand(1);
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Offset = Addr.getOperand(0).getOperand(0);
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return true;
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}
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if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
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Base = Select(Addr.getOperand(0));
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Base = Addr.getOperand(0);
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Offset = Addr.getOperand(1).getOperand(0);
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return true;
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}
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}
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Base = Select(Addr);
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Base = Addr;
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Offset = CurDAG->getTargetConstant(0, MVT::i32);
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return true;
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}
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@ -1015,12 +1015,12 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDOperand Addr, SDOperand &R1,
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if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
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Addr.getOperand(1).getOpcode() == SPISD::Lo)
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return false; // Let the reg+imm pattern catch this!
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R1 = Select(Addr.getOperand(0));
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R2 = Select(Addr.getOperand(1));
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R1 = Addr.getOperand(0);
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R2 = Addr.getOperand(1);
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return true;
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}
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R1 = Select(Addr);
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R1 = Addr;
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R2 = CurDAG->getRegister(SP::G0, MVT::i32);
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return true;
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}
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