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Move printing of target-indepedent DEBUG_VALUE comments
into AsmPrinter. Target-dependent form is still generated by FastISel and still handled in X86 code. llvm-svn: 100596
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ac90d47ea3
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c0f9c29448
@ -434,7 +434,64 @@ static void EmitKill(const MachineInstr *MI, AsmPrinter &AP) {
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AP.OutStreamer.AddBlankLine();
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}
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/// EmitDebugValueComment - This method handles the target-independent form
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/// of DBG_VALUE, returning true if it was able to do so. A false return
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/// means the target will need to handle MI in EmitInstruction.
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static bool EmitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
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char buf[100];
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std::string Str = "\t";
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Str += AP.MAI->getCommentString();
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Str += "DEBUG_VALUE: ";
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// This code handles only the 3-operand target-independent form.
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if (MI->getNumOperands() != 3)
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return false;
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// cast away const; DIetc do not take const operands for some reason.
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DIVariable V((MDNode*)(MI->getOperand(2).getMetadata()));
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Str += V.getName();
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Str += " <- ";
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// Register or immediate value. Register 0 means undef.
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if (MI->getOperand(0).isFPImm()) {
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APFloat APF = APFloat(MI->getOperand(0).getFPImm()->getValueAPF());
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if (MI->getOperand(0).getFPImm()->getType()->isFloatTy()) {
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sprintf(buf, "%e", APF.convertToFloat());
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Str += buf;
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} else if (MI->getOperand(0).getFPImm()->getType()->isDoubleTy()) {
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sprintf(buf, "%e", APF.convertToDouble());
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Str += buf;
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} else {
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// There is no good way to print long double. Convert a copy to
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// double. Ah well, it's only a comment.
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bool ignored;
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APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven,
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&ignored);
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Str += "(long double) ";
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sprintf(buf, "%e", APF.convertToDouble());
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Str += buf;
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}
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} else if (MI->getOperand(0).isImm()) {
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sprintf(buf, "%lld", MI->getOperand(0).getImm());
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Str += buf;
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} else if (MI->getOperand(0).isReg()) {
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if (MI->getOperand(0).getReg() == 0) {
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// Suppress offset, it is not meaningful here.
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Str += "undef";
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// NOTE: Want this comment at start of line, don't emit with AddComment.
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AP.OutStreamer.EmitRawText(Twine(Str));
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return true;
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}
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Str += AP.TM.getRegisterInfo()->getName(MI->getOperand(0).getReg());
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} else
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llvm_unreachable("Unknown operand type");
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Str += '+';
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sprintf(buf, "%lld", MI->getOperand(1).getImm());
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Str += buf;
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// NOTE: Want this comment at start of line, don't emit with AddComment.
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AP.OutStreamer.EmitRawText(Twine(Str));
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return true;
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}
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/// EmitFunctionBody - This method emits the body and trailer for a
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/// function.
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@ -473,6 +530,12 @@ void AsmPrinter::EmitFunctionBody() {
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case TargetOpcode::INLINEASM:
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EmitInlineAsm(II);
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break;
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case TargetOpcode::DBG_VALUE:
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if (isVerbose()) {
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if (!EmitDebugValueComment(II, *this))
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EmitInstruction(II);
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}
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break;
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case TargetOpcode::IMPLICIT_DEF:
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if (isVerbose()) EmitImplicitDef(II, *this);
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break;
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@ -1236,7 +1299,7 @@ static void EmitGlobalConstantFP(const ConstantFP *CFP, unsigned AddrSpace,
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if (CFP->getType()->isX86_FP80Ty()) {
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// all long double variants are printed as hex
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// api needed to prevent premature destruction
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// API needed to prevent premature destruction
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APInt API = CFP->getValueAPF().bitcastToAPInt();
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const uint64_t *p = API.getRawData();
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if (AP.isVerbose()) {
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@ -1266,8 +1329,8 @@ static void EmitGlobalConstantFP(const ConstantFP *CFP, unsigned AddrSpace,
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assert(CFP->getType()->isPPC_FP128Ty() &&
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"Floating point constant type not handled");
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// All long double variants are printed as hex api needed to prevent
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// premature destruction.
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// All long double variants are printed as hex
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// API needed to prevent premature destruction.
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APInt API = CFP->getValueAPF().bitcastToAPInt();
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const uint64_t *p = API.getRawData();
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if (AP.TM.getTargetData()->isBigEndian()) {
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@ -332,6 +332,8 @@ bool FastISel::SelectCall(User *I) {
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Value *Address = DI->getAddress();
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if (!Address)
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return true;
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if (isa<UndefValue>(Address))
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return true;
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AllocaInst *AI = dyn_cast<AllocaInst>(Address);
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// Don't handle byval struct arguments or VLAs, for example.
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if (!AI) break;
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@ -348,7 +350,7 @@ bool FastISel::SelectCall(User *I) {
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return true;
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}
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case Intrinsic::dbg_value: {
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// This requires target support, but right now X86 is the only Fast target.
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// This form of DBG_VALUE is target-independent.
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DbgValueInst *DI = cast<DbgValueInst>(I);
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const TargetInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
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Value *V = DI->getValue();
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@ -328,62 +328,24 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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void X86AsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
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raw_ostream &O) {
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// FIXME: if this is implemented for another target before it goes
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// away completely, the common part should be moved into AsmPrinter.
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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// Only the target-dependent form of DBG_VALUE should get here.
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// Referencing the offset and metadata as NOps-2 and NOps-1 is
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// probably portable to other targets; frame pointer location is not.
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unsigned NOps = MI->getNumOperands();
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assert(NOps==7);
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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// cast away const; DIetc do not take const operands for some reason.
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DIVariable V((MDNode*)(MI->getOperand(NOps-1).getMetadata()));
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O << V.getName();
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O << " <- ";
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if (NOps==3) {
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// Register or immediate value. Register 0 means undef.
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assert(MI->getOperand(0).isReg() ||
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MI->getOperand(0).isImm() ||
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MI->getOperand(0).isFPImm());
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if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) {
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// Suppress offset in this case, it is not meaningful.
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O << "undef";
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OutStreamer.AddBlankLine();
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return;
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}
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if (MI->getOperand(0).isFPImm()) {
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// This is more naturally done in printOperand, but since the only use
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// of such an operand is in this comment and that is temporary (and it's
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// ugly), we prefer to keep this localized.
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// The include of Type.h may be removable when this code is.
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if (MI->getOperand(0).getFPImm()->getType()->isFloatTy() ||
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MI->getOperand(0).getFPImm()->getType()->isDoubleTy())
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MI->getOperand(0).print(O, &TM);
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else {
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// There is no good way to print long double. Convert a copy to
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// double. Ah well, it's only a comment.
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bool ignored;
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APFloat APF = APFloat(MI->getOperand(0).getFPImm()->getValueAPF());
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APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven,
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&ignored);
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O << "(long double) " << APF.convertToDouble();
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}
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} else
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printOperand(MI, 0, O);
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} else {
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if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) {
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// Suppress offset in this case, it is not meaningful.
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O << "undef";
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OutStreamer.AddBlankLine();
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return;
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}
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// Frame address. Currently handles register +- offset only.
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assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm());
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O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 3, O);
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O << ']';
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}
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// Frame address. Currently handles register +- offset only.
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assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm());
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O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 3, O);
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O << ']';
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O << "+";
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printOperand(MI, NOps-2, O);
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}
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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X86MCInstLower MCInstLowering(OutContext, Mang, *this);
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switch (MI->getOpcode()) {
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@ -395,7 +357,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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OutStreamer.EmitRawText(StringRef(OS.str()));
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}
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return;
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case X86::MOVPC32r: {
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MCInst TmpInst;
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// This is a pseudo op for a two instruction sequence with a label, which
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