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Revert "[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM."

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This reverts commit r254201 and r254202, as it broke test-suite,
self-hosting and sanitizer tests on ARM buildbots.

llvm-svn: 254234
This commit is contained in:
Renato Golin 2015-11-28 17:23:46 +00:00
parent b81b924383
commit c0ff495fd9
8 changed files with 12 additions and 154 deletions
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45
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -60,7 +60,7 @@ using namespace llvm;
ARMAsmPrinter::ARMAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), AFI(nullptr), MCP(nullptr),
InConstantPool(false), OptimizationGoals(-1) {}
InConstantPool(false) {}
void ARMAsmPrinter::EmitFunctionBodyEnd() {
// Make sure to terminate any constant pools that were at the end
@ -106,38 +106,9 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
Subtarget = &MF.getSubtarget<ARMSubtarget>();
SetupMachineFunction(MF);
const Function* F = MF.getFunction();
const TargetMachine& TM = MF.getTarget();
// Calculate this function's optimization goal.
unsigned OptimizationGoal;
if (F->hasFnAttribute(Attribute::OptimizeNone))
// For best debugging illusion, speed and small size sacrificed
OptimizationGoal = 6;
else if (F->optForMinSize())
// Aggressively for small size, speed and debug illusion sacrificed
OptimizationGoal = 4;
else if (F->optForSize())
// For small size, but speed and debugging illusion preserved
OptimizationGoal = 3;
else if (TM.getOptLevel() == CodeGenOpt::Aggressive)
// Aggressively for speed, small size and debug illusion sacrificed
OptimizationGoal = 2;
else if (TM.getOptLevel() > CodeGenOpt::None)
// For speed, but small size and good debug illusion preserved
OptimizationGoal = 1;
else // TM.getOptLevel() == CodeGenOpt::None
// For good debugging, but speed and small size preserved
OptimizationGoal = 5;
// Combine a new optimization goal with existing ones.
if (OptimizationGoals == -1) // uninitialized goals
OptimizationGoals = OptimizationGoal;
else if (OptimizationGoals != (int)OptimizationGoal) // conflicting goals
OptimizationGoals = 0;
if (Subtarget->isTargetCOFF()) {
bool Internal = F->hasInternalLinkage();
bool Internal = MF.getFunction()->hasInternalLinkage();
COFF::SymbolStorageClass Scl = Internal ? COFF::IMAGE_SYM_CLASS_STATIC
: COFF::IMAGE_SYM_CLASS_EXTERNAL;
int Type = COFF::IMAGE_SYM_DTYPE_FUNCTION << COFF::SCT_COMPLEX_TYPE_SHIFT;
@ -535,16 +506,6 @@ void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
// generates code that does this, it is always safe to set.
OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
}
// The last attribute to be emitted is ABI_optimization_goals
MCTargetStreamer &TS = *OutStreamer->getTargetStreamer();
ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS);
if (OptimizationGoals > 0)
ATS.emitAttribute(ARMBuildAttrs::ABI_optimization_goals, OptimizationGoals);
OptimizationGoals = -1;
ATS.finishAttributeSection();
}
//===----------------------------------------------------------------------===//
@ -837,6 +798,8 @@ void ARMAsmPrinter::emitAttributes() {
else if (STI.hasVirtualization())
ATS.emitAttribute(ARMBuildAttrs::Virtualization_use,
ARMBuildAttrs::AllowVirtualization);
ATS.finishAttributeSection();
}
//===----------------------------------------------------------------------===//

5
lib/Target/ARM/ARMAsmPrinter.h
View File

@ -51,11 +51,6 @@ class LLVM_LIBRARY_VISIBILITY ARMAsmPrinter : public AsmPrinter {
/// labels used for ARMv4t thumb code to make register indirect calls.
SmallVector<std::pair<unsigned, MCSymbol*>, 4> ThumbIndirectPads;
/// OptimizationGoals - Maintain a combined optimization goal for all
/// functions in a module: one of Tag_ABI_optimization_goals values,
/// -1 if uninitialized, 0 if conflicting goals
int OptimizationGoals;
public:
explicit ARMAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer);

18
test/CodeGen/ARM/build-attributes-optimization-minsize.ll
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@ -1,18 +0,0 @@
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; CHECK: .eabi_attribute 30, 4 @ Tag_ABI_optimization_goals
; CHECK-OBJ: TagName: ABI_optimization_goals
; CHECK-OBJ-NEXT: Description: Aggressive Size
define i32 @f(i64 %z) #0 {
ret i32 0
}
attributes #0 = { minsize optsize }

23
test/CodeGen/ARM/build-attributes-optimization-mixed.ll
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@ -1,23 +0,0 @@
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s
; CHECK-NOT: .eabi_attribute 30
; CHECK-NOT: Tag_ABI_optimization_goals
define i32 @f(i64 %z) #0 {
ret i32 0
}
define i32 @g(i64 %z) #1 {
ret i32 1
}
attributes #0 = { noinline optnone }
attributes #1 = { minsize optsize }

18
test/CodeGen/ARM/build-attributes-optimization-optnone.ll
View File

@ -1,18 +0,0 @@
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; CHECK: .eabi_attribute 30, 6 @ Tag_ABI_optimization_goals
; CHECK-OBJ: TagName: ABI_optimization_goals
; CHECK-OBJ-NEXT: Description: Best Debugging
define i32 @f(i64 %z) #0 {
ret i32 0
}
attributes #0 = { noinline optnone }

18
test/CodeGen/ARM/build-attributes-optimization-optsize.ll
View File

@ -1,18 +0,0 @@
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 | FileCheck %s
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
; CHECK: .eabi_attribute 30, 3 @ Tag_ABI_optimization_goals
; CHECK-OBJ: TagName: ABI_optimization_goals
; CHECK-OBJ-NEXT: Description: Size
define i32 @f(i64 %z) #0 {
ret i32 0
}
attributes #0 = { optsize }

23
test/CodeGen/ARM/build-attributes-optimization.ll
View File

@ -1,23 +0,0 @@
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 | FileCheck %s --check-prefix=NONE
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 | FileCheck %s --check-prefix=SPEED
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 | FileCheck %s --check-prefix=MAXSPEED
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O0 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=NONE-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O1 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=SPEED-OBJ
; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-a7 -O3 -filetype obj -o - | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=MAXSPEED-OBJ
; NONE: .eabi_attribute 30, 5 @ Tag_ABI_optimization_goals
; SPEED: .eabi_attribute 30, 1 @ Tag_ABI_optimization_goals
; MAXSPEED: .eabi_attribute 30, 2 @ Tag_ABI_optimization_goals
; NONE-OBJ: TagName: ABI_optimization_goals
; NONE-OBJ-NEXT: Description: Debugging
; SPEED-OBJ: TagName: ABI_optimization_goals
; SPEED-OBJ-NEXT: Description: Speed
; MAXSPEED-OBJ: TagName: ABI_optimization_goals
; MAXSPEED-OBJ-NEXT: Description: Aggressive Speed
define i32 @f(i64 %z) {
ret i32 0
}

16
test/MC/ARM/data-in-code.ll
View File

@ -51,6 +51,13 @@ exit:
;; ARM-NEXT: Other:
;; ARM-NEXT: Section: [[MIXED_SECT]]
;; ARM: Symbol {
;; ARM: Name: $d
;; ARM-NEXT: Value: 0
;; ARM-NEXT: Size: 0
;; ARM-NEXT: Binding: Local
;; ARM-NEXT: Type: None
;; ARM: Symbol {
;; ARM: Name: $d
;; ARM-NEXT: Value: 0x{{[0-9A-F]+}}
@ -70,17 +77,10 @@ exit:
;; ARM-NEXT: Section: .ARM.exidx
;; ARM-NEXT: }
;; ARM: Symbol {
;; ARM: Name: $d
;; ARM-NEXT: Value: 0
;; ARM-NEXT: Size: 0
;; ARM-NEXT: Binding: Local
;; ARM-NEXT: Type: None
;; ARM-NOT: ${{[atd]}}
;; TMB: Symbol {
;; TMB: Name: $d.1
;; TMB: Name: $d.2
;; TMB-NEXT: Value: 0x{{[0-9A-F]+}}
;; TMB-NEXT: Size: 0
;; TMB-NEXT: Binding: Local