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Revert r296865 "[ARM] fpscr read/write intrinsics not aware of each other"

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It caused PR32134: "Cannot select: intrinsic %llvm.arm.get.fpscr".

llvm-svn: 296926
This commit is contained in:
Hans Wennborg 2017-03-03 23:19:31 +00:00
parent e45d0b88df
commit c1102a606f
2 changed files with 1 additions and 24 deletions
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2
include/llvm/IR/IntrinsicsARM.td
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@ -67,7 +67,7 @@ def int_arm_isb : GCCBuiltin<"__builtin_arm_isb">, MSBuiltin<"__isb">,
// VFP
def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">,
Intrinsic<[llvm_i32_ty], [], []>;
Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">,
Intrinsic<[], [llvm_i32_ty], []>;
def int_arm_vcvtr : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],

23
test/CodeGen/ARM/fpscr-intrinsics.ll
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@ -1,23 +0,0 @@
; RUN: llc < %s -O0 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -O3 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
; Function Attrs: nounwind
define void @fn1(i32* nocapture %p) local_unnamed_addr {
entry:
; CHECK: vmrs r{{[0-9]+}}, fpscr
%0 = tail call i32 @llvm.arm.get.fpscr()
store i32 %0, i32* %p, align 4
; CHECK: vmsr fpscr, r{{[0-9]+}}
tail call void @llvm.arm.set.fpscr(i32 1)
; CHECK: vmrs r{{[0-9]+}}, fpscr
%1 = tail call i32 @llvm.arm.get.fpscr()
%arrayidx1 = getelementptr inbounds i32, i32* %p, i32 1
store i32 %1, i32* %arrayidx1, align 4
ret void
}
; Function Attrs: nounwind readonly
declare i32 @llvm.arm.get.fpscr()
; Function Attrs: nounwind writeonly
declare void @llvm.arm.set.fpscr(i32)