From c1514789f32753440265f1dbc2fbcc5e85a471d1 Mon Sep 17 00:00:00 2001 From: Ruchira Sasanka Date: Sat, 15 Sep 2001 19:06:58 +0000 Subject: [PATCH] fixed printing messages llvm-svn: 590 --- lib/CodeGen/RegAlloc/LiveRangeInfo.cpp | 6 +- lib/CodeGen/RegAlloc/PhyRegAloc.cpp | 118 +++++++++++++++++++++++-- lib/CodeGen/RegAlloc/RegClass.cpp | 29 ++---- 3 files changed, 121 insertions(+), 32 deletions(-) diff --git a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp index 5ef350207b8..64cac9bd3b8 100644 --- a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp +++ b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp @@ -120,8 +120,10 @@ void LiveRangeInfo::constructLiveRanges() OpI.getMachineOperand().getVRegValue(), isCC ); - if(isCC ) - cout << "\a" << "**created a LR for a CC reg**" << cout; + if(isCC ) { + cout << "\a**created a LR for a CC reg:"; + printValue( OpI.getMachineOperand().getVRegValue() ); + } DefRange->setRegClass( RegClassList[ rcid ] ); diff --git a/lib/CodeGen/RegAlloc/PhyRegAloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAloc.cpp index c2c7c64ec90..c2ff66de40e 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAloc.cpp @@ -28,7 +28,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M, void PhyRegAlloc::createIGNodeListsAndIGs() { - cout << "Creating LR lists ..." << endl; + if(DEBUG_RA ) cout << "Creating LR lists ..." << endl; // hash map iterator LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin(); @@ -113,7 +113,7 @@ void PhyRegAlloc::addInterference(const Value *const Def, LROfVar->addCallInterference( (const Instruction *const) Def ); } - else if(DEBUG_RA) { + else if(DEBUG_RA > 1) { // we will not have LRs for values not explicitly allocated in the // instruction stream (e.g., constants) cout << " warning: no live range for " ; @@ -221,7 +221,73 @@ void PhyRegAlloc::updateMachineCode() for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order - cout << endl << "BB "; printValue( *BBI); cout << ": "; + // get the iterator for machine instructions + MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec(); + MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin(); + + // iterate over all the machine instructions in BB + for( ; MInstIterator != MIVec.end(); ++MInstIterator) { + + MachineInstr *const MInst = *MInstIterator; + + //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) { + + for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) { + + MachineOperand& Op = MInst->getOperand(OpNum); + + if( Op.getOperandType() == MachineOperand::MO_VirtualRegister || + Op.getOperandType() == MachineOperand::MO_CCRegister) { + + const Value *const Val = Op.getVRegValue(); + + // delete this condition checking later (must assert if Val is null) + if( !Val ) { + cout << "Error: NULL Value found in instr." << endl; + continue; + } + assert( Val && "Value is NULL"); + + const LiveRange *const LR = LRI.getLiveRangeForValue(Val); + + if ( !LR ) { + if( ! ( (Val->getType())->isLabelType() || + (Val->getValueType() == Value::ConstantVal) ) ) { + cout << "Warning: No LiveRange for: "; + printValue( Val); cout << endl; + } + + //assert( LR && "No LR found for Value"); + continue; + } + + unsigned RCID = (LR->getRegClass())->getID(); + + Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) ); + + int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor()); + + } + } + + } + } +} + + + + +void PhyRegAlloc::printMachineCode() +{ + + cout << endl << ";************** Method "; + cout << Meth->getName() << " *****************" << endl; + + Method::const_iterator BBI = Meth->begin(); // random iterator for BBs + + for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order + + cout << endl ; printLabel( *BBI); cout << ": "; // get the iterator for machine instructions MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec(); @@ -232,8 +298,10 @@ void PhyRegAlloc::updateMachineCode() MachineInstr *const MInst = *MInstIterator; + cout << endl << "\t"; cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString; + //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) { @@ -247,7 +315,7 @@ void PhyRegAlloc::updateMachineCode() const Value *const Val = Op.getVRegValue(); if( !Val ) { - cout << "\t<** Value is NULL!!!**>"; + cout << "\t<*NULL Value*>"; continue; } assert( Val && "Value is NULL"); @@ -255,6 +323,8 @@ void PhyRegAlloc::updateMachineCode() const LiveRange *const LR = LRI.getLiveRangeForValue(Val); if ( !LR ) { + + if( ! ( (Val->getType())->isLabelType() || (Val->getValueType() == Value::ConstantVal) ) ) { cout << "\t" << "<*No LiveRange for: "; @@ -271,22 +341,50 @@ void PhyRegAlloc::updateMachineCode() //cout << "Setting reg for value: "; printValue( Val ); //cout << endl; - //Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) ); + Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) ); int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor()); cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum ); - } + } + else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) { + cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() ); + } + else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) { + const Value *const Val = Op.getVRegValue () ; + if( !Val ) { + cout << "\t<*NULL Value*>"; + continue; + } + if( (Val->getValueType() == Value::BasicBlockVal)) + { cout << "\t"; printLabel( Op.getVRegValue () ); } + else { cout << "\t"; printValue( Val ); } + } + else cout << "\t" << Op; // use dump field } } + + cout << endl; + } + + cout << endl; } +void PhyRegAlloc::printLabel(const Value *const Val) +{ + if( Val->hasName() ) + cout << Val->getName(); + else + cout << "Label" << Val; +} + + @@ -328,14 +426,16 @@ void PhyRegAlloc::allocateRegisters() } MRI.colorArgs(Meth, LRI); // color method args - MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap); // color call args of call instrns + // color call args of call instrns + MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap); // color all register classes for( unsigned int rc=0; rc < NumOfRegClasses ; rc++) RegClassList[ rc ]->colorAllRegs(); - updateMachineCode(); - //PrintMachineInstructions(Meth); + //updateMachineCode(); + PrintMachineInstructions(Meth); + printMachineCode(); // only for DEBUGGING } diff --git a/lib/CodeGen/RegAlloc/RegClass.cpp b/lib/CodeGen/RegAlloc/RegClass.cpp index 90ad960ba59..9c3e08c294e 100644 --- a/lib/CodeGen/RegAlloc/RegClass.cpp +++ b/lib/CodeGen/RegAlloc/RegClass.cpp @@ -169,34 +169,21 @@ void RegClass::colorIGNode(IGNode *const Node) MRC->colorIGNode(Node, IsColorUsedArr); } else { - cout << " Node " << Node->getIndex(); - cout << " already colored with color " << Node->getColor() << endl; + if( DEBUG_RA ) { + cout << " Node " << Node->getIndex(); + cout << " already colored with color " << Node->getColor() << endl; + } } if( !Node->hasColor() ) { - cout << " Node " << Node->getIndex(); - cout << " - could not find a color (needs spilling)" << endl; + if( DEBUG_RA ) { + cout << " Node " << Node->getIndex(); + cout << " - could not find a color (needs spilling)" << endl; + } } } -#if 0 - if( DEBUG_RA) { // printing code - /* cout << " Node " << Node->getIndex(); - if( Node->hasColor() ) { - cout << " colored with color " << Node->getColor() << " [" ; - cout << SparcFloatRegOrder::getRegName(Node->getColor()); - if( Node->getTypeID() == Type::DoubleTyID ) - cout << "+" << SparcFloatRegOrder::getRegName(Node->getColor()+1); - cout << "]" << endl; - } - */ - // MRC->printReg( Node->getParentLR()); - cout << " Node " << Node->getIndex(); - if( Node->hasColor() ) - cout << " colored with color " << Node->getColor() << endl; - -#endif