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https://github.com/RPCS3/llvm-mirror.git
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the cell backend is making all sorts of unsafe and incorrect assumptions
about ownership and update policies. It isn't clear why it is doing all this lowering at isel time instead of in legalize. This fixes fcmp64.ll llvm-svn: 96849
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49b1b721fc
commit
c175e45976
@ -294,15 +294,18 @@ namespace {
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((vecVT == MVT::v2i64) &&
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((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
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(SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
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(SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() != 0))))
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return Select(bvNode);
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(SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() != 0)))) {
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HandleSDNode Dummy(SDValue(bvNode, 0));
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Select(bvNode);
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return Dummy.getValue().getNode();
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}
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// No, need to emit a constant pool spill:
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std::vector<Constant*> CV;
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for (size_t i = 0; i < bvNode->getNumOperands(); ++i) {
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ConstantSDNode *V = dyn_cast<ConstantSDNode > (bvNode->getOperand(i));
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CV.push_back(const_cast<ConstantInt *> (V->getConstantIntValue()));
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CV.push_back(const_cast<ConstantInt *>(V->getConstantIntValue()));
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}
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Constant *CP = ConstantVector::get(CV);
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@ -311,10 +314,14 @@ namespace {
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SDValue CGPoolOffset =
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SPU::LowerConstantPool(CPIdx, *CurDAG,
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SPUtli.getSPUTargetMachine());
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return SelectCode(CurDAG->getLoad(vecVT, dl,
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CurDAG->getEntryNode(), CGPoolOffset,
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PseudoSourceValue::getConstantPool(), 0,
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false, false, Alignment).getNode());
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HandleSDNode Dummy(CurDAG->getLoad(vecVT, dl,
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CurDAG->getEntryNode(), CGPoolOffset,
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PseudoSourceValue::getConstantPool(),0,
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false, false, Alignment));
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CurDAG->ReplaceAllUsesWith(SDValue(bvNode, 0), Dummy.getValue());
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SelectCode(Dummy.getValue().getNode());
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return Dummy.getValue().getNode();
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}
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/// Select - Convert the specified operand from a target-independent to a
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@ -692,9 +699,8 @@ SPUDAGToDAGISel::Select(SDNode *N) {
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SDValue Ops[8];
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DebugLoc dl = N->getDebugLoc();
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if (N->isMachineOpcode()) {
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if (N->isMachineOpcode())
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return NULL; // Already selected.
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}
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if (Opc == ISD::FrameIndex) {
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int FI = cast<FrameIndexSDNode>(N)->getIndex();
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@ -773,29 +779,44 @@ SPUDAGToDAGISel::Select(SDNode *N) {
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// re-use it in the VEC2PREFSLOT selection without needing to explicitly
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// call SelectCode (it's already done for us.)
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SelectCode(CurDAG->getNode(ISD::BIT_CONVERT, dl, OpVecVT, zextShuffle).getNode());
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return SelectCode(CurDAG->getNode(SPUISD::VEC2PREFSLOT, dl, OpVT,
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zextShuffle).getNode());
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HandleSDNode Dummy(CurDAG->getNode(SPUISD::VEC2PREFSLOT, dl, OpVT,
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zextShuffle));
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CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
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SelectCode(Dummy.getValue().getNode());
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return Dummy.getValue().getNode();
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} else if (Opc == ISD::ADD && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
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SDNode *CGLoad =
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emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode());
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return SelectCode(CurDAG->getNode(SPUISD::ADD64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)).getNode());
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HandleSDNode Dummy(CurDAG->getNode(SPUISD::ADD64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)));
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CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
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SelectCode(Dummy.getValue().getNode());
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return Dummy.getValue().getNode();
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} else if (Opc == ISD::SUB && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
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SDNode *CGLoad =
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emitBuildVector(getBorrowGenerateShufMask(*CurDAG, dl).getNode());
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return SelectCode(CurDAG->getNode(SPUISD::SUB64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)).getNode());
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HandleSDNode Dummy(CurDAG->getNode(SPUISD::SUB64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)));
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CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
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SelectCode(Dummy.getValue().getNode());
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return Dummy.getValue().getNode();
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} else if (Opc == ISD::MUL && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
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SDNode *CGLoad =
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emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode());
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return SelectCode(CurDAG->getNode(SPUISD::MUL64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)).getNode());
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HandleSDNode Dummy(CurDAG->getNode(SPUISD::MUL64_MARKER, dl, OpVT,
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N->getOperand(0), N->getOperand(1),
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SDValue(CGLoad, 0)));
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CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
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SelectCode(Dummy.getValue().getNode());
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return Dummy.getValue().getNode();
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} else if (Opc == ISD::TRUNCATE) {
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SDValue Op0 = N->getOperand(0);
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if ((Op0.getOpcode() == ISD::SRA || Op0.getOpcode() == ISD::SRL)
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@ -832,17 +853,14 @@ SPUDAGToDAGISel::Select(SDNode *N) {
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}
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}
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} else if (Opc == ISD::SHL) {
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if (OpVT == MVT::i64) {
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if (OpVT == MVT::i64)
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return SelectSHLi64(N, OpVT);
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}
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} else if (Opc == ISD::SRL) {
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if (OpVT == MVT::i64) {
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if (OpVT == MVT::i64)
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return SelectSRLi64(N, OpVT);
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}
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} else if (Opc == ISD::SRA) {
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if (OpVT == MVT::i64) {
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if (OpVT == MVT::i64)
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return SelectSRAi64(N, OpVT);
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}
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} else if (Opc == ISD::FNEG
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&& (OpVT == MVT::f64 || OpVT == MVT::v2f64)) {
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DebugLoc dl = N->getDebugLoc();
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