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Record asm variant id in MatchEntry and check it while matching instruction.
llvm-svn: 147858
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8d47bb30e3
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c1e4ca5839
@ -365,6 +365,9 @@ struct MatchableInfo {
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}
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};
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/// AsmVariantID - Target's assembly syntax variant no.
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int AsmVariantID;
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/// TheDef - This is the definition of the instruction or InstAlias that this
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/// matchable came from.
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Record *const TheDef;
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@ -405,11 +408,13 @@ struct MatchableInfo {
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std::string ConversionFnKind;
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MatchableInfo(const CodeGenInstruction &CGI)
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: TheDef(CGI.TheDef), DefRec(&CGI), AsmString(CGI.AsmString) {
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: AsmVariantID(0), TheDef(CGI.TheDef), DefRec(&CGI),
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AsmString(CGI.AsmString) {
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}
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MatchableInfo(const CodeGenInstAlias *Alias)
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: TheDef(Alias->TheDef), DefRec(Alias), AsmString(Alias->AsmString) {
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: AsmVariantID(0), TheDef(Alias->TheDef), DefRec(Alias),
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AsmString(Alias->AsmString) {
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}
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void Initialize(const AsmMatcherInfo &Info,
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@ -646,7 +651,7 @@ void MatchableInfo::dump() {
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void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
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SmallPtrSet<Record*, 16> &SingletonRegisters,
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int AsmVariantNo, std::string &RegisterPrefix) {
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// TODO: Eventually support asmparser for Variant != 0.
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AsmVariantID = AsmVariantNo;
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AsmString =
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CodeGenInstruction::FlattenAsmStringVariants(AsmString, AsmVariantNo);
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@ -2222,7 +2227,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
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OS << " unsigned MatchInstructionImpl(\n";
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OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
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OS << " MCInst &Inst, unsigned &ErrorInfo);\n";
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OS << " MCInst &Inst, unsigned &ErrorInfo, unsigned VariantID = 0);\n";
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if (Info.OperandMatchInfo.size()) {
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OS << "\n enum OperandMatchResultTy {\n";
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@ -2304,6 +2309,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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<< " Classes[" << MaxNumOperands << "];\n";
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OS << " " << getMinimalTypeForRange(1ULL << Info.SubtargetFeatures.size())
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<< " RequiredFeatures;\n";
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OS << " unsigned AsmVariantID;\n";
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OS << " };\n\n";
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OS << " // Predicate for searching for an opcode.\n";
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@ -2348,7 +2354,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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}
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} else
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OS << "0";
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OS << ", " << II.AsmVariantID;
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OS << "},\n";
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}
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@ -2369,7 +2375,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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<< Target.getName() << ClassName << "::\n"
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<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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<< " &Operands,\n";
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OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
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OS << " MCInst &Inst, unsigned &ErrorInfo,\n";
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OS << " unsigned VariantID) {\n";
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// Emit code to get the available features.
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OS << " // Get the current feature set.\n";
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@ -2417,6 +2424,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " assert(Mnemonic == it->Mnemonic);\n";
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// Emit check that the subclasses match.
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OS << " if (VariantID != it->AsmVariantID) continue;\n";
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OS << " bool OperandsValid = true;\n";
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OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
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OS << " if (i + 1 >= Operands.size()) {\n";
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