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[Target] Use llvm::is_contained (NFC)
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@ -283,7 +283,7 @@ HexagonTargetLowering::getPreferredHvxVectorAction(MVT VecTy) const {
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// widen the vector. Note: the threshold was not selected in
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// any scientific way.
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ArrayRef<MVT> Tys = Subtarget.getHVXElementTypes();
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if (llvm::find(Tys, ElemTy) != Tys.end()) {
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if (llvm::is_contained(Tys, ElemTy)) {
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unsigned VecWidth = VecTy.getSizeInBits();
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bool HaveThreshold = HvxWidenThreshold.getNumOccurrences() > 0;
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if (HaveThreshold && 8*HvxWidenThreshold <= VecWidth)
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@ -133,7 +133,7 @@ bool HexagonSubtarget::isHVXElementType(MVT Ty, bool IncludeBool) const {
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if (IncludeBool && Ty == MVT::i1)
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return true;
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ArrayRef<MVT> ElemTypes = getHVXElementTypes();
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return llvm::find(ElemTypes, Ty) != ElemTypes.end();
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return llvm::is_contained(ElemTypes, Ty);
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}
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bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const {
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@ -159,7 +159,7 @@ bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const {
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unsigned VecWidth = VecTy.getSizeInBits();
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if (VecWidth != 8 * HwLen && VecWidth != 16 * HwLen)
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return false;
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return llvm::find(ElemTypes, ElemTy) != ElemTypes.end();
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return llvm::is_contained(ElemTypes, ElemTy);
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}
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bool HexagonSubtarget::isTypeForHVX(Type *VecTy, bool IncludeBool) const {
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@ -302,7 +302,7 @@ static bool collectUnprimedAccPHIs(MachineRegisterInfo *MRI,
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// code.
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if (Opcode != PPC::PHI)
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continue;
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if (std::find(PHIs.begin(), PHIs.end(), Instr) != PHIs.end())
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if (llvm::is_contained(PHIs, Instr))
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return false;
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PHIs.push_back(Instr);
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}
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@ -18280,7 +18280,7 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, const X86Subtarget &Subtarget,
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// Modify the new Mask to take all zeros from the all-zero vector.
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// Choose indices that are blend-friendly.
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bool UsedZeroVector = false;
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assert(find(WidenedMask, SM_SentinelZero) != WidenedMask.end() &&
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assert(is_contained(WidenedMask, SM_SentinelZero) &&
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"V2's non-undef elements are used?!");
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for (int i = 0; i != NewNumElts; ++i)
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if (WidenedMask[i] == SM_SentinelZero) {
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