From c26c3074e8123e0b41fa78e4324010717e60a9c6 Mon Sep 17 00:00:00 2001 From: Sumanth Gundapaneni Date: Fri, 30 Jun 2017 20:54:24 +0000 Subject: [PATCH] [Hexagon] Guard the generation of lookup table The llvm flag "-hexagon-emit-lookup-tables" guards the generation of lookup table generated from a switch statement. Differential Revision: https://reviews.llvm.org/D34819 llvm-svn: 306877 --- .../Hexagon/HexagonTargetTransformInfo.cpp | 8 +++ .../Hexagon/HexagonTargetTransformInfo.h | 3 + .../SimplifyCFG/Hexagon/lit.local.cfg | 5 ++ .../Hexagon/switch-to-lookup-table.ll | 62 +++++++++++++++++++ 4 files changed, 78 insertions(+) create mode 100644 test/Transforms/SimplifyCFG/Hexagon/lit.local.cfg create mode 100644 test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll diff --git a/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp index 4135d0cec70..aac810e29fe 100644 --- a/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp +++ b/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp @@ -21,6 +21,10 @@ using namespace llvm; #define DEBUG_TYPE "hexagontti" +static cl::opt EmitLookupTables("hexagon-emit-lookup-tables", + cl::init(true), cl::Hidden, + cl::desc("Control lookup table emission on Hexagon target")); + TargetTransformInfo::PopcntSupportKind HexagonTTIImpl::getPopcntSupport(unsigned IntTyWidthInBit) const { // Return Fast Hardware support as every input < 64 bits will be promoted @@ -70,3 +74,7 @@ int HexagonTTIImpl::getUserCost(const User *U, return TargetTransformInfo::TCC_Free; return BaseT::getUserCost(U, Operands); } + +bool HexagonTTIImpl::shouldBuildLookupTables() const { + return EmitLookupTables; +} diff --git a/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/lib/Target/Hexagon/HexagonTargetTransformInfo.h index f08a2731057..ab5a6e07d87 100644 --- a/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -63,6 +63,9 @@ public: /// @} int getUserCost(const User *U, ArrayRef Operands); + + // Hexagon specific decision to generate a lookup table. + bool shouldBuildLookupTables() const; }; } // end namespace llvm diff --git a/test/Transforms/SimplifyCFG/Hexagon/lit.local.cfg b/test/Transforms/SimplifyCFG/Hexagon/lit.local.cfg new file mode 100644 index 00000000000..a1f0ecbf679 --- /dev/null +++ b/test/Transforms/SimplifyCFG/Hexagon/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.ll'] + +targets = set(config.root.targets_to_build.split()) +if not 'Hexagon' in targets: + config.unsupported = True diff --git a/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll b/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll new file mode 100644 index 00000000000..4bc1251572a --- /dev/null +++ b/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll @@ -0,0 +1,62 @@ +; RUN: opt -S -O2 < %s | FileCheck %s -check-prefix=ENABLE +; RUN: opt -S -hexagon-emit-lookup-tables=true -O2 < %s | FileCheck %s -check-prefix=ENABLE +; RUN: opt -S -hexagon-emit-lookup-tables=false -O2 < %s | FileCheck %s -check-prefix=DISABLE + + +; ENABLE: @{{.*}} = private unnamed_addr constant [6 x i32] [i32 9, i32 20, i32 14, i32 22, i32 12, i32 5] +; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [6 x i32] [i32 9, i32 20, i32 14, i32 22, i32 12, i32 5] +; DISABLE : = phi i32 [ 19, %{{.*}} ], [ 5, %{{.*}} ], [ 12, %{{.*}} ], [ 22, %{{.*}} ], [ 14, %{{.*}} ], [ 20, %{{.*}} ], [ 9, %{{.*}} ] + +target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" +target triple = "hexagon-unknown--elf" + +; Function Attrs: noinline nounwind +define i32 @foo(i32 %x) #0 section ".tcm_text" { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %0 = load i32, i32* %x.addr, align 4 + switch i32 %0, label %sw.default [ + i32 0, label %sw.bb + i32 1, label %sw.bb1 + i32 2, label %sw.bb2 + i32 3, label %sw.bb3 + i32 4, label %sw.bb4 + i32 5, label %sw.bb5 + ] + +sw.bb: ; preds = %entry + store i32 9, i32* %retval, align 4 + br label %return + +sw.bb1: ; preds = %entry + store i32 20, i32* %retval, align 4 + br label %return + +sw.bb2: ; preds = %entry + store i32 14, i32* %retval, align 4 + br label %return + +sw.bb3: ; preds = %entry + store i32 22, i32* %retval, align 4 + br label %return + +sw.bb4: ; preds = %entry + store i32 12, i32* %retval, align 4 + br label %return + +sw.bb5: ; preds = %entry + store i32 5, i32* %retval, align 4 + br label %return + +sw.default: ; preds = %entry + store i32 19, i32* %retval, align 4 + br label %return + +return: ; preds = %sw.default, %sw.bb5, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb + %1 = load i32, i32* %retval, align 4 + ret i32 %1 +} + +attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="-hvx-double,-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }