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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)

Browse Source 
Summary: The convenience wrapper in STLExtras is available since rL342102.

Reviewers: dblaikie, javed.absar, JDevlieghere, andreadb

Subscribers: MatzeB, sanjoy, arsenm, dschuff, mehdi_amini, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, javed.absar, gbedwell, jrtc27, mgrang, atanasyan, steven_wu, george.burgess.iv, dexonsmith, kristina, jsji, llvm-commits

Differential Revision: https://reviews.llvm.org/D52573

llvm-svn: 343163
This commit is contained in:
Fangrui Song 2018-09-27 02:13:45 +00:00
parent 098186de40
commit c2791239be
124 changed files with 395 additions and 443 deletions
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4
include/llvm/Analysis/LoopInfoImpl.h
View File

@ -640,8 +640,8 @@ void LoopInfoBase<BlockT, LoopT>::print(raw_ostream &OS) const {
template <typename T>
bool compareVectors(std::vector<T> &BB1, std::vector<T> &BB2) {
llvm::sort(BB1.begin(), BB1.end());
llvm::sort(BB2.begin(), BB2.end());
llvm::sort(BB1);
llvm::sort(BB2);
return BB1 == BB2;
}

2
include/llvm/CodeGen/SlotIndexes.h
View File

@ -676,7 +676,7 @@ class raw_ostream;
idx2MBBMap.push_back(IdxMBBPair(startIdx, mbb));
renumberIndexes(newItr);
llvm::sort(idx2MBBMap.begin(), idx2MBBMap.end(), Idx2MBBCompare());
llvm::sort(idx2MBBMap, Idx2MBBCompare());
}
/// Free the resources that were required to maintain a SlotIndex.

6
include/llvm/ProfileData/InstrProf.h
View File

@ -544,9 +544,9 @@ Error InstrProfSymtab::create(const NameIterRange &IterRange) {
void InstrProfSymtab::finalizeSymtab() {
if (Sorted)
return;
llvm::sort(MD5NameMap.begin(), MD5NameMap.end(), less_first());
llvm::sort(MD5FuncMap.begin(), MD5FuncMap.end(), less_first());
llvm::sort(AddrToMD5Map.begin(), AddrToMD5Map.end(), less_first());
llvm::sort(MD5NameMap, less_first());
llvm::sort(MD5FuncMap, less_first());
llvm::sort(AddrToMD5Map, less_first());
AddrToMD5Map.erase(std::unique(AddrToMD5Map.begin(), AddrToMD5Map.end()),
AddrToMD5Map.end());
Sorted = true;

2
include/llvm/Support/CFGUpdate.h
View File

@ -105,7 +105,7 @@ void LegalizeUpdates(ArrayRef<Update<NodePtr>> AllUpdates,
Operations[{U.getTo(), U.getFrom()}] = int(i);
}
llvm::sort(Result.begin(), Result.end(),
llvm::sort(Result,
[&Operations](const Update<NodePtr> &A, const Update<NodePtr> &B) {
return Operations[{A.getFrom(), A.getTo()}] >
Operations[{B.getFrom(), B.getTo()}];

7
include/llvm/Support/GenericDomTreeConstruction.h
View File

@ -1386,10 +1386,9 @@ struct SemiNCAInfo {
// Make a copy and sort it such that it is possible to check if there are
// no gaps between DFS numbers of adjacent children.
SmallVector<TreeNodePtr, 8> Children(Node->begin(), Node->end());
llvm::sort(Children.begin(), Children.end(),
[](const TreeNodePtr Ch1, const TreeNodePtr Ch2) {
return Ch1->getDFSNumIn() < Ch2->getDFSNumIn();
});
llvm::sort(Children, [](const TreeNodePtr Ch1, const TreeNodePtr Ch2) {
return Ch1->getDFSNumIn() < Ch2->getDFSNumIn();
});
auto PrintChildrenError = [Node, &Children, PrintNodeAndDFSNums](
const TreeNodePtr FirstCh, const TreeNodePtr SecondCh) {

2
include/llvm/Support/ScopedPrinter.h
View File

@ -138,7 +138,7 @@ public:
}
}
llvm::sort(SetFlags.begin(), SetFlags.end(), &flagName<TFlag>);
llvm::sort(SetFlags, &flagName<TFlag>);
startLine() << Label << " [ (" << hex(Value) << ")\n";
for (const auto &Flag : SetFlags) {

12
lib/Analysis/BlockFrequencyInfoImpl.cpp
View File

@ -156,9 +156,9 @@ static void combineWeight(Weight &W, const Weight &OtherW) {
static void combineWeightsBySorting(WeightList &Weights) {
// Sort so edges to the same node are adjacent.
llvm::sort(Weights.begin(), Weights.end(),
[](const Weight &L,
const Weight &R) { return L.TargetNode < R.TargetNode; });
llvm::sort(Weights, [](const Weight &L, const Weight &R) {
return L.TargetNode < R.TargetNode;
});
// Combine adjacent edges.
WeightList::iterator O = Weights.begin();
@ -707,7 +707,7 @@ static void findIrreducibleHeaders(
"Expected irreducible CFG; -loop-info is likely invalid");
if (Headers.size() == InSCC.size()) {
// Every block is a header.
llvm::sort(Headers.begin(), Headers.end());
llvm::sort(Headers);
return;
}
@ -742,8 +742,8 @@ static void findIrreducibleHeaders(
Others.push_back(Irr.Node);
LLVM_DEBUG(dbgs() << " => other = " << BFI.getBlockName(Irr.Node) << "\n");
}
llvm::sort(Headers.begin(), Headers.end());
llvm::sort(Others.begin(), Others.end());
llvm::sort(Headers);
llvm::sort(Others);
}
static void createIrreducibleLoop(

4
lib/Analysis/CFLAndersAliasAnalysis.cpp
View File

@ -395,7 +395,7 @@ populateAliasMap(DenseMap<const Value *, std::vector<OffsetValue>> &AliasMap,
}
// Sort AliasList for faster lookup
llvm::sort(AliasList.begin(), AliasList.end());
llvm::sort(AliasList);
}
}
@ -479,7 +479,7 @@ static void populateExternalRelations(
}
// Remove duplicates in ExtRelations
llvm::sort(ExtRelations.begin(), ExtRelations.end());
llvm::sort(ExtRelations);
ExtRelations.erase(std::unique(ExtRelations.begin(), ExtRelations.end()),
ExtRelations.end());
}

3
lib/Analysis/CallGraph.cpp
View File

@ -97,8 +97,7 @@ void CallGraph::print(raw_ostream &OS) const {
for (const auto &I : *this)
Nodes.push_back(I.second.get());
llvm::sort(Nodes.begin(), Nodes.end(),
[](CallGraphNode *LHS, CallGraphNode *RHS) {
llvm::sort(Nodes, [](CallGraphNode *LHS, CallGraphNode *RHS) {
if (Function *LF = LHS->getFunction())
if (Function *RF = RHS->getFunction())
return LF->getName() < RF->getName();

6
lib/Analysis/MemoryDependenceAnalysis.cpp
View File

@ -807,7 +807,7 @@ MemoryDependenceResults::getNonLocalCallDependency(CallSite QueryCS) {
DirtyBlocks.push_back(Entry.getBB());
// Sort the cache so that we can do fast binary search lookups below.
llvm::sort(Cache.begin(), Cache.end());
llvm::sort(Cache);
++NumCacheDirtyNonLocal;
// cerr << "CACHED CASE: " << DirtyBlocks.size() << " dirty: "
@ -1070,7 +1070,7 @@ SortNonLocalDepInfoCache(MemoryDependenceResults::NonLocalDepInfo &Cache,
break;
default:
// Added many values, do a full scale sort.
llvm::sort(Cache.begin(), Cache.end());
llvm::sort(Cache);
break;
}
}
@ -1662,7 +1662,7 @@ void MemoryDependenceResults::removeInstruction(Instruction *RemInst) {
// Re-sort the NonLocalDepInfo. Changing the dirty entry to its
// subsequent value may invalidate the sortedness.
llvm::sort(NLPDI.begin(), NLPDI.end());
llvm::sort(NLPDI);
}
ReverseNonLocalPtrDeps.erase(ReversePtrDepIt);

2
lib/Analysis/ScalarEvolution.cpp
View File

@ -11064,7 +11064,7 @@ void ScalarEvolution::findArrayDimensions(SmallVectorImpl<const SCEV *> &Terms,
Terms.erase(std::unique(Terms.begin(), Terms.end()), Terms.end());
// Put larger terms first.
llvm::sort(Terms.begin(), Terms.end(), [](const SCEV *LHS, const SCEV *RHS) {
llvm::sort(Terms, [](const SCEV *LHS, const SCEV *RHS) {
return numberOfTerms(LHS) > numberOfTerms(RHS);
});

2
lib/Analysis/ScalarEvolutionExpander.cpp
View File

@ -1867,7 +1867,7 @@ SCEVExpander::replaceCongruentIVs(Loop *L, const DominatorTree *DT,
Phis.push_back(&PN);
if (TTI)
llvm::sort(Phis.begin(), Phis.end(), [](Value *LHS, Value *RHS) {
llvm::sort(Phis, [](Value *LHS, Value *RHS) {
// Put pointers at the back and make sure pointer < pointer = false.
if (!LHS->getType()->isIntegerTy() || !RHS->getType()->isIntegerTy())
return RHS->getType()->isIntegerTy() && !LHS->getType()->isIntegerTy();

4
lib/Analysis/TargetLibraryInfo.cpp
View File

@ -1399,10 +1399,10 @@ static bool compareWithVectorFnName(const VecDesc &LHS, StringRef S) {
void TargetLibraryInfoImpl::addVectorizableFunctions(ArrayRef<VecDesc> Fns) {
VectorDescs.insert(VectorDescs.end(), Fns.begin(), Fns.end());
llvm::sort(VectorDescs.begin(), VectorDescs.end(), compareByScalarFnName);
llvm::sort(VectorDescs, compareByScalarFnName);
ScalarDescs.insert(ScalarDescs.end(), Fns.begin(), Fns.end());
llvm::sort(ScalarDescs.begin(), ScalarDescs.end(), compareByVectorFnName);
llvm::sort(ScalarDescs, compareByVectorFnName);
}
void TargetLibraryInfoImpl::addVectorizableFunctionsFromVecLib(

2
lib/Bitcode/Reader/ValueList.cpp
View File

@ -144,7 +144,7 @@ Value *BitcodeReaderValueList::getValueFwdRef(unsigned Idx, Type *Ty) {
void BitcodeReaderValueList::resolveConstantForwardRefs() {
// Sort the values by-pointer so that they are efficient to look up with a
// binary search.
llvm::sort(ResolveConstants.begin(), ResolveConstants.end());
llvm::sort(ResolveConstants);
SmallVector<Constant *, 64> NewOps;

4
lib/Bitcode/Writer/ValueEnumerator.cpp
View File

@ -184,7 +184,7 @@ static void predictValueUseListOrderImpl(const Value *V, const Function *F,
return;
bool IsGlobalValue = OM.isGlobalValue(ID);
llvm::sort(List.begin(), List.end(), [&](const Entry &L, const Entry &R) {
llvm::sort(List, [&](const Entry &L, const Entry &R) {
const Use *LU = L.first;
const Use *RU = R.first;
if (LU == RU)
@ -745,7 +745,7 @@ void ValueEnumerator::organizeMetadata() {
// and then sort by the original/current ID. Since the IDs are guaranteed to
// be unique, the result of std::sort will be deterministic. There's no need
// for std::stable_sort.
llvm::sort(Order.begin(), Order.end(), [this](MDIndex LHS, MDIndex RHS) {
llvm::sort(Order, [this](MDIndex LHS, MDIndex RHS) {
return std::make_tuple(LHS.F, getMetadataTypeOrder(LHS.get(MDs)), LHS.ID) <
std::make_tuple(RHS.F, getMetadataTypeOrder(RHS.get(MDs)), RHS.ID);
});

7
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
View File

@ -2353,10 +2353,9 @@ void CodeViewDebug::emitLocalVariableList(ArrayRef<LocalVariable> Locals) {
for (const LocalVariable &L : Locals)
if (L.DIVar->isParameter())
Params.push_back(&L);
llvm::sort(Params.begin(), Params.end(),
[](const LocalVariable *L, const LocalVariable *R) {
return L->DIVar->getArg() < R->DIVar->getArg();
});
llvm::sort(Params, [](const LocalVariable *L, const LocalVariable *R) {
return L->DIVar->getArg() < R->DIVar->getArg();
});
for (const LocalVariable *L : Params)
emitLocalVariable(*L);

2
lib/CodeGen/AsmPrinter/DebugLocEntry.h
View File

@ -139,7 +139,7 @@ public:
// Sort the pieces by offset.
// Remove any duplicate entries by dropping all but the first.
void sortUniqueValues() {
llvm::sort(Values.begin(), Values.end());
llvm::sort(Values);
Values.erase(
std::unique(
Values.begin(), Values.end(), [](const Value &A, const Value &B) {

40
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
View File

@ -241,7 +241,7 @@ ArrayRef<DbgVariable::FrameIndexExpr> DbgVariable::getFrameIndexExprs() const {
return A.Expr->isFragment();
}) &&
"multiple FI expressions without DW_OP_LLVM_fragment");
llvm::sort(FrameIndexExprs.begin(), FrameIndexExprs.end(),
llvm::sort(FrameIndexExprs,
[](const FrameIndexExpr &A, const FrameIndexExpr &B) -> bool {
return A.Expr->getFragmentInfo()->OffsetInBits <
B.Expr->getFragmentInfo()->OffsetInBits;
@ -612,22 +612,21 @@ void DwarfDebug::constructAndAddImportedEntityDIE(DwarfCompileUnit &TheCU,
/// Sort and unique GVEs by comparing their fragment offset.
static SmallVectorImpl<DwarfCompileUnit::GlobalExpr> &
sortGlobalExprs(SmallVectorImpl<DwarfCompileUnit::GlobalExpr> &GVEs) {
llvm::sort(GVEs.begin(), GVEs.end(),
[](DwarfCompileUnit::GlobalExpr A,
DwarfCompileUnit::GlobalExpr B) {
// Sort order: first null exprs, then exprs without fragment
// info, then sort by fragment offset in bits.
// FIXME: Come up with a more comprehensive comparator so
// the sorting isn't non-deterministic, and so the following
// std::unique call works correctly.
if (!A.Expr || !B.Expr)
return !!B.Expr;
auto FragmentA = A.Expr->getFragmentInfo();
auto FragmentB = B.Expr->getFragmentInfo();
if (!FragmentA || !FragmentB)
return !!FragmentB;
return FragmentA->OffsetInBits < FragmentB->OffsetInBits;
});
llvm::sort(
GVEs, [](DwarfCompileUnit::GlobalExpr A, DwarfCompileUnit::GlobalExpr B) {
// Sort order: first null exprs, then exprs without fragment
// info, then sort by fragment offset in bits.
// FIXME: Come up with a more comprehensive comparator so
// the sorting isn't non-deterministic, and so the following
// std::unique call works correctly.
if (!A.Expr || !B.Expr)
return !!B.Expr;
auto FragmentA = A.Expr->getFragmentInfo();
auto FragmentB = B.Expr->getFragmentInfo();
if (!FragmentA || !FragmentB)
return !!FragmentB;
return FragmentA->OffsetInBits < FragmentB->OffsetInBits;
});
GVEs.erase(std::unique(GVEs.begin(), GVEs.end(),
[](DwarfCompileUnit::GlobalExpr A,
DwarfCompileUnit::GlobalExpr B) {
@ -2000,10 +1999,9 @@ void DwarfDebug::emitDebugARanges() {
}
// Sort the CU list (again, to ensure consistent output order).
llvm::sort(CUs.begin(), CUs.end(),
[](const DwarfCompileUnit *A, const DwarfCompileUnit *B) {
return A->getUniqueID() < B->getUniqueID();
});
llvm::sort(CUs, [](const DwarfCompileUnit *A, const DwarfCompileUnit *B) {
return A->getUniqueID() < B->getUniqueID();
});
// Emit an arange table for each CU we used.
for (DwarfCompileUnit *CU : CUs) {

6
lib/CodeGen/AsmPrinter/EHStreamer.cpp
View File

@ -359,9 +359,9 @@ void EHStreamer::emitExceptionTable() {
LandingPads.push_back(&PadInfos[i]);
// Order landing pads lexicographically by type id.
llvm::sort(LandingPads.begin(), LandingPads.end(),
[](const LandingPadInfo *L,
const LandingPadInfo *R) { return L->TypeIds < R->TypeIds; });
llvm::sort(LandingPads, [](const LandingPadInfo *L, const LandingPadInfo *R) {
return L->TypeIds < R->TypeIds;
});
// Compute the actions table and gather the first action index for each
// landing pad site.

3
lib/CodeGen/CodeGenPrepare.cpp
View File

@ -4989,8 +4989,7 @@ bool CodeGenPrepare::splitLargeGEPOffsets() {
return LargeOffsetGEPID[LHS.first] < LargeOffsetGEPID[RHS.first];
};
// Sorting all the GEPs of the same data structures based on the offsets.
llvm::sort(LargeOffsetGEPs.begin(), LargeOffsetGEPs.end(),
compareGEPOffset);
llvm::sort(LargeOffsetGEPs, compareGEPOffset);
LargeOffsetGEPs.erase(
std::unique(LargeOffsetGEPs.begin(), LargeOffsetGEPs.end()),
LargeOffsetGEPs.end());

2
lib/CodeGen/GlobalISel/LegalizerInfo.cpp
View File

@ -219,7 +219,7 @@ void LegalizerInfo::computeTables() {
Opcode, TypeIdx, ElementSize,
moreToWiderTypesAndLessToWidest(NumElementsActions));
}
llvm::sort(ElementSizesSeen.begin(), ElementSizesSeen.end());
llvm::sort(ElementSizesSeen);
SizeChangeStrategy VectorElementSizeChangeStrategy =
&unsupportedForDifferentSizes;
if (TypeIdx < VectorElementSizeChangeStrategies[OpcodeIdx].size() &&

2
lib/CodeGen/LocalStackSlotAllocation.cpp
View File

@ -328,7 +328,7 @@ bool LocalStackSlotPass::insertFrameReferenceRegisters(MachineFunction &Fn) {
// Sort the frame references by local offset.
// Use frame index as a tie-breaker in case MI's have the same offset.
llvm::sort(FrameReferenceInsns.begin(), FrameReferenceInsns.end());
llvm::sort(FrameReferenceInsns);
MachineBasicBlock *Entry = &Fn.front();

8
lib/CodeGen/MIRCanonicalizerPass.cpp
View File

@ -134,10 +134,10 @@ rescheduleLexographically(std::vector<MachineInstr *> instructions,
StringInstrMap.push_back({(i == std::string::npos) ? S : S.substr(i), II});
}
llvm::sort(StringInstrMap.begin(), StringInstrMap.end(),
[](const StringInstrPair &a, const StringInstrPair &b) -> bool {
return (a.first < b.first);
});
llvm::sort(StringInstrMap,
[](const StringInstrPair &a, const StringInstrPair &b) -> bool {
return (a.first < b.first);
});
for (auto &II : StringInstrMap) {

2
lib/CodeGen/MachineBasicBlock.cpp
View File

@ -461,7 +461,7 @@ bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
}
void MachineBasicBlock::sortUniqueLiveIns() {
llvm::sort(LiveIns.begin(), LiveIns.end(),
llvm::sort(LiveIns,
[](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) {
return LI0.PhysReg < LI1.PhysReg;
});

5
lib/CodeGen/MachinePipeliner.cpp
View File

@ -1861,8 +1861,7 @@ void SwingSchedulerDAG::registerPressureFilter(NodeSetType &NodeSets) {
RecRPTracker.closeBottom();
std::vector<SUnit *> SUnits(NS.begin(), NS.end());
llvm::sort(SUnits.begin(), SUnits.end(),
[](const SUnit *A, const SUnit *B) {
llvm::sort(SUnits, [](const SUnit *A, const SUnit *B) {
return A->NodeNum > B->NodeNum;
});
@ -3981,7 +3980,7 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const {
};
// sort, so that we can perform a binary search
llvm::sort(Indices.begin(), Indices.end(), CompareKey);
llvm::sort(Indices, CompareKey);
bool Valid = true;
(void)Valid;

2
lib/CodeGen/MachineScheduler.cpp
View File

@ -1554,7 +1554,7 @@ void BaseMemOpClusterMutation::clusterNeighboringMemOps(
if (MemOpRecords.size() < 2)
return;
llvm::sort(MemOpRecords.begin(), MemOpRecords.end());
llvm::sort(MemOpRecords);
unsigned ClusterLength = 1;
for (unsigned Idx = 0, End = MemOpRecords.size(); Idx < (End - 1); ++Idx) {
SUnit *SUa = MemOpRecords[Idx].SU;

2
lib/CodeGen/ReachingDefAnalysis.cpp
View File

@ -157,7 +157,7 @@ bool ReachingDefAnalysis::runOnMachineFunction(MachineFunction &mf) {
// Sorting all reaching defs found for a ceartin reg unit in a given BB.
for (MBBDefsInfo &MBBDefs : MBBReachingDefs) {
for (MBBRegUnitDefs &RegUnitDefs : MBBDefs)
llvm::sort(RegUnitDefs.begin(), RegUnitDefs.end());
llvm::sort(RegUnitDefs);
}
return false;

2
lib/CodeGen/ScheduleDAGInstrs.cpp
View File

@ -996,7 +996,7 @@ void ScheduleDAGInstrs::reduceHugeMemNodeMaps(Value2SUsMap &stores,
for (auto &I : loads)
for (auto *SU : I.second)
NodeNums.push_back(SU->NodeNum);
llvm::sort(NodeNums.begin(), NodeNums.end());
llvm::sort(NodeNums);
// The N last elements in NodeNums will be removed, and the SU with
// the lowest NodeNum of them will become the new BarrierChain to

10
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -13250,8 +13250,7 @@ static void adjustCostForPairing(SmallVectorImpl<LoadedSlice> &LoadedSlices,
// Sort the slices so that elements that are likely to be next to each
// other in memory are next to each other in the list.
llvm::sort(LoadedSlices.begin(), LoadedSlices.end(),
[](const LoadedSlice &LHS, const LoadedSlice &RHS) {
llvm::sort(LoadedSlices, [](const LoadedSlice &LHS, const LoadedSlice &RHS) {
assert(LHS.Origin == RHS.Origin && "Different bases not implemented.");
return LHS.getOffsetFromBase() < RHS.getOffsetFromBase();
});
@ -14247,10 +14246,9 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
// Sort the memory operands according to their distance from the
// base pointer.
llvm::sort(StoreNodes.begin(), StoreNodes.end(),
[](MemOpLink LHS, MemOpLink RHS) {
return LHS.OffsetFromBase < RHS.OffsetFromBase;
});
llvm::sort(StoreNodes, [](MemOpLink LHS, MemOpLink RHS) {
return LHS.OffsetFromBase < RHS.OffsetFromBase;
});
// Store Merge attempts to merge the lowest stores. This generally
// works out as if successful, as the remaining stores are checked

2
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
View File

@ -242,7 +242,7 @@ void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) {
return;
// Sort them in increasing order.
llvm::sort(Offsets.begin(), Offsets.end());
llvm::sort(Offsets);
// Check if the loads are close enough.
SmallVector<SDNode*, 4> Loads;

2
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -8016,7 +8016,7 @@ void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
}
// Sort the uses, so that all the uses from a given User are together.
llvm::sort(Uses.begin(), Uses.end());
llvm::sort(Uses);
for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
UseIndex != UseIndexEnd; ) {

7
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -2580,8 +2580,7 @@ void SelectionDAGBuilder::sortAndRangeify(CaseClusterVector &Clusters) {
assert(CC.Low == CC.High && "Input clusters must be single-case");
#endif
llvm::sort(Clusters.begin(), Clusters.end(),
[](const CaseCluster &a, const CaseCluster &b) {
llvm::sort(Clusters, [](const CaseCluster &a, const CaseCluster &b) {
return a.Low->getValue().slt(b.Low->getValue());
});
@ -6252,7 +6251,7 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
GA->getGlobal(), getCurSDLoc(),
Val.getValueType(), GA->getOffset())});
}
llvm::sort(Targets.begin(), Targets.end(),
llvm::sort(Targets,
[](const BranchFunnelTarget &T1, const BranchFunnelTarget &T2) {
return T1.Offset < T2.Offset;
});
@ -9670,7 +9669,7 @@ bool SelectionDAGBuilder::buildBitTests(CaseClusterVector &Clusters,
}
BitTestInfo BTI;
llvm::sort(CBV.begin(), CBV.end(), [](const CaseBits &a, const CaseBits &b) {
llvm::sort(CBV, [](const CaseBits &a, const CaseBits &b) {
// Sort by probability first, number of bits second, bit mask third.
if (a.ExtraProb != b.ExtraProb)
return a.ExtraProb > b.ExtraProb;

2
lib/CodeGen/SlotIndexes.cpp
View File

@ -95,7 +95,7 @@ bool SlotIndexes::runOnMachineFunction(MachineFunction &fn) {
}
// Sort the Idx2MBBMap
llvm::sort(idx2MBBMap.begin(), idx2MBBMap.end(), Idx2MBBCompare());
llvm::sort(idx2MBBMap, Idx2MBBCompare());
LLVM_DEBUG(mf->print(dbgs(), this));

2
lib/CodeGen/StackColoring.cpp
View File

@ -1231,7 +1231,7 @@ bool StackColoring::runOnMachineFunction(MachineFunction &Func) {
});
for (auto &s : LiveStarts)
llvm::sort(s.begin(), s.end());
llvm::sort(s);
bool Changed = true;
while (Changed) {

9
lib/CodeGen/StackMaps.cpp
View File

@ -268,11 +268,10 @@ StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
// in the list. Merge entries that refer to the same dwarf register and use
// the maximum size that needs to be spilled.
llvm::sort(LiveOuts.begin(), LiveOuts.end(),
[](const LiveOutReg &LHS, const LiveOutReg &RHS) {
// Only sort by the dwarf register number.
return LHS.DwarfRegNum < RHS.DwarfRegNum;
});
llvm::sort(LiveOuts, [](const LiveOutReg &LHS, const LiveOutReg &RHS) {
// Only sort by the dwarf register number.
return LHS.DwarfRegNum < RHS.DwarfRegNum;
});
for (auto I = LiveOuts.begin(), E = LiveOuts.end(); I != E; ++I) {
for (auto II = std::next(I); II != E; ++II) {

2
lib/CodeGen/StackSlotColoring.cpp
View File

@ -214,7 +214,7 @@ void StackSlotColoring::InitializeSlots() {
Intervals.reserve(LS->getNumIntervals());
for (auto &I : *LS)
Intervals.push_back(&I);
llvm::sort(Intervals.begin(), Intervals.end(),
llvm::sort(Intervals,
[](Pair *LHS, Pair *RHS) { return LHS->first < RHS->first; });
// Gather all spill slots into a list.

2
lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
View File

@ -79,7 +79,7 @@ Error DebugCrossModuleImportsSubsection::commit(
for (const auto &M : Mappings)
Ids.push_back(&M);
llvm::sort(Ids.begin(), Ids.end(), [this](const T &L1, const T &L2) {
llvm::sort(Ids, [this](const T &L1, const T &L2) {
return Strings.getIdForString(L1->getKey()) <
Strings.getIdForString(L2->getKey());
});

2
lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
View File

@ -91,7 +91,7 @@ std::vector<uint32_t> DebugStringTableSubsection::sortedIds() const {
Result.reserve(IdToString.size());
for (const auto &Entry : IdToString)
Result.push_back(Entry.first);
llvm::sort(Result.begin(), Result.end());
llvm::sort(Result);
return Result;
}

5
lib/DebugInfo/DWARF/DWARFContext.cpp
View File

@ -106,10 +106,11 @@ collectContributionData(DWARFContext::unit_iterator_range Units) {
// Sort the contributions so that any invalid ones are placed at
// the start of the contributions vector. This way they are reported
// first.
llvm::sort(Contributions.begin(), Contributions.end(),
llvm::sort(Contributions,
[](const Optional<StrOffsetsContributionDescriptor> &L,
const Optional<StrOffsetsContributionDescriptor> &R) {
if (L && R) return L->Base < R->Base;
if (L && R)
return L->Base < R->Base;
return R.hasValue();
});

2
lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
View File

@ -80,7 +80,7 @@ void DWARFDebugAranges::appendRange(uint32_t CUOffset, uint64_t LowPC,
void DWARFDebugAranges::construct() {
std::multiset<uint32_t> ValidCUs; // Maintain the set of CUs describing
// a current address range.
llvm::sort(Endpoints.begin(), Endpoints.end());
llvm::sort(Endpoints);
uint64_t PrevAddress = -1ULL;
for (const auto &E : Endpoints) {
if (PrevAddress < E.Address && !ValidCUs.empty()) {

2
lib/DebugInfo/DWARF/DWARFDebugLine.cpp
View File

@ -839,7 +839,7 @@ Error DWARFDebugLine::LineTable::parse(
// Sort all sequences so that address lookup will work faster.
if (!Sequences.empty()) {
llvm::sort(Sequences.begin(), Sequences.end(), Sequence::orderByLowPC);
llvm::sort(Sequences, Sequence::orderByLowPC);
// Note: actually, instruction address ranges of sequences should not
// overlap (in shared objects and executables). If they do, the address
// lookup would still work, though, but result would be ambiguous.

9
lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
View File

@ -144,11 +144,10 @@ void GSIHashStreamBuilder::finalizeBuckets(uint32_t RecordZeroOffset) {
// can properly early-out when it detects the record won't be found. The
// algorithm used here corredsponds to the function
// caseInsensitiveComparePchPchCchCch in the reference implementation.
llvm::sort(Bucket.begin(), Bucket.end(),
[](const std::pair<StringRef, PSHashRecord> &Left,
const std::pair<StringRef, PSHashRecord> &Right) {
return gsiRecordLess(Left.first, Right.first);
});
llvm::sort(Bucket, [](const std::pair<StringRef, PSHashRecord> &Left,
const std::pair<StringRef, PSHashRecord> &Right) {
return gsiRecordLess(Left.first, Right.first);
});
for (const auto &Entry : Bucket)
HashRecords.push_back(Entry.second);

2
lib/IR/AsmWriter.cpp
View File

@ -199,7 +199,7 @@ static void predictValueUseListOrderImpl(const Value *V, const Function *F,
!isa<GlobalVariable>(V) && !isa<Function>(V) && !isa<BasicBlock>(V);
if (auto *BA = dyn_cast<BlockAddress>(V))
ID = OM.lookup(BA->getBasicBlock()).first;
llvm::sort(List.begin(), List.end(), [&](const Entry &L, const Entry &R) {
llvm::sort(List, [&](const Entry &L, const Entry &R) {
const Use *LU = L.first;
const Use *RU = R.first;
if (LU == RU)

2
lib/IR/Attributes.cpp
View File

@ -658,7 +658,7 @@ AttributeSetNode *AttributeSetNode::get(LLVMContext &C,
FoldingSetNodeID ID;
SmallVector<Attribute, 8> SortedAttrs(Attrs.begin(), Attrs.end());
llvm::sort(SortedAttrs.begin(), SortedAttrs.end());
llvm::sort(SortedAttrs);
for (const auto Attr : SortedAttrs)
Attr.Profile(ID);

4
lib/IR/Metadata.cpp
View File

@ -237,7 +237,7 @@ void ReplaceableMetadataImpl::replaceAllUsesWith(Metadata *MD) {
// Copy out uses since UseMap will get touched below.
using UseTy = std::pair<void *, std::pair<OwnerTy, uint64_t>>;
SmallVector<UseTy, 8> Uses(UseMap.begin(), UseMap.end());
llvm::sort(Uses.begin(), Uses.end(), [](const UseTy &L, const UseTy &R) {
llvm::sort(Uses, [](const UseTy &L, const UseTy &R) {
return L.second.second < R.second.second;
});
for (const auto &Pair : Uses) {
@ -290,7 +290,7 @@ void ReplaceableMetadataImpl::resolveAllUses(bool ResolveUsers) {
// Copy out uses since UseMap could get touched below.
using UseTy = std::pair<void *, std::pair<OwnerTy, uint64_t>>;
SmallVector<UseTy, 8> Uses(UseMap.begin(), UseMap.end());
llvm::sort(Uses.begin(), Uses.end(), [](const UseTy &L, const UseTy &R) {
llvm::sort(Uses, [](const UseTy &L, const UseTy &R) {
return L.second.second < R.second.second;
});
UseMap.clear();

4
lib/IR/Verifier.cpp
View File

@ -2300,7 +2300,7 @@ void Verifier::visitBasicBlock(BasicBlock &BB) {
if (isa<PHINode>(BB.front())) {
SmallVector<BasicBlock*, 8> Preds(pred_begin(&BB), pred_end(&BB));
SmallVector<std::pair<BasicBlock*, Value*>, 8> Values;
llvm::sort(Preds.begin(), Preds.end());
llvm::sort(Preds);
for (const PHINode &PN : BB.phis()) {
// Ensure that PHI nodes have at least one entry!
Assert(PN.getNumIncomingValues() != 0,
@ -2318,7 +2318,7 @@ void Verifier::visitBasicBlock(BasicBlock &BB) {
for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i)
Values.push_back(
std::make_pair(PN.getIncomingBlock(i), PN.getIncomingValue(i)));
llvm::sort(Values.begin(), Values.end());
llvm::sort(Values);
for (unsigned i = 0, e = Values.size(); i != e; ++i) {
// Check to make sure that if there is more than one entry for a

11
lib/LTO/ThinLTOCodeGenerator.cpp
View File

@ -968,12 +968,11 @@ void ThinLTOCodeGenerator::run() {
std::vector<int> ModulesOrdering;
ModulesOrdering.resize(Modules.size());
std::iota(ModulesOrdering.begin(), ModulesOrdering.end(), 0);
llvm::sort(ModulesOrdering.begin(), ModulesOrdering.end(),
[&](int LeftIndex, int RightIndex) {
auto LSize = Modules[LeftIndex].getBuffer().size();
auto RSize = Modules[RightIndex].getBuffer().size();
return LSize > RSize;
});
llvm::sort(ModulesOrdering, [&](int LeftIndex, int RightIndex) {
auto LSize = Modules[LeftIndex].getBuffer().size();
auto RSize = Modules[RightIndex].getBuffer().size();
return LSize > RSize;
});
// Parallel optimizer + codegen
{

4
lib/MC/MachObjectWriter.cpp
View File

@ -597,8 +597,8 @@ void MachObjectWriter::computeSymbolTable(
}
// External and undefined symbols are required to be in lexicographic order.
llvm::sort(ExternalSymbolData.begin(), ExternalSymbolData.end());
llvm::sort(UndefinedSymbolData.begin(), UndefinedSymbolData.end());
llvm::sort(ExternalSymbolData);
llvm::sort(UndefinedSymbolData);
// Set the symbol indices.
Index = 0;

7
lib/MC/WinCOFFObjectWriter.cpp
View File

@ -558,10 +558,9 @@ void WinCOFFObjectWriter::writeSectionHeaders() {
std::vector<COFFSection *> Arr;
for (auto &Section : Sections)
Arr.push_back(Section.get());
llvm::sort(Arr.begin(), Arr.end(),
[](const COFFSection *A, const COFFSection *B) {
return A->Number < B->Number;
});
llvm::sort(Arr, [](const COFFSection *A, const COFFSection *B) {
return A->Number < B->Number;
});
for (auto &Section : Arr) {
if (Section->Number == -1)

7
lib/ProfileData/Coverage/CoverageMapping.cpp
View File

@ -83,7 +83,7 @@ Counter CounterExpressionBuilder::simplify(Counter ExpressionTree) {
return Counter::getZero();
// Group the terms by counter ID.
llvm::sort(Terms.begin(), Terms.end(), [](const Term &LHS, const Term &RHS) {
llvm::sort(Terms, [](const Term &LHS, const Term &RHS) {
return LHS.CounterID < RHS.CounterID;
});
@ -463,8 +463,7 @@ class SegmentBuilder {
/// Sort a nested sequence of regions from a single file.
static void sortNestedRegions(MutableArrayRef<CountedRegion> Regions) {
llvm::sort(Regions.begin(), Regions.end(), [](const CountedRegion &LHS,
const CountedRegion &RHS) {
llvm::sort(Regions, [](const CountedRegion &LHS, const CountedRegion &RHS) {
if (LHS.startLoc() != RHS.startLoc())
return LHS.startLoc() < RHS.startLoc();
if (LHS.endLoc() != RHS.endLoc())
@ -561,7 +560,7 @@ std::vector<StringRef> CoverageMapping::getUniqueSourceFiles() const {
for (const auto &Function : getCoveredFunctions())
Filenames.insert(Filenames.end(), Function.Filenames.begin(),
Function.Filenames.end());
llvm::sort(Filenames.begin(), Filenames.end());
llvm::sort(Filenames);
auto Last = std::unique(Filenames.begin(), Filenames.end());
Filenames.erase(Last, Filenames.end());
return Filenames;

2
lib/ProfileData/GCOV.cpp
View File

@ -712,7 +712,7 @@ void FileInfo::print(raw_ostream &InfoOS, StringRef MainFilename,
SmallVector<StringRef, 4> Filenames;
for (const auto &LI : LineInfo)
Filenames.push_back(LI.first());
llvm::sort(Filenames.begin(), Filenames.end());
llvm::sort(Filenames);
for (StringRef Filename : Filenames) {
auto AllLines = LineConsumer(Filename);

2
lib/ProfileData/ProfileSummaryBuilder.cpp
View File

@ -58,7 +58,7 @@ void SampleProfileSummaryBuilder::addRecord(
void ProfileSummaryBuilder::computeDetailedSummary() {
if (DetailedSummaryCutoffs.empty())
return;
llvm::sort(DetailedSummaryCutoffs.begin(), DetailedSummaryCutoffs.end());
llvm::sort(DetailedSummaryCutoffs);
auto Iter = CountFrequencies.begin();
const auto End = CountFrequencies.end();

2
lib/Support/JSON.cpp
View File

@ -517,7 +517,7 @@ static std::vector<const Object::value_type *> sortedElements(const Object &O) {
std::vector<const Object::value_type *> Elements;
for (const auto &E : O)
Elements.push_back(&E);
llvm::sort(Elements.begin(), Elements.end(),
llvm::sort(Elements,
[](const Object::value_type *L, const Object::value_type *R) {
return L->first < R->first;
});

2
lib/Support/SourceMgr.cpp
View File

@ -269,7 +269,7 @@ SMDiagnostic::SMDiagnostic(const SourceMgr &sm, SMLoc L, StringRef FN,
: SM(&sm), Loc(L), Filename(FN), LineNo(Line), ColumnNo(Col), Kind(Kind),
Message(Msg), LineContents(LineStr), Ranges(Ranges.vec()),
FixIts(Hints.begin(), Hints.end()) {
llvm::sort(FixIts.begin(), FixIts.end());
llvm::sort(FixIts);
}
static void buildFixItLine(std::string &CaretLine, std::string &FixItLine,

2
lib/Support/Timer.cpp
View File

@ -295,7 +295,7 @@ void TimerGroup::addTimer(Timer &T) {
void TimerGroup::PrintQueuedTimers(raw_ostream &OS) {
// Sort the timers in descending order by amount of time taken.
llvm::sort(TimersToPrint.begin(), TimersToPrint.end());
llvm::sort(TimersToPrint);
TimeRecord Total;
for (const PrintRecord &Record : TimersToPrint)

7
lib/TableGen/Record.cpp
View File

@ -158,10 +158,9 @@ RecordRecTy *RecordRecTy::get(ArrayRef<Record *> UnsortedClasses) {
SmallVector<Record *, 4> Classes(UnsortedClasses.begin(),
UnsortedClasses.end());
llvm::sort(Classes.begin(), Classes.end(),
[](Record *LHS, Record *RHS) {
return LHS->getNameInitAsString() < RHS->getNameInitAsString();
});
llvm::sort(Classes, [](Record *LHS, Record *RHS) {
return LHS->getNameInitAsString() < RHS->getNameInitAsString();
});
FoldingSetNodeID ID;
ProfileRecordRecTy(ID, Classes);

29
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
View File

@ -377,11 +377,10 @@ bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) {
// Now we have a set of sets, order them by start address so
// we can iterate over them sequentially.
llvm::sort(V.begin(), V.end(),
[](const std::vector<Chain*> &A,
const std::vector<Chain*> &B) {
return A.front()->startsBefore(B.front());
});
llvm::sort(V,
[](const std::vector<Chain *> &A, const std::vector<Chain *> &B) {
return A.front()->startsBefore(B.front());
});
// As we only have two colors, we can track the global (BB-level) balance of
// odds versus evens. We aim to keep this near zero to keep both execution
@ -453,16 +452,16 @@ bool AArch64A57FPLoadBalancing::colorChainSet(std::vector<Chain*> GV,
// change them to!
// Final tie-break with instruction order so pass output is stable (i.e. not
// dependent on malloc'd pointer values).
llvm::sort(GV.begin(), GV.end(), [](const Chain *G1, const Chain *G2) {
if (G1->size() != G2->size())
return G1->size() > G2->size();
if (G1->requiresFixup() != G2->requiresFixup())
return G1->requiresFixup() > G2->requiresFixup();
// Make sure startsBefore() produces a stable final order.
assert((G1 == G2 || (G1->startsBefore(G2) ^ G2->startsBefore(G1))) &&
"Starts before not total order!");
return G1->startsBefore(G2);
});
llvm::sort(GV, [](const Chain *G1, const Chain *G2) {
if (G1->size() != G2->size())
return G1->size() > G2->size();
if (G1->requiresFixup() != G2->requiresFixup())
return G1->requiresFixup() > G2->requiresFixup();
// Make sure startsBefore() produces a stable final order.
assert((G1 == G2 || (G1->startsBefore(G2) ^ G2->startsBefore(G1))) &&
"Starts before not total order!");
return G1->startsBefore(G2);
});
Color PreferredColor = Parity < 0 ? Color::Even : Color::Odd;
while (Chain *G = getAndEraseNext(PreferredColor, GV)) {

3
lib/Target/AMDGPU/GCNIterativeScheduler.cpp
View File

@ -434,8 +434,7 @@ void GCNIterativeScheduler::scheduleRegion(Region &R, Range &&Schedule,
// Sort recorded regions by pressure - highest at the front
void GCNIterativeScheduler::sortRegionsByPressure(unsigned TargetOcc) {
const auto &ST = MF.getSubtarget<GCNSubtarget>();
llvm::sort(Regions.begin(), Regions.end(),
[&ST, TargetOcc](const Region *R1, const Region *R2) {
llvm::sort(Regions, [&ST, TargetOcc](const Region *R1, const Region *R2) {
return R2->MaxPressure.less(ST, R1->MaxPressure, TargetOcc);
});
}

19
lib/Target/AMDGPU/SIFormMemoryClauses.cpp
View File

@ -168,16 +168,15 @@ void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask,
CoveringSubregs.push_back(Idx);
}
llvm::sort(CoveringSubregs.begin(), CoveringSubregs.end(),
[this](unsigned A, unsigned B) {
LaneBitmask MaskA = TRI->getSubRegIndexLaneMask(A);
LaneBitmask MaskB = TRI->getSubRegIndexLaneMask(B);
unsigned NA = MaskA.getNumLanes();
unsigned NB = MaskB.getNumLanes();
if (NA != NB)
return NA > NB;
return MaskA.getHighestLane() > MaskB.getHighestLane();
});
llvm::sort(CoveringSubregs, [this](unsigned A, unsigned B) {
LaneBitmask MaskA = TRI->getSubRegIndexLaneMask(A);
LaneBitmask MaskB = TRI->getSubRegIndexLaneMask(B);
unsigned NA = MaskA.getNumLanes();
unsigned NB = MaskB.getNumLanes();
if (NA != NB)
return NA > NB;
return MaskA.getHighestLane() > MaskB.getHighestLane();
});
for (unsigned Idx : CoveringSubregs) {
LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(Idx);

5
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -1444,9 +1444,8 @@ void ARMBaseInstrInfo::expandMEMCPY(MachineBasicBlock::iterator MI) const {
SmallVector<unsigned, 6> ScratchRegs;
for(unsigned I = 5; I < MI->getNumOperands(); ++I)
ScratchRegs.push_back(MI->getOperand(I).getReg());
llvm::sort(ScratchRegs.begin(), ScratchRegs.end(),
[&TRI](const unsigned &Reg1,
const unsigned &Reg2) -> bool {
llvm::sort(ScratchRegs,
[&TRI](const unsigned &Reg1, const unsigned &Reg2) -> bool {
return TRI.getEncodingValue(Reg1) <
TRI.getEncodingValue(Reg2);
});

5
lib/Target/ARM/ARMFrameLowering.cpp
View File

@ -1008,8 +1008,7 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
if (Regs.empty())
continue;
llvm::sort(Regs.begin(), Regs.end(), [&](const RegAndKill &LHS,
const RegAndKill &RHS) {
llvm::sort(Regs, [&](const RegAndKill &LHS, const RegAndKill &RHS) {
return TRI.getEncodingValue(LHS.first) < TRI.getEncodingValue(RHS.first);
});
@ -1105,7 +1104,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
if (Regs.empty())
continue;
llvm::sort(Regs.begin(), Regs.end(), [&](unsigned LHS, unsigned RHS) {
llvm::sort(Regs, [&](unsigned LHS, unsigned RHS) {
return TRI.getEncodingValue(LHS) < TRI.getEncodingValue(RHS);
});

15
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
View File

@ -1848,7 +1848,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
auto LessThan = [](const MergeCandidate* M0, const MergeCandidate *M1) {
return M0->InsertPos < M1->InsertPos;
};
llvm::sort(Candidates.begin(), Candidates.end(), LessThan);
llvm::sort(Candidates, LessThan);
// Go through list of candidates and merge.
bool Changed = false;
@ -2186,13 +2186,12 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
bool RetVal = false;
// Sort by offset (in reverse order).
llvm::sort(Ops.begin(), Ops.end(),
[](const MachineInstr *LHS, const MachineInstr *RHS) {
int LOffset = getMemoryOpOffset(*LHS);
int ROffset = getMemoryOpOffset(*RHS);
assert(LHS == RHS || LOffset != ROffset);
return LOffset > ROffset;
});
llvm::sort(Ops, [](const MachineInstr *LHS, const MachineInstr *RHS) {
int LOffset = getMemoryOpOffset(*LHS);
int ROffset = getMemoryOpOffset(*RHS);
assert(LHS == RHS || LOffset != ROffset);
return LOffset > ROffset;
});
// The loads / stores of the same base are in order. Scan them from first to
// last and check for the following:

2
lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -1072,7 +1072,7 @@ void ARMTargetELFStreamer::finishAttributeSection() {
if (Contents.empty())
return;
llvm::sort(Contents.begin(), Contents.end(), AttributeItem::LessTag);
llvm::sort(Contents, AttributeItem::LessTag);
ARMELFStreamer &Streamer = getStreamer();

7
lib/Target/Hexagon/HexagonConstExtenders.cpp
View File

@ -1947,10 +1947,9 @@ bool HCE::runOnMachineFunction(MachineFunction &MF) {
AssignmentMap IMap;
collect(MF);
llvm::sort(Extenders.begin(), Extenders.end(),
[](const ExtDesc &A, const ExtDesc &B) {
return ExtValue(A) < ExtValue(B);
});
llvm::sort(Extenders, [](const ExtDesc &A, const ExtDesc &B) {
return ExtValue(A) < ExtValue(B);
});
bool Changed = false;
LLVM_DEBUG(dbgs() << "Collected " << Extenders.size() << " extenders\n");

2
lib/Target/Hexagon/HexagonGenInsert.cpp
View File

@ -632,7 +632,7 @@ void HexagonGenInsert::buildOrderingBT(RegisterOrdering &RB,
SortableVectorType VRs;
for (RegisterOrdering::iterator I = RB.begin(), E = RB.end(); I != E; ++I)
VRs.push_back(I->first);
llvm::sort(VRs.begin(), VRs.end(), LexCmp);
llvm::sort(VRs, LexCmp);
// Transfer the results to the outgoing register ordering.
for (unsigned i = 0, n = VRs.size(); i < n; ++i)
RO.insert(std::make_pair(VRs[i], i));

2
lib/Target/Hexagon/HexagonStoreWidening.cpp
View File

@ -578,7 +578,7 @@ bool HexagonStoreWidening::processBasicBlock(MachineBasicBlock &MBB) {
};
for (auto &G : SGs) {
assert(G.size() > 1 && "Store group with fewer than 2 elements");
llvm::sort(G.begin(), G.end(), Less);
llvm::sort(G, Less);
Changed |= processStoreGroup(G);
}

2
lib/Target/Hexagon/RDFDeadCode.cpp
View File

@ -214,7 +214,7 @@ bool DeadCodeElimination::erase(const SetVector<NodeId> &Nodes) {
return false;
return A.Id < B.Id;
};
llvm::sort(DRNs.begin(), DRNs.end(), UsesFirst);
llvm::sort(DRNs, UsesFirst);
if (trace())
dbgs() << "Removing dead ref nodes:\n";

2
lib/Target/Hexagon/RDFGraph.cpp
View File

@ -1471,7 +1471,7 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
// and add a def for each S in the closure.
// Sort the refs so that the phis will be created in a deterministic order.
llvm::sort(MaxRefs.begin(), MaxRefs.end());
llvm::sort(MaxRefs);
// Remove duplicates.
auto NewEnd = std::unique(MaxRefs.begin(), MaxRefs.end());
MaxRefs.erase(NewEnd, MaxRefs.end());

6
lib/Target/Hexagon/RDFLiveness.cpp
View File

@ -207,7 +207,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
};
std::vector<NodeId> Tmp(Owners.begin(), Owners.end());
llvm::sort(Tmp.begin(), Tmp.end(), Less);
llvm::sort(Tmp, Less);
// The vector is a list of instructions, so that defs coming from
// the same instruction don't need to be artificially ordered.
@ -813,7 +813,7 @@ void Liveness::computeLiveIns() {
std::vector<RegisterRef> LV;
for (auto I = B.livein_begin(), E = B.livein_end(); I != E; ++I)
LV.push_back(RegisterRef(I->PhysReg, I->LaneMask));
llvm::sort(LV.begin(), LV.end());
llvm::sort(LV);
dbgs() << printMBBReference(B) << "\t rec = {";
for (auto I : LV)
dbgs() << ' ' << Print<RegisterRef>(I, DFG);
@ -824,7 +824,7 @@ void Liveness::computeLiveIns() {
const RegisterAggr &LG = LiveMap[&B];
for (auto I = LG.rr_begin(), E = LG.rr_end(); I != E; ++I)
LV.push_back(*I);
llvm::sort(LV.begin(), LV.end());
llvm::sort(LV);
dbgs() << "\tcomp = {";
for (auto I : LV)
dbgs() << ' ' << Print<RegisterRef>(I, DFG);

2
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -453,7 +453,7 @@ void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
return;
// Sort relocations by the address they are applied to.
llvm::sort(Relocs.begin(), Relocs.end(),
llvm::sort(Relocs,
[](const ELFRelocationEntry &A, const ELFRelocationEntry &B) {
return A.Offset < B.Offset;
});

2
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
View File

@ -1401,7 +1401,7 @@ class BitPermutationSelector {
for (auto &I : ValueRots) {
ValueRotsVec.push_back(I.second);
}
llvm::sort(ValueRotsVec.begin(), ValueRotsVec.end());
llvm::sort(ValueRotsVec);
}
// In 64-bit mode, rlwinm and friends have a rotation operator that

19
lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
View File

@ -118,16 +118,15 @@ bool WebAssemblyRegColoring::runOnMachineFunction(MachineFunction &MF) {
// registers), by weight next, and then by position.
// TODO: Investigate more intelligent sorting heuristics. For starters, we
// should try to coalesce adjacent live intervals before non-adjacent ones.
llvm::sort(SortedIntervals.begin(), SortedIntervals.end(),
[MRI](LiveInterval *LHS, LiveInterval *RHS) {
if (MRI->isLiveIn(LHS->reg) != MRI->isLiveIn(RHS->reg))
return MRI->isLiveIn(LHS->reg);
if (LHS->weight != RHS->weight)
return LHS->weight > RHS->weight;
if (LHS->empty() || RHS->empty())
return !LHS->empty() && RHS->empty();
return *LHS < *RHS;
});
llvm::sort(SortedIntervals, [MRI](LiveInterval *LHS, LiveInterval *RHS) {
if (MRI->isLiveIn(LHS->reg) != MRI->isLiveIn(RHS->reg))
return MRI->isLiveIn(LHS->reg);
if (LHS->weight != RHS->weight)
return LHS->weight > RHS->weight;
if (LHS->empty() || RHS->empty())
return !LHS->empty() && RHS->empty();
return *LHS < *RHS;
});
LLVM_DEBUG(dbgs() << "Coloring register intervals:\n");
SmallVector<unsigned, 16> SlotMapping(SortedIntervals.size(), -1u);

2
lib/Target/X86/X86SpeculativeLoadHardening.cpp
View File

@ -828,7 +828,7 @@ X86SpeculativeLoadHardeningPass::tracePredStateThroughCFG(
"split above!");
// Sort and unique the codes to minimize them.
llvm::sort(UncondCodeSeq.begin(), UncondCodeSeq.end());
llvm::sort(UncondCodeSeq);
UncondCodeSeq.erase(std::unique(UncondCodeSeq.begin(), UncondCodeSeq.end()),
UncondCodeSeq.end());

4
lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -151,7 +151,7 @@ static void GetSpillList(SmallVectorImpl<StackSlotInfo> &SpillList,
Offset,
FramePtr));
}
llvm::sort(SpillList.begin(), SpillList.end(), CompareSSIOffset);
llvm::sort(SpillList, CompareSSIOffset);
}
/// Creates an ordered list of EH info register 'spills'.
@ -170,7 +170,7 @@ static void GetEHSpillList(SmallVectorImpl<StackSlotInfo> &SpillList,
SpillList.push_back(
StackSlotInfo(EHSlot[0], MFI.getObjectOffset(EHSlot[1]),
TL->getExceptionSelectorRegister(PersonalityFn)));
llvm::sort(SpillList.begin(), SpillList.end(), CompareSSIOffset);
llvm::sort(SpillList, CompareSSIOffset);
}
static MachineMemOperand *getFrameIndexMMO(MachineBasicBlock &MBB,

2
lib/Target/XCore/XCoreLowerThreadLocal.cpp
View File

@ -129,7 +129,7 @@ createReplacementInstr(ConstantExpr *CE, Instruction *Instr) {
static bool replaceConstantExprOp(ConstantExpr *CE, Pass *P) {
do {
SmallVector<WeakTrackingVH, 8> WUsers(CE->user_begin(), CE->user_end());
llvm::sort(WUsers.begin(), WUsers.end());
llvm::sort(WUsers);
WUsers.erase(std::unique(WUsers.begin(), WUsers.end()), WUsers.end());
while (!WUsers.empty())
if (WeakTrackingVH WU = WUsers.pop_back_val()) {

2
lib/Transforms/Coroutines/CoroFrame.cpp
View File

@ -49,7 +49,7 @@ public:
BlockToIndexMapping(Function &F) {
for (BasicBlock &BB : F)
V.push_back(&BB);
llvm::sort(V.begin(), V.end());
llvm::sort(V);
}
size_t blockToIndex(BasicBlock *BB) const {

6
lib/Transforms/IPO/LowerTypeTests.cpp
View File

@ -1997,7 +1997,7 @@ bool LowerTypeTestsModule::lower() {
}
Sets.emplace_back(I, MaxUniqueId);
}
llvm::sort(Sets.begin(), Sets.end(),
llvm::sort(Sets,
[](const std::pair<GlobalClassesTy::iterator, unsigned> &S1,
const std::pair<GlobalClassesTy::iterator, unsigned> &S2) {
return S1.second < S2.second;
@ -2022,12 +2022,12 @@ bool LowerTypeTestsModule::lower() {
// Order type identifiers by unique ID for determinism. This ordering is
// stable as there is a one-to-one mapping between metadata and unique IDs.
llvm::sort(TypeIds.begin(), TypeIds.end(), [&](Metadata *M1, Metadata *M2) {
llvm::sort(TypeIds, [&](Metadata *M1, Metadata *M2) {
return TypeIdInfo[M1].UniqueId < TypeIdInfo[M2].UniqueId;
});
// Same for the branch funnels.
llvm::sort(ICallBranchFunnels.begin(), ICallBranchFunnels.end(),
llvm::sort(ICallBranchFunnels,
[&](ICallBranchFunnel *F1, ICallBranchFunnel *F2) {
return F1->UniqueId < F2->UniqueId;
});

26
lib/Transforms/IPO/SampleProfile.cpp
View File

@ -681,13 +681,12 @@ SampleProfileLoader::findIndirectCallFunctionSamples(
Sum += NameFS.second.getEntrySamples();
R.push_back(&NameFS.second);
}
llvm::sort(R.begin(), R.end(),
[](const FunctionSamples *L, const FunctionSamples *R) {
if (L->getEntrySamples() != R->getEntrySamples())
return L->getEntrySamples() > R->getEntrySamples();
return FunctionSamples::getGUID(L->getName()) <
FunctionSamples::getGUID(R->getName());
});
llvm::sort(R, [](const FunctionSamples *L, const FunctionSamples *R) {
if (L->getEntrySamples() != R->getEntrySamples())
return L->getEntrySamples() > R->getEntrySamples();
return FunctionSamples::getGUID(L->getName()) <
FunctionSamples::getGUID(R->getName());
});
}
return R;
}
@ -1174,13 +1173,12 @@ static SmallVector<InstrProfValueData, 2> SortCallTargets(
SmallVector<InstrProfValueData, 2> R;
for (auto I = M.begin(); I != M.end(); ++I)
R.push_back({FunctionSamples::getGUID(I->getKey()), I->getValue()});
llvm::sort(R.begin(), R.end(),
[](const InstrProfValueData &L, const InstrProfValueData &R) {
if (L.Count == R.Count)
return L.Value > R.Value;
else
return L.Count > R.Count;
});
llvm::sort(R, [](const InstrProfValueData &L, const InstrProfValueData &R) {
if (L.Count == R.Count)
return L.Value > R.Value;
else
return L.Count > R.Count;
});
return R;
}

8
lib/Transforms/Scalar/GVNHoist.cpp
View File

@ -748,11 +748,9 @@ private:
// TODO: Remove fully-redundant expressions.
// Get instruction from the Map, assume that all the Instructions
// with same VNs have same rank (this is an approximation).
llvm::sort(Ranks.begin(), Ranks.end(),
[this, &Map](const VNType &r1, const VNType &r2) {
return (rank(*Map.lookup(r1).begin()) <
rank(*Map.lookup(r2).begin()));
});
llvm::sort(Ranks, [this, &Map](const VNType &r1, const VNType &r2) {
return (rank(*Map.lookup(r1).begin()) < rank(*Map.lookup(r2).begin()));
});
// - Sort VNs according to their rank, and start with lowest ranked VN
// - Take a VN and for each instruction with same VN

4
lib/Transforms/Scalar/GVNSink.cpp
View File

@ -239,7 +239,7 @@ public:
SmallVector<std::pair<BasicBlock *, Value *>, 4> Ops;
for (unsigned I = 0, E = PN->getNumIncomingValues(); I != E; ++I)
Ops.push_back({PN->getIncomingBlock(I), PN->getIncomingValue(I)});
llvm::sort(Ops.begin(), Ops.end());
llvm::sort(Ops);
for (auto &P : Ops) {
Blocks.push_back(P.first);
Values.push_back(P.second);
@ -762,7 +762,7 @@ unsigned GVNSink::sinkBB(BasicBlock *BBEnd) {
}
if (Preds.size() < 2)
return 0;
llvm::sort(Preds.begin(), Preds.end());
llvm::sort(Preds);
unsigned NumOrigPreds = Preds.size();
// We can only sink instructions through unconditional branches.

5
lib/Transforms/Scalar/GuardWidening.cpp
View File

@ -698,9 +698,8 @@ bool GuardWideningImpl::combineRangeChecks(
// CurrentChecks.size() will typically be 3 here, but so far there has been
// no need to hard-code that fact.
llvm::sort(CurrentChecks.begin(), CurrentChecks.end(),
[&](const GuardWideningImpl::RangeCheck &LHS,
const GuardWideningImpl::RangeCheck &RHS) {
llvm::sort(CurrentChecks, [&](const GuardWideningImpl::RangeCheck &LHS,
const GuardWideningImpl::RangeCheck &RHS) {
return LHS.getOffsetValue().slt(RHS.getOffsetValue());
});

8
lib/Transforms/Scalar/LoopSink.cpp
View File

@ -208,11 +208,9 @@ static bool sinkInstruction(Loop &L, Instruction &I,
SmallVector<BasicBlock *, 2> SortedBBsToSinkInto;
SortedBBsToSinkInto.insert(SortedBBsToSinkInto.begin(), BBsToSinkInto.begin(),
BBsToSinkInto.end());
llvm::sort(SortedBBsToSinkInto.begin(), SortedBBsToSinkInto.end(),
[&](BasicBlock *A, BasicBlock *B) {
return LoopBlockNumber.find(A)->second <
LoopBlockNumber.find(B)->second;
});
llvm::sort(SortedBBsToSinkInto, [&](BasicBlock *A, BasicBlock *B) {
return LoopBlockNumber.find(A)->second < LoopBlockNumber.find(B)->second;
});
BasicBlock *MoveBB = *SortedBBsToSinkInto.begin();
// FIXME: Optimize the efficiency for cloned value replacement. The current

6
lib/Transforms/Scalar/LoopStrengthReduce.cpp
View File

@ -1487,7 +1487,7 @@ bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
SmallVector<const SCEV *, 4> Key = F.BaseRegs;
if (F.ScaledReg) Key.push_back(F.ScaledReg);
// Unstable sort by host order ok, because this is only used for uniquifying.
llvm::sort(Key.begin(), Key.end());
llvm::sort(Key);
return Uniquifier.count(Key);
}
@ -1511,7 +1511,7 @@ bool LSRUse::InsertFormula(const Formula &F, const Loop &L) {
SmallVector<const SCEV *, 4> Key = F.BaseRegs;
if (F.ScaledReg) Key.push_back(F.ScaledReg);
// Unstable sort by host order ok, because this is only used for uniquifying.
llvm::sort(Key.begin(), Key.end());
llvm::sort(Key);
if (!Uniquifier.insert(Key).second)
return false;
@ -4238,7 +4238,7 @@ void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
Key.push_back(F.ScaledReg);
// Unstable sort by host order ok, because this is only used for
// uniquifying.
llvm::sort(Key.begin(), Key.end());
llvm::sort(Key);
std::pair<BestFormulaeTy::const_iterator, bool> P =
BestFormulae.insert(std::make_pair(Key, FIdx));

7
lib/Transforms/Scalar/MergeICmps.cpp
View File

@ -465,10 +465,9 @@ BCECmpChain::BCECmpChain(const std::vector<BasicBlock *> &Blocks, PHINode &Phi,
#endif // MERGEICMPS_DOT_ON
// Reorder blocks by LHS. We can do that without changing the
// semantics because we are only accessing dereferencable memory.
llvm::sort(Comparisons_.begin(), Comparisons_.end(),
[](const BCECmpBlock &a, const BCECmpBlock &b) {
return a.Lhs() < b.Lhs();
});
llvm::sort(Comparisons_, [](const BCECmpBlock &a, const BCECmpBlock &b) {
return a.Lhs() < b.Lhs();
});
#ifdef MERGEICMPS_DOT_ON
errs() << "AFTER REORDERING:\n\n";
dump();

7
lib/Transforms/Scalar/NewGVN.cpp
View File

@ -959,8 +959,7 @@ static bool isCopyOfAPHI(const Value *V) {
// order. The BlockInstRange numbers are generated in an RPO walk of the basic
// blocks.
void NewGVN::sortPHIOps(MutableArrayRef<ValPair> Ops) const {
llvm::sort(Ops.begin(), Ops.end(),
[&](const ValPair &P1, const ValPair &P2) {
llvm::sort(Ops, [&](const ValPair &P1, const ValPair &P2) {
return BlockInstRange.lookup(P1.second).first <
BlockInstRange.lookup(P2.second).first;
});
@ -3955,7 +3954,7 @@ bool NewGVN::eliminateInstructions(Function &F) {
convertClassToDFSOrdered(*CC, DFSOrderedSet, UseCounts, ProbablyDead);
// Sort the whole thing.
llvm::sort(DFSOrderedSet.begin(), DFSOrderedSet.end());
llvm::sort(DFSOrderedSet);
for (auto &VD : DFSOrderedSet) {
int MemberDFSIn = VD.DFSIn;
int MemberDFSOut = VD.DFSOut;
@ -4118,7 +4117,7 @@ bool NewGVN::eliminateInstructions(Function &F) {
// If we have possible dead stores to look at, try to eliminate them.
if (CC->getStoreCount() > 0) {
convertClassToLoadsAndStores(*CC, PossibleDeadStores);
llvm::sort(PossibleDeadStores.begin(), PossibleDeadStores.end());
llvm::sort(PossibleDeadStores);
ValueDFSStack EliminationStack;
for (auto &VD : PossibleDeadStores) {
int MemberDFSIn = VD.DFSIn;

2
lib/Transforms/Scalar/PlaceSafepoints.cpp
View File

@ -524,7 +524,7 @@ bool PlaceSafepoints::runOnFunction(Function &F) {
};
// We need the order of list to be stable so that naming ends up stable
// when we split edges. This makes test cases much easier to write.
llvm::sort(PollLocations.begin(), PollLocations.end(), OrderByBBName);
llvm::sort(PollLocations, OrderByBBName);
// We can sometimes end up with duplicate poll locations. This happens if
// a single loop is visited more than once. The fact this happens seems

2
lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
View File

@ -1825,7 +1825,7 @@ static void relocationViaAlloca(
}
}
llvm::sort(Uses.begin(), Uses.end());
llvm::sort(Uses);
auto Last = std::unique(Uses.begin(), Uses.end());
Uses.erase(Last, Uses.end());

6
lib/Transforms/Scalar/SROA.cpp
View File

@ -1060,7 +1060,7 @@ AllocaSlices::AllocaSlices(const DataLayout &DL, AllocaInst &AI)
// Sort the uses. This arranges for the offsets to be in ascending order,
// and the sizes to be in descending order.
llvm::sort(Slices.begin(), Slices.end());
llvm::sort(Slices);
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
@ -1906,7 +1906,7 @@ static VectorType *isVectorPromotionViable(Partition &P, const DataLayout &DL) {
"All non-integer types eliminated!");
return RHSTy->getNumElements() < LHSTy->getNumElements();
};
llvm::sort(CandidateTys.begin(), CandidateTys.end(), RankVectorTypes);
llvm::sort(CandidateTys, RankVectorTypes);
CandidateTys.erase(
std::unique(CandidateTys.begin(), CandidateTys.end(), RankVectorTypes),
CandidateTys.end());
@ -4221,7 +4221,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
}
if (!IsSorted)
llvm::sort(AS.begin(), AS.end());
llvm::sort(AS);
/// Describes the allocas introduced by rewritePartition in order to migrate
/// the debug info.

9
lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
View File

@ -1265,11 +1265,10 @@ static void buildClonedLoops(Loop &OrigL, ArrayRef<BasicBlock *> ExitBlocks,
// matter as we're just trying to build up the map from inside-out; we use
// the map in a more stably ordered way below.
auto OrderedClonedExitsInLoops = ClonedExitsInLoops;
llvm::sort(OrderedClonedExitsInLoops.begin(), OrderedClonedExitsInLoops.end(),
[&](BasicBlock *LHS, BasicBlock *RHS) {
return ExitLoopMap.lookup(LHS)->getLoopDepth() <
ExitLoopMap.lookup(RHS)->getLoopDepth();
});
llvm::sort(OrderedClonedExitsInLoops, [&](BasicBlock *LHS, BasicBlock *RHS) {
return ExitLoopMap.lookup(LHS)->getLoopDepth() <
ExitLoopMap.lookup(RHS)->getLoopDepth();
});
// Populate the existing ExitLoopMap with everything reachable from each
// exit, starting from the inner most exit.

2
lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
View File

@ -161,7 +161,7 @@ void ImportedFunctionsInliningStatistics::dump(const bool Verbose) {
void ImportedFunctionsInliningStatistics::calculateRealInlines() {
// Removing duplicated Callers.
llvm::sort(NonImportedCallers.begin(), NonImportedCallers.end());
llvm::sort(NonImportedCallers);
NonImportedCallers.erase(
std::unique(NonImportedCallers.begin(), NonImportedCallers.end()),
NonImportedCallers.end());

2
lib/Transforms/Utils/LowerSwitch.cpp
View File

@ -372,7 +372,7 @@ unsigned LowerSwitch::Clusterify(CaseVector& Cases, SwitchInst *SI) {
Cases.push_back(CaseRange(Case.getCaseValue(), Case.getCaseValue(),
Case.getCaseSuccessor()));
llvm::sort(Cases.begin(), Cases.end(), CaseCmp());
llvm::sort(Cases, CaseCmp());
// Merge case into clusters
if (Cases.size() >= 2) {

2
lib/Transforms/Utils/PredicateInfo.cpp
View File

@ -569,7 +569,7 @@ void PredicateInfo::renameUses(SmallPtrSetImpl<Value *> &OpSet) {
auto Comparator = [&](const Value *A, const Value *B) {
return valueComesBefore(OI, A, B);
};
llvm::sort(OpsToRename.begin(), OpsToRename.end(), Comparator);
llvm::sort(OpsToRename, Comparator);
ValueDFS_Compare Compare(OI);
// Compute liveness, and rename in O(uses) per Op.
for (auto *Op : OpsToRename) {

11
lib/Transforms/Utils/PromoteMemoryToRegister.cpp
View File

@ -477,7 +477,7 @@ static bool promoteSingleBlockAlloca(AllocaInst *AI, const AllocaInfo &Info,
// Sort the stores by their index, making it efficient to do a lookup with a
// binary search.
llvm::sort(StoresByIndex.begin(), StoresByIndex.end(), less_first());
llvm::sort(StoresByIndex, less_first());
// Walk all of the loads from this alloca, replacing them with the nearest
// store above them, if any.
@ -638,10 +638,9 @@ void PromoteMem2Reg::run() {
SmallVector<BasicBlock *, 32> PHIBlocks;
IDF.calculate(PHIBlocks);
if (PHIBlocks.size() > 1)
llvm::sort(PHIBlocks.begin(), PHIBlocks.end(),
[this](BasicBlock *A, BasicBlock *B) {
return BBNumbers.lookup(A) < BBNumbers.lookup(B);
});
llvm::sort(PHIBlocks, [this](BasicBlock *A, BasicBlock *B) {
return BBNumbers.lookup(A) < BBNumbers.lookup(B);
});
unsigned CurrentVersion = 0;
for (BasicBlock *BB : PHIBlocks)
@ -752,7 +751,7 @@ void PromoteMem2Reg::run() {
// Ok, now we know that all of the PHI nodes are missing entries for some
// basic blocks. Start by sorting the incoming predecessors for efficient
// access.
llvm::sort(Preds.begin(), Preds.end());
llvm::sort(Preds);
// Now we loop through all BB's which have entries in SomePHI and remove
// them from the Preds list.

2
lib/Transforms/Utils/SimplifyCFG.cpp
View File

@ -5521,7 +5521,7 @@ static bool ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder,
SmallVector<int64_t,4> Values;
for (auto &C : SI->cases())
Values.push_back(C.getCaseValue()->getValue().getSExtValue());
llvm::sort(Values.begin(), Values.end());
llvm::sort(Values);
// If the switch is already dense, there's nothing useful to do here.
if (isSwitchDense(Values))

14
lib/Transforms/Utils/SplitModule.cpp
View File

@ -181,14 +181,12 @@ static void findPartitions(Module *M, ClusterIDMapType &ClusterIDMap,
std::make_pair(std::distance(GVtoClusterMap.member_begin(I),
GVtoClusterMap.member_end()), I));
llvm::sort(Sets.begin(), Sets.end(),
[](const SortType &a, const SortType &b) {
if (a.first == b.first)
return a.second->getData()->getName() >
b.second->getData()->getName();
else
return a.first > b.first;
});
llvm::sort(Sets, [](const SortType &a, const SortType &b) {
if (a.first == b.first)
return a.second->getData()->getName() > b.second->getData()->getName();
else
return a.first > b.first;
});
for (auto &I : Sets) {
unsigned CurrentClusterID = BalancinQueue.top().first;

2
tools/dsymutil/DwarfLinker.cpp
View File

@ -484,7 +484,7 @@ bool DwarfLinker::RelocationManager::findValidRelocs(
// the file, this allows us to just keep an index in the relocation
// array that we advance during our walk, rather than resorting to
// some associative container. See DwarfLinker::NextValidReloc.
llvm::sort(ValidRelocs.begin(), ValidRelocs.end());
llvm::sort(ValidRelocs);
return true;
}

2
tools/dsymutil/DwarfStreamer.cpp
View File

@ -320,7 +320,7 @@ void DwarfStreamer::emitUnitRangesEntries(CompileUnit &Unit,
// The object addresses where sorted, but again, the linked
// addresses might end up in a different order.
llvm::sort(Ranges.begin(), Ranges.end());
llvm::sort(Ranges);
if (!Ranges.empty()) {
MS->SwitchSection(MC->getObjectFileInfo()->getDwarfARangesSection());

2
tools/llvm-config/llvm-config.cpp
View File

@ -523,7 +523,7 @@ int main(int argc, char **argv) {
if (DyLibExists && !sys::fs::exists(path)) {
Components =
GetAllDyLibComponents(IsInDevelopmentTree, true, DirSep);
llvm::sort(Components.begin(), Components.end());
llvm::sort(Components);
break;
}
}

2
tools/llvm-dwarfdump/llvm-dwarfdump.cpp
View File

@ -358,7 +358,7 @@ static void filterByAccelName(ArrayRef<std::string> Names, DWARFContext &DICtx,
getDies(DICtx, DICtx.getAppleNamespaces(), Name, Dies);
getDies(DICtx, DICtx.getDebugNames(), Name, Dies);
}
llvm::sort(Dies.begin(), Dies.end());
llvm::sort(Dies);
Dies.erase(std::unique(Dies.begin(), Dies.end()), Dies.end());
for (DWARFDie Die : Dies)

16
tools/llvm-exegesis/lib/Analysis.cpp
View File

@ -668,10 +668,9 @@ void distributePressure(float RemainingPressure,
llvm::SmallVector<float, 32> &DensePressure) {
// Find the number of subunits with minimal pressure (they are at the
// front).
llvm::sort(Subunits.begin(), Subunits.end(),
[&DensePressure](const uint16_t A, const uint16_t B) {
return DensePressure[A] < DensePressure[B];
});
llvm::sort(Subunits, [&DensePressure](const uint16_t A, const uint16_t B) {
return DensePressure[A] < DensePressure[B];
});
const auto getPressureForSubunit = [&DensePressure,
&Subunits](size_t I) -> float & {
return DensePressure[Subunits[I]];
@ -718,11 +717,10 @@ std::vector<std::pair<uint16_t, float>> computeIdealizedProcResPressure(
llvm::SmallVector<llvm::MCWriteProcResEntry, 8> WPRS) {
// DensePressure[I] is the port pressure for Proc Resource I.
llvm::SmallVector<float, 32> DensePressure(SM.getNumProcResourceKinds());
llvm::sort(WPRS.begin(), WPRS.end(),
[](const llvm::MCWriteProcResEntry &A,
const llvm::MCWriteProcResEntry &B) {
return A.ProcResourceIdx < B.ProcResourceIdx;
});
llvm::sort(WPRS, [](const llvm::MCWriteProcResEntry &A,
const llvm::MCWriteProcResEntry &B) {
return A.ProcResourceIdx < B.ProcResourceIdx;
});
for (const llvm::MCWriteProcResEntry &WPR : WPRS) {
// Get units for the entry.
const llvm::MCProcResourceDesc *const ProcResDesc =

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