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R600/SI: Add intrinsic for retrieving the current thread ID

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Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186010
This commit is contained in:
Michel Danzer 2013-07-10 16:36:52 +00:00
parent 89ebe756dd
commit c2e06ddf2d
3 changed files with 25 additions and 2 deletions
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10
lib/Target/R600/SIInstructions.td
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@ -903,8 +903,8 @@ defm V_MAC_F32 : VOP2_32 <0x0000001f, "V_MAC_F32", []>;
defm V_MADMK_F32 : VOP2_32 <0x00000020, "V_MADMK_F32", []>;
defm V_MADAK_F32 : VOP2_32 <0x00000021, "V_MADAK_F32", []>;
//defm V_BCNT_U32_B32 : VOP2_32 <0x00000022, "V_BCNT_U32_B32", []>;
//defm V_MBCNT_LO_U32_B32 : VOP2_32 <0x00000023, "V_MBCNT_LO_U32_B32", []>;
//defm V_MBCNT_HI_U32_B32 : VOP2_32 <0x00000024, "V_MBCNT_HI_U32_B32", []>;
defm V_MBCNT_LO_U32_B32 : VOP2_32 <0x00000023, "V_MBCNT_LO_U32_B32", []>;
defm V_MBCNT_HI_U32_B32 : VOP2_32 <0x00000024, "V_MBCNT_HI_U32_B32", []>;
let isCommutable = 1, Defs = [VCC] in { // Carry-out goes to VCC
defm V_ADD_I32 : VOP2b_32 <0x00000025, "V_ADD_I32",
@ -1575,6 +1575,12 @@ def : Pat <
(V_RCP_IFLAG_F32_e32 (V_CVT_F32_U32_e32 $src0))))
>;
def : Pat <
(int_SI_tid),
(V_MBCNT_HI_U32_B32_e32 0xffffffff,
(V_MBCNT_LO_U32_B32_e64 0xffffffff, 0, 0, 0, 0, 0))
>;
/********** ================== **********/
/********** VOP3 Patterns **********/
/********** ================== **********/

1
lib/Target/R600/SIIntrinsics.td
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@ -14,6 +14,7 @@
let TargetPrefix = "SI", isTarget = 1 in {
def int_SI_tid : Intrinsic <[llvm_i32_ty], [], [IntrNoMem]>;
def int_SI_packf16 : Intrinsic <[llvm_i32_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_SI_export : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], []>;
def int_SI_load_const : Intrinsic <[llvm_float_ty], [llvm_v16i8_ty, llvm_i32_ty], [IntrNoMem]>;

16
test/CodeGen/R600/llvm.SI.tid.ll Normal file
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@ -0,0 +1,16 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_MBCNT_LO_U32_B32_e64
;CHECK: V_MBCNT_HI_U32_B32_e32
define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) "ShaderType"="0" {
main_body:
%4 = call i32 @llvm.SI.tid()
%5 = bitcast i32 %4 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %5, float %5, float %5, float %5)
ret void
}
declare i32 @llvm.SI.tid() readnone
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)