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[AMDGPU] Waitcnt pass: add debug options
- Add "amdgpu-waitcnt-forcezero" to force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) - Add debug counters to control force emit of s_waitcnt instrs; debug counters: si-insert-waitcnts-forceexp: force emit s_waitcnt expcnt(0) instrs si-insert-waitcnts-forcevm: force emit s_waitcnt lgkmcnt(0) instrs si-insert-waitcnts-forcelgkm: force emit s_waitcnt vmcnt(0) instrs - Add some debug statements Note that a variant of this patch was previously committed/reverted. Differential Revision: https://reviews.llvm.org/D45888 llvm-svn: 330862
This commit is contained in:
Mark Searles
parent
26d59be83d
commit
c35348c12e
@ -40,6 +40,7 @@
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/DebugCounter.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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@ -50,9 +51,21 @@
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#include <utility>
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#include <vector>
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using namespace llvm;
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#define DEBUG_TYPE "si-insert-waitcnts"
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using namespace llvm;
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DEBUG_COUNTER(ForceExpCounter, DEBUG_TYPE"-forceexp",
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"Force emit s_waitcnt expcnt(0) instrs");
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DEBUG_COUNTER(ForceLgkmCounter, DEBUG_TYPE"-forcelgkm",
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"Force emit s_waitcnt lgkmcnt(0) instrs");
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DEBUG_COUNTER(ForceVMCounter, DEBUG_TYPE"-forcevm",
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"Force emit s_waitcnt vmcnt(0) instrs");
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static cl::opt<unsigned> ForceEmitZeroFlag(
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"amdgpu-waitcnt-forcezero",
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cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)"),
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cl::init(0), cl::Hidden);
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namespace {
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@ -373,6 +386,9 @@ private:
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std::vector<std::unique_ptr<BlockWaitcntBrackets>> KillWaitBrackets;
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bool ForceEmitZeroWaitcnt;
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bool ForceEmitWaitcnt[NUM_INST_CNTS];
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public:
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static char ID;
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@ -397,6 +413,41 @@ public:
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llvm::make_unique<BlockWaitcntBrackets>(*Bracket));
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}
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bool isForceEmitWaitcnt() const {
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for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
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T = (enum InstCounterType)(T + 1))
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if (ForceEmitWaitcnt[T])
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return true;
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return false;
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}
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void setForceEmitWaitcnt() {
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// For non-debug builds, ForceEmitWaitcnt has been initialized to false;
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// For debug builds, get the debug counter info and adjust if need be
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#ifndef NDEBUG
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if (DebugCounter::isCounterSet(ForceExpCounter) &&
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DebugCounter::shouldExecute(ForceExpCounter)) {
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ForceEmitWaitcnt[EXP_CNT] = true;
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} else {
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ForceEmitWaitcnt[EXP_CNT] = false;
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}
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if (DebugCounter::isCounterSet(ForceLgkmCounter) &&
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DebugCounter::shouldExecute(ForceLgkmCounter)) {
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ForceEmitWaitcnt[LGKM_CNT] = true;
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} else {
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ForceEmitWaitcnt[LGKM_CNT] = false;
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}
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if (DebugCounter::isCounterSet(ForceVMCounter) &&
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DebugCounter::shouldExecute(ForceVMCounter)) {
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ForceEmitWaitcnt[VM_CNT] = true;
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} else {
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ForceEmitWaitcnt[VM_CNT] = false;
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}
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#endif // NDEBUG
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}
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bool mayAccessLDSThroughFlat(const MachineInstr &MI) const;
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void generateWaitcntInstBefore(MachineInstr &MI,
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BlockWaitcntBrackets *ScoreBrackets);
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@ -836,6 +887,10 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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// sc-merge. It is not a coincident that all these cases correspond to the
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// instructions that are skipped in the assembling loop.
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bool NeedLineMapping = false; // TODO: Check on this.
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setForceEmitWaitcnt();
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bool IsForceEmitWaitcnt = isForceEmitWaitcnt();
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if (MI.isDebugValue() &&
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// TODO: any other opcode?
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!NeedLineMapping) {
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@ -1047,9 +1102,6 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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} // End of for loop that looks at all dest operands.
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}
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// TODO: Tie force zero to a compiler triage option.
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bool ForceZero = false;
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// Check to see if this is an S_BARRIER, and if an implicit S_WAITCNT 0
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// occurs before the instruction. Doing it here prevents any additional
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// S_WAITCNTs from being emitted if the instruction was marked as
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@ -1076,17 +1128,17 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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// block, so if we only wait on LGKM here, we might end up with
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// another s_waitcnt inserted right after this if there are non-LGKM
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// instructions still outstanding.
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ForceZero = true;
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ForceEmitZeroWaitcnt = true;
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EmitWaitcnt = true;
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}
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}
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// Does this operand processing indicate s_wait counter update?
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if (EmitWaitcnt) {
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if (EmitWaitcnt || IsForceEmitWaitcnt) {
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int CntVal[NUM_INST_CNTS];
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bool UseDefaultWaitcntStrategy = true;
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if (ForceZero) {
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if (ForceEmitZeroWaitcnt) {
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// Force all waitcnts to 0.
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for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
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T = (enum InstCounterType)(T + 1)) {
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@ -1123,7 +1175,7 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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}
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// If we are not waiting on any counter we can skip the wait altogether.
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if (EmitWaitcnt != 0) {
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if (EmitWaitcnt != 0 || IsForceEmitWaitcnt) {
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MachineInstr *OldWaitcnt = ScoreBrackets->getWaitcnt();
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int Imm = (!OldWaitcnt) ? 0 : OldWaitcnt->getOperand(0).getImm();
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if (!OldWaitcnt ||
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@ -1151,8 +1203,10 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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}
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// Update an existing waitcount, or make a new one.
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unsigned Enc = AMDGPU::encodeWaitcnt(IV, CntVal[VM_CNT],
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CntVal[EXP_CNT], CntVal[LGKM_CNT]);
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unsigned Enc = AMDGPU::encodeWaitcnt(IV,
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ForceEmitWaitcnt[VM_CNT] ? 0 : CntVal[VM_CNT],
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ForceEmitWaitcnt[EXP_CNT] ? 0 : CntVal[EXP_CNT],
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ForceEmitWaitcnt[LGKM_CNT] ? 0 : CntVal[LGKM_CNT]);
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// We don't remove waitcnts that existed prior to the waitcnt
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// pass. Check if the waitcnt to-be-inserted can be avoided
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// or if the prev waitcnt can be updated.
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@ -1178,6 +1232,11 @@ void SIInsertWaitcnts::generateWaitcntInstBefore(
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}
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if (insertSWaitInst) {
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if (OldWaitcnt && OldWaitcnt->getOpcode() == AMDGPU::S_WAITCNT) {
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if (ForceEmitZeroWaitcnt)
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DEBUG(dbgs() << "Force emit s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n");
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if (IsForceEmitWaitcnt)
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DEBUG(dbgs() << "Force emit a s_waitcnt due to debug counter\n");
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OldWaitcnt->getOperand(0).setImm(Enc);
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if (!OldWaitcnt->getParent())
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MI.getParent()->insert(MI, OldWaitcnt);
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@ -1603,7 +1662,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
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BlockWaitcntBrackets *ScoreBrackets = BlockWaitcntBracketsMap[&Block].get();
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DEBUG({
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dbgs() << "Block" << Block.getNumber();
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dbgs() << "*** Block" << Block.getNumber() << " ***";
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ScoreBrackets->dump();
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});
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@ -1769,6 +1828,11 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
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const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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AMDGPUASI = ST->getAMDGPUAS();
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ForceEmitZeroWaitcnt = ForceEmitZeroFlag;
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for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
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T = (enum InstCounterType)(T + 1))
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ForceEmitWaitcnt[T] = false;
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HardwareLimits.VmcntMax = AMDGPU::getVmcntBitMask(IV);
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HardwareLimits.ExpcntMax = AMDGPU::getExpcntBitMask(IV);
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HardwareLimits.LgkmcntMax = AMDGPU::getLgkmcntBitMask(IV);
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41
test/CodeGen/AMDGPU/waitcnt-debug.mir
Normal file
41
test/CodeGen/AMDGPU/waitcnt-debug.mir
Normal file
@ -0,0 +1,41 @@
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# REQUIRES: asserts
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -debug-counter=si-insert-waitcnts-forcelgkm-count=1 -o - %s | FileCheck -check-prefixes=GCN,LGKM %s
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -debug-counter=si-insert-waitcnts-forceexp-count=2 -o - %s | FileCheck -check-prefixes=GCN,EXP %s
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -debug-counter=si-insert-waitcnts-forcevm-count=3 -o - %s | FileCheck -check-prefixes=GCN,VM %s
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcezero=1 -debug-counter=si-insert-waitcnts-forcevm-count=2 -o - %s | FileCheck -check-prefixes=GCN,ZERO %s
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# check that the waitcnt pass options that force insertion of waitcnt instructions are working as expected
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...
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# GCN-LABEL: name: waitcnt-debug
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# LGKM: S_WAITCNT 127
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# LGKM-NEXT: S_NOP 0
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# LGKM-NEXT: S_NOP 0
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# EXP: S_WAITCNT 3855
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# EXP-NEXT: S_NOP 0
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# EXP-NEXT: S_WAITCNT 3855
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# EXP-NEXT: S_NOP 0
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# VM: S_WAITCNT 3952
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# VM-NEXT: S_NOP 0
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# VM-NEXT: S_WAITCNT 3952
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# VM-NEXT: S_NOP 0
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# VM-NEXT: S_WAITCNT 3952
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# VM-NEXT: S_NOP 0
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# ZERO: S_WAITCNT 0
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# ZERO-NEXT: S_WAITCNT 0
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# ZERO-NEXT: S_NOP 0
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# ZERO-NEXT: S_WAITCNT 0
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# ZERO-NEXT: S_NOP 0
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name: waitcnt-debug
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liveins:
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body: |
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bb.0:
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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...
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