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Implement the constantexpr CAST instruction correctly
llvm-svn: 5875
This commit is contained in:
Chris Lattner
parent
9938a43aac
commit
c40d8cd8cd
@ -192,6 +192,11 @@ namespace {
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Value *Src, User::op_iterator IdxBegin,
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User::op_iterator IdxEnd, unsigned TargetReg);
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/// emitCastOperation - Common code shared between visitCastInst and
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/// constant expression cast support.
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void emitCastOperation(MachineBasicBlock *BB,MachineBasicBlock::iterator&IP,
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Value *Src, const Type *DestTy, unsigned TargetReg);
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/// copyConstantToRegister - Output the instructions required to put the
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/// specified constant into the specified register.
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///
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@ -307,10 +312,8 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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emitGEPOperation(MBB, IP, CE->getOperand(0),
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CE->op_begin()+1, CE->op_end(), R);
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return;
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} else if (CE->getOpcode() == Instruction::Cast &&
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isa<PointerType>(CE->getType()) &&
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isa<PointerType>(CE->getOperand(0)->getType())) {
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copyConstantToRegister(MBB, IP, cast<Constant>(CE->getOperand(0)), R);
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} else if (CE->getOpcode() == Instruction::Cast) {
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emitCastOperation(MBB, IP, CE->getOperand(0), CE->getType(), R);
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return;
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}
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@ -446,7 +449,7 @@ void ISel::SelectPHINodes() {
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// Loop over all of the PHI nodes in the LLVM basic block...
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unsigned NumPHIs = 0;
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for (BasicBlock::const_iterator I = BB->begin();
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PHINode *PN = (PHINode*)dyn_cast<PHINode>(&*I); ++I) {
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PHINode *PN = (PHINode*)dyn_cast<PHINode>(I); ++I) {
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// Create a new machine instr PHI node, and insert it.
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unsigned PHIReg = getReg(*PN);
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@ -1387,22 +1390,30 @@ void ISel::visitStoreInst(StoreInst &I) {
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/// visitCastInst - Here we have various kinds of copying with or without
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/// sign extension going on.
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void ISel::visitCastInst(CastInst &CI) {
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const Type *DestTy = CI.getType();
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Value *Src = CI.getOperand(0);
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unsigned DestReg = getReg(CI);
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MachineBasicBlock::iterator MI = BB->end();
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emitCastOperation(BB, MI, CI.getOperand(0), CI.getType(), DestReg);
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}
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/// emitCastOperation - Common code shared between visitCastInst and
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/// constant expression cast support.
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void ISel::emitCastOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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Value *Src, const Type *DestTy,
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unsigned DestReg) {
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unsigned SrcReg = getReg(Src);
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const Type *SrcTy = Src->getType();
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unsigned SrcClass = getClassB(SrcTy);
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unsigned DestReg = getReg(CI);
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unsigned DestClass = getClassB(DestTy);
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// Implement casts to bool by using compare on the operand followed by set if
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// not zero on the result.
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if (DestTy == Type::BoolTy) {
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if (SrcClass == cFP || SrcClass == cLong)
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visitInstruction(CI);
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abort(); // FIXME: implement cast (long & FP) to bool
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BuildMI(BB, X86::CMPri8, 2).addReg(SrcReg).addZImm(0);
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BuildMI(BB, X86::SETNEr, 1, DestReg);
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BMI(BB, IP, X86::CMPri8, 2).addReg(SrcReg).addZImm(0);
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BMI(BB, IP, X86::SETNEr, 1, DestReg);
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return;
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}
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@ -1414,11 +1425,11 @@ void ISel::visitCastInst(CastInst &CI) {
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// getClass) by using a register-to-register move.
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if (SrcClass == DestClass) {
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if (SrcClass <= cInt || (SrcClass == cFP && SrcTy == DestTy)) {
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BuildMI(BB, RegRegMove[SrcClass], 1, DestReg).addReg(SrcReg);
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BMI(BB, IP, RegRegMove[SrcClass], 1, DestReg).addReg(SrcReg);
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} else if (SrcClass == cFP) {
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if (SrcTy == Type::FloatTy) { // double -> float
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assert(DestTy == Type::DoubleTy && "Unknown cFP member!");
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BuildMI(BB, X86::FpMOV, 1, DestReg).addReg(SrcReg);
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BMI(BB, IP, X86::FpMOV, 1, DestReg).addReg(SrcReg);
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} else { // float -> double
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assert(SrcTy == Type::DoubleTy && DestTy == Type::FloatTy &&
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"Unknown cFP member!");
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@ -1426,14 +1437,14 @@ void ISel::visitCastInst(CastInst &CI) {
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// reading it back.
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unsigned FltAlign = TM.getTargetData().getFloatAlignment();
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int FrameIdx = F->getFrameInfo()->CreateStackObject(4, FltAlign);
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addFrameReference(BuildMI(BB, X86::FSTr32, 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BuildMI(BB, X86::FLDr32, 5, DestReg), FrameIdx);
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addFrameReference(BMI(BB, IP, X86::FSTr32, 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BMI(BB, IP, X86::FLDr32, 5, DestReg), FrameIdx);
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}
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} else if (SrcClass == cLong) {
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BuildMI(BB, X86::MOVrr32, 1, DestReg).addReg(SrcReg);
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BuildMI(BB, X86::MOVrr32, 1, DestReg+1).addReg(SrcReg+1);
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BMI(BB, IP, X86::MOVrr32, 1, DestReg).addReg(SrcReg);
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BMI(BB, IP, X86::MOVrr32, 1, DestReg+1).addReg(SrcReg+1);
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} else {
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visitInstruction(CI);
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abort();
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}
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return;
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}
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@ -1451,21 +1462,21 @@ void ISel::visitCastInst(CastInst &CI) {
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};
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bool isUnsigned = SrcTy->isUnsigned();
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BuildMI(BB, Opc[isUnsigned][SrcClass + DestClass - 1], 1,
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DestReg).addReg(SrcReg);
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BMI(BB, IP, Opc[isUnsigned][SrcClass + DestClass - 1], 1,
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DestReg).addReg(SrcReg);
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if (isLong) { // Handle upper 32 bits as appropriate...
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if (isUnsigned) // Zero out top bits...
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BuildMI(BB, X86::MOVir32, 1, DestReg+1).addZImm(0);
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BMI(BB, IP, X86::MOVir32, 1, DestReg+1).addZImm(0);
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else // Sign extend bottom half...
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BuildMI(BB, X86::SARir32, 2, DestReg+1).addReg(DestReg).addZImm(31);
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BMI(BB, IP, X86::SARir32, 2, DestReg+1).addReg(DestReg).addZImm(31);
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}
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return;
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}
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// Special case long -> int ...
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if (SrcClass == cLong && DestClass == cInt) {
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BuildMI(BB, X86::MOVrr32, 1, DestReg).addReg(SrcReg);
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BMI(BB, IP, X86::MOVrr32, 1, DestReg).addReg(SrcReg);
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return;
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}
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@ -1474,8 +1485,8 @@ void ISel::visitCastInst(CastInst &CI) {
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if ((SrcClass <= cInt || SrcClass == cLong) && DestClass <= cInt
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&& SrcClass > DestClass) {
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static const unsigned AReg[] = { X86::AL, X86::AX, X86::EAX, 0, X86::EAX };
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BuildMI(BB, RegRegMove[SrcClass], 1, AReg[SrcClass]).addReg(SrcReg);
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BuildMI(BB, RegRegMove[DestClass], 1, DestReg).addReg(AReg[DestClass]);
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BMI(BB, IP, RegRegMove[SrcClass], 1, AReg[SrcClass]).addReg(SrcReg);
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BMI(BB, IP, RegRegMove[DestClass], 1, DestReg).addReg(AReg[DestClass]);
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return;
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}
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@ -1484,14 +1495,14 @@ void ISel::visitCastInst(CastInst &CI) {
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// unsigned int -> load as 64 bit int.
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// unsigned long long -> more complex
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if (SrcTy->isUnsigned() && SrcTy != Type::UByteTy)
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visitInstruction(CI); // don't handle unsigned src yet!
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abort(); // don't handle unsigned src yet!
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// We don't have the facilities for directly loading byte sized data from
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// memory. Promote it to 16 bits.
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if (SrcClass == cByte) {
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unsigned TmpReg = makeAnotherReg(Type::ShortTy);
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BuildMI(BB, SrcTy->isSigned() ? X86::MOVSXr16r8 : X86::MOVZXr16r8,
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1, TmpReg).addReg(SrcReg);
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BMI(BB, IP, SrcTy->isSigned() ? X86::MOVSXr16r8 : X86::MOVZXr16r8,
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1, TmpReg).addReg(SrcReg);
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SrcTy = Type::ShortTy; // Pretend the short is our input now!
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SrcClass = cShort;
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SrcReg = TmpReg;
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@ -1502,18 +1513,18 @@ void ISel::visitCastInst(CastInst &CI) {
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F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData());
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if (SrcClass == cLong) {
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if (SrcTy == Type::ULongTy) visitInstruction(CI);
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addFrameReference(BuildMI(BB, X86::MOVrm32, 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BuildMI(BB, X86::MOVrm32, 5),
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if (SrcTy == Type::ULongTy) abort(); // FIXME: Handle ulong -> FP
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addFrameReference(BMI(BB, IP, X86::MOVrm32, 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BMI(BB, IP, X86::MOVrm32, 5),
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FrameIdx, 4).addReg(SrcReg+1);
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} else {
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static const unsigned Op1[] = { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32 };
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addFrameReference(BuildMI(BB, Op1[SrcClass], 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BMI(BB, IP, Op1[SrcClass], 5), FrameIdx).addReg(SrcReg);
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}
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static const unsigned Op2[] =
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{ 0, X86::FILDr16, X86::FILDr32, 0, X86::FILDr64 };
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addFrameReference(BuildMI(BB, Op2[SrcClass], 5, DestReg), FrameIdx);
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addFrameReference(BMI(BB, IP, Op2[SrcClass], 5, DestReg), FrameIdx);
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return;
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}
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@ -1523,20 +1534,20 @@ void ISel::visitCastInst(CastInst &CI) {
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// mode when truncating to an integer value.
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//
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int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2);
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addFrameReference(BuildMI(BB, X86::FNSTCWm16, 4), CWFrameIdx);
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addFrameReference(BMI(BB, IP, X86::FNSTCWm16, 4), CWFrameIdx);
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// Load the old value of the high byte of the control word...
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unsigned HighPartOfCW = makeAnotherReg(Type::UByteTy);
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addFrameReference(BuildMI(BB, X86::MOVmr8, 4, HighPartOfCW), CWFrameIdx, 1);
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addFrameReference(BMI(BB, IP, X86::MOVmr8, 4, HighPartOfCW), CWFrameIdx, 1);
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// Set the high part to be round to zero...
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addFrameReference(BuildMI(BB, X86::MOVim8, 5), CWFrameIdx, 1).addZImm(12);
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addFrameReference(BMI(BB, IP, X86::MOVim8, 5), CWFrameIdx, 1).addZImm(12);
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// Reload the modified control word now...
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addFrameReference(BuildMI(BB, X86::FLDCWm16, 4), CWFrameIdx);
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addFrameReference(BMI(BB, IP, X86::FLDCWm16, 4), CWFrameIdx);
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// Restore the memory image of control word to original value
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addFrameReference(BuildMI(BB, X86::MOVrm8, 5),
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addFrameReference(BMI(BB, IP, X86::MOVrm8, 5),
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CWFrameIdx, 1).addReg(HighPartOfCW);
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// We don't have the facilities for directly storing byte sized data to
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@ -1549,7 +1560,7 @@ void ISel::visitCastInst(CastInst &CI) {
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case cByte: StoreTy = Type::ShortTy; StoreClass = cShort; break;
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case cShort: StoreTy = Type::IntTy; StoreClass = cInt; break;
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case cInt: StoreTy = Type::LongTy; StoreClass = cLong; break;
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case cLong: visitInstruction(CI); // unsigned long long -> more complex
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case cLong: abort(); // FIXME: unsigned long long -> more complex
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default: assert(0 && "Unknown store class!");
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}
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@ -1559,23 +1570,23 @@ void ISel::visitCastInst(CastInst &CI) {
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static const unsigned Op1[] =
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{ 0, X86::FISTr16, X86::FISTr32, 0, X86::FISTPr64 };
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addFrameReference(BuildMI(BB, Op1[StoreClass], 5), FrameIdx).addReg(SrcReg);
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addFrameReference(BMI(BB, IP, Op1[StoreClass], 5), FrameIdx).addReg(SrcReg);
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if (DestClass == cLong) {
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addFrameReference(BuildMI(BB, X86::MOVmr32, 4, DestReg), FrameIdx);
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addFrameReference(BuildMI(BB, X86::MOVmr32, 4, DestReg+1), FrameIdx, 4);
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addFrameReference(BMI(BB, IP, X86::MOVmr32, 4, DestReg), FrameIdx);
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addFrameReference(BMI(BB, IP, X86::MOVmr32, 4, DestReg+1), FrameIdx, 4);
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} else {
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static const unsigned Op2[] = { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32 };
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addFrameReference(BuildMI(BB, Op2[DestClass], 4, DestReg), FrameIdx);
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addFrameReference(BMI(BB, IP, Op2[DestClass], 4, DestReg), FrameIdx);
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}
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// Reload the original control word now...
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addFrameReference(BuildMI(BB, X86::FLDCWm16, 4), CWFrameIdx);
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addFrameReference(BMI(BB, IP, X86::FLDCWm16, 4), CWFrameIdx);
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return;
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}
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// Anything we haven't handled already, we can't (yet) handle at all.
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visitInstruction (CI);
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abort();
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}
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// ExactLog2 - This function solves for (Val == 1 << (N-1)) and returns N. It
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