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Tidy.
llvm-svn: 106383
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059880161b
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@ -72,7 +72,7 @@ ValueEnumerator::ValueEnumerator(const Module *M) {
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// Enumerate types used by the type symbol table.
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EnumerateTypeSymbolTable(M->getTypeSymbolTable());
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// Insert constants and metadata that are named at module level into the slot
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// Insert constants and metadata that are named at module level into the slot
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// pool so that the module symbol table can refer to them...
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EnumerateValueSymbolTable(M->getValueSymbolTable());
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EnumerateMDSymbolTable(M->getMDSymbolTable());
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@ -994,7 +994,7 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
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if (TII->ReverseBranchCondition(Cond))
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assert(false && "Unable to reverse branch condition!");
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// Initialize liveins to the first BB. These are potentiall re-defined by
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// Initialize liveins to the first BB. These are potentiall redefined by
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// predicated instructions.
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SmallSet<unsigned, 4> Redefs;
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InitPredRedefs(CvtBBI->BB, Redefs, TRI);
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@ -1085,7 +1085,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
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}
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}
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// Initialize liveins to the first BB. These are potentiall re-defined by
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// Initialize liveins to the first BB. These are potentially redefined by
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// predicated instructions.
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SmallSet<unsigned, 4> Redefs;
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InitPredRedefs(CvtBBI->BB, Redefs, TRI);
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@ -1205,7 +1205,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
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// Remove the conditional branch from entry to the blocks.
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BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
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// Initialize liveins to the first BB. These are potentiall re-defined by
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// Initialize liveins to the first BB. These are potentiall redefined by
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// predicated instructions.
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SmallSet<unsigned, 4> Redefs;
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InitPredRedefs(BBI1->BB, Redefs, TRI);
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@ -1307,7 +1307,7 @@ void IfConverter::PredicateBlock(BBInfo &BBI,
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llvm_unreachable(0);
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}
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// If the predicated instruction now re-defines a register as the result of
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// If the predicated instruction now redefines a register as the result of
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// if-conversion, add an implicit kill.
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UpdatePredRedefs(I, Redefs, TRI, true);
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}
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@ -1348,7 +1348,7 @@ void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
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}
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}
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// If the predicated instruction now re-defines a register as the result of
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// If the predicated instruction now redefines a register as the result of
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// if-conversion, add an implicit kill.
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UpdatePredRedefs(MI, Redefs, TRI, true);
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}
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@ -312,7 +312,7 @@ GlobalAlias *Module::getNamedAlias(StringRef Name) const {
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/// getNamedMetadata - Return the first NamedMDNode in the module with the
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/// specified name. This method returns null if a NamedMDNode with the
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//// specified name is not found.
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/// specified name is not found.
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NamedMDNode *Module::getNamedMetadata(StringRef Name) const {
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return NamedMDSymTab->lookup(Name);
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}
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@ -320,7 +320,7 @@ NamedMDNode *Module::getNamedMetadata(StringRef Name) const {
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NamedMDNode *Module::getNamedMetadataUsingTwine(Twine Name) const {
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SmallString<256> NameData;
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StringRef NameRef = Name.toStringRef(NameData);
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return NamedMDSymTab->lookup(NameRef);
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return NamedMDSymTab->lookup(NameRef);
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}
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/// getOrInsertNamedMetadata - Return the first named MDNode in the module
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