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AMDGPU/SI: Don't promote to vector if the load/store is volatile.

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Summary:
  We should not change volatile loads/stores in promoting alloca to vector.

Reviewers:
  arsenm

Differential Revision:
  http://reviews.llvm.org/D33107

llvm-svn: 302943
This commit is contained in:
Changpeng Fang 2017-05-12 20:31:12 +00:00
parent 86a30cc8d4
commit c5587a9cbd
2 changed files with 11 additions and 8 deletions
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7
lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
View File

@ -397,14 +397,17 @@ static Value* GEPToVectorIndex(GetElementPtrInst *GEP) {
// instructions. // instructions.
static bool canVectorizeInst(Instruction *Inst, User *User) { static bool canVectorizeInst(Instruction *Inst, User *User) {
switch (Inst->getOpcode()) { switch (Inst->getOpcode()) {
case Instruction::Load: case Instruction::Load: {
LoadInst *LI = cast<LoadInst>(Inst);
return !LI->isVolatile();
}
case Instruction::BitCast: case Instruction::BitCast:
case Instruction::AddrSpaceCast: case Instruction::AddrSpaceCast:
return true; return true;
case Instruction::Store: { case Instruction::Store: {
// Must be the stored pointer operand, not a stored value. // Must be the stored pointer operand, not a stored value.
StoreInst *SI = cast<StoreInst>(Inst); StoreInst *SI = cast<StoreInst>(Inst);
return SI->getPointerOperand() == User; return (SI->getPointerOperand() == User) && !SI->isVolatile();
} }
default: default:
return false; return false;

12
test/CodeGen/AMDGPU/promote-alloca-volatile.ll
View File

@ -1,26 +1,26 @@
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-promote-alloca < %s | FileCheck %s ; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-promote-alloca < %s | FileCheck %s
; CHECK-LABEL: @volatile_load( ; CHECK-LABEL: @volatile_load(
; CHECK: alloca [5 x i32] ; CHECK: alloca [4 x i32]
; CHECK: load volatile i32, i32* ; CHECK: load volatile i32, i32*
define amdgpu_kernel void @volatile_load(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) { define amdgpu_kernel void @volatile_load(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
entry: entry:
%stack = alloca [5 x i32], align 4 %stack = alloca [4 x i32], align 4
%tmp = load i32, i32 addrspace(1)* %in, align 4 %tmp = load i32, i32 addrspace(1)* %in, align 4
%arrayidx1 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 %tmp %arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32]* %stack, i32 0, i32 %tmp
%load = load volatile i32, i32* %arrayidx1 %load = load volatile i32, i32* %arrayidx1
store i32 %load, i32 addrspace(1)* %out store i32 %load, i32 addrspace(1)* %out
ret void ret void
} }
; CHECK-LABEL: @volatile_store( ; CHECK-LABEL: @volatile_store(
; CHECK: alloca [5 x i32] ; CHECK: alloca [4 x i32]
; CHECK: store volatile i32 %tmp, i32* ; CHECK: store volatile i32 %tmp, i32*
define amdgpu_kernel void @volatile_store(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) { define amdgpu_kernel void @volatile_store(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
entry: entry:
%stack = alloca [5 x i32], align 4 %stack = alloca [4 x i32], align 4
%tmp = load i32, i32 addrspace(1)* %in, align 4 %tmp = load i32, i32 addrspace(1)* %in, align 4
%arrayidx1 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 %tmp %arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32]* %stack, i32 0, i32 %tmp
store volatile i32 %tmp, i32* %arrayidx1 store volatile i32 %tmp, i32* %arrayidx1
ret void ret void
} }