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In the below scenario, we must be able to skip the a DBG_VALUE instruction and
remove the dead store. %vreg0<def> = L2_loadri_io <fi#15>, 0; mem:LD4[%dataF](align=4) DBG_VALUE %vreg0, %noreg, !"dataF", <!184>; IntRegs:%vreg0 S2_storeri_io <fi#15>, 0, %vreg0; mem:ST4[%dataF] In reality, this kind of stores are eliminated before Stack Slot Coloring pass, possibly in instruction lowering Differential Revision: https://reviews.llvm.org/D26616 llvm-svn: 291455
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@ -381,7 +381,6 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
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I != E; ++I) {
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if (DCELimit != -1 && (int)NumDead >= DCELimit)
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break;
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int FirstSS, SecondSS;
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if (TII->isStackSlotCopy(*I, FirstSS, SecondSS) && FirstSS == SecondSS &&
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FirstSS != -1) {
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@ -392,12 +391,18 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
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}
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MachineBasicBlock::iterator NextMI = std::next(I);
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if (NextMI == MBB->end()) continue;
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MachineBasicBlock::iterator ProbableLoadMI = I;
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unsigned LoadReg = 0;
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unsigned StoreReg = 0;
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if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS)))
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continue;
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// Skip the ...pseudo debugging... instructions between a load and store.
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while ((NextMI != E) && NextMI->isDebugValue()) {
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++NextMI;
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++I;
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}
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if (NextMI == E) continue;
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if (!(StoreReg = TII->isStoreToStackSlot(*NextMI, SecondSS)))
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continue;
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if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
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@ -407,7 +412,7 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
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if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) {
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++NumDead;
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toErase.push_back(&*I);
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toErase.push_back(&*ProbableLoadMI);
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}
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toErase.push_back(&*NextMI);
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