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[MachineVerifier] Add TiedOpsRewritten flag to fix verify two-address error
Summary: Currently, MachineVerifier will attempt to verify that tied operands satisfy register constraints as soon as the function is no longer in SSA form. However, PHIElimination will take the function out of SSA form while TwoAddressInstructionPass will actually rewrite tied operands to match the constraints. PHIElimination runs first in the pipeline. Therefore, whenever the MachineVerifier is run after PHIElimination, it will encounter verification errors on any tied operands. This patch adds a function property called TiedOpsRewritten that will be set by TwoAddressInstructionPass and will control when the verifier checks tied operands. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D80538
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@ -144,6 +144,8 @@ public:
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// operands, this also means that all generic virtual registers have been
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// operands, this also means that all generic virtual registers have been
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// constrained to virtual registers (assigned to register classes) and that
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// constrained to virtual registers (assigned to register classes) and that
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// all sizes attached to them have been eliminated.
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// all sizes attached to them have been eliminated.
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// TiedOpsRewritten: The twoaddressinstruction pass will set this flag, it
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// means that tied-def have been rewritten to meet the RegConstraint.
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enum class Property : unsigned {
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enum class Property : unsigned {
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IsSSA,
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IsSSA,
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NoPHIs,
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NoPHIs,
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@ -153,7 +155,8 @@ public:
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Legalized,
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Legalized,
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RegBankSelected,
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RegBankSelected,
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Selected,
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Selected,
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LastProperty = Selected,
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TiedOpsRewritten,
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LastProperty = TiedOpsRewritten,
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};
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};
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bool hasProperty(Property P) const {
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bool hasProperty(Property P) const {
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@ -98,6 +98,7 @@ static const char *getPropertyName(MachineFunctionProperties::Property Prop) {
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case P::RegBankSelected: return "RegBankSelected";
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case P::RegBankSelected: return "RegBankSelected";
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case P::Selected: return "Selected";
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case P::Selected: return "Selected";
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case P::TracksLiveness: return "TracksLiveness";
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case P::TracksLiveness: return "TracksLiveness";
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case P::TiedOpsRewritten: return "TiedOpsRewritten";
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}
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}
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llvm_unreachable("Invalid machine function property");
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llvm_unreachable("Invalid machine function property");
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}
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}
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@ -1633,10 +1633,17 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
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}
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}
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}
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}
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// Verify two-address constraints after leaving SSA form.
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// Verify two-address constraints after the twoaddressinstruction pass.
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// Both twoaddressinstruction pass and phi-node-elimination pass call
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// MRI->leaveSSA() to set MF as NoSSA, we should do the verification after
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// twoaddressinstruction pass not after phi-node-elimination pass. So we
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// shouldn't use the NoSSA as the condition, we should based on
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// TiedOpsRewritten property to verify two-address constraints, this
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// property will be set in twoaddressinstruction pass.
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unsigned DefIdx;
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unsigned DefIdx;
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if (!MRI->isSSA() && MO->isUse() &&
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if (MF->getProperties().hasProperty(
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MI->isRegTiedToDefOperand(MONum, &DefIdx) &&
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MachineFunctionProperties::Property::TiedOpsRewritten) &&
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MO->isUse() && MI->isRegTiedToDefOperand(MONum, &DefIdx) &&
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Reg != MI->getOperand(DefIdx).getReg())
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Reg != MI->getOperand(DefIdx).getReg())
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report("Two-address instruction operands must be identical", MO, MONum);
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report("Two-address instruction operands must be identical", MO, MONum);
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@ -1687,6 +1687,10 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &Func) {
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// This pass takes the function out of SSA form.
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// This pass takes the function out of SSA form.
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MRI->leaveSSA();
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MRI->leaveSSA();
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// This pass will rewrite the tied-def to meet the RegConstraint.
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MF->getProperties()
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.set(MachineFunctionProperties::Property::TiedOpsRewritten);
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TiedOperandMap TiedOperands;
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TiedOperandMap TiedOperands;
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for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
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for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
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MBBI != MBBE; ++MBBI) {
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MBBI != MBBE; ++MBBI) {
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@ -1,5 +1,5 @@
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# RUN: not --crash llc -mtriple=ppc32-- %s -run-pass=phi-node-elimination \
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# RUN: llc -mtriple=ppc32-- %s -run-pass=phi-node-elimination \
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# RUN: -verify-machineinstrs -o /dev/null 2>&1 | FileCheck %s
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# RUN: -verify-machineinstrs -o /dev/null 2>&1
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# RUN: llc -mtriple=ppc32-- %s -start-before=phi-node-elimination \
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# RUN: llc -mtriple=ppc32-- %s -start-before=phi-node-elimination \
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# RUN: -verify-machineinstrs -o /dev/null 2>&1
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# RUN: -verify-machineinstrs -o /dev/null 2>&1
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@ -89,9 +89,12 @@ body: |
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...
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...
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# CHECK-LABEL: Bad machine code: Two-address instruction operands must be identical
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# Used to result in
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# CHECK-NEXT: - function: VerifyTwoAddressCrash
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#
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# CHECK-NEXT: - basic block: %bb.0
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# Bad machine code: Two-address instruction operands must be identical
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# CHECK-NEXT: - instruction: %10:gprc = RLWIMI killed %9:gprc(tied-def 0), killed %0:gprc, 1, 0, 30
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# - function: VerifyTwoAddressCrash
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# CHECK-NEXT: - operand 1: killed %9:gprc(tied-def 0)
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# - basic block: %bb.0
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# CHECK-NEXT: LLVM ERROR: Found 1 machine code errors.
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# - instruction: %10:gprc = RLWIMI killed %9:gprc(tied-def 0), killed %0:gprc, 1, 0, 30
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# - operand 1: killed %9:gprc(tied-def 0)
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# LLVM ERROR: Found 1 machine code errors.
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# Just verify that we do not crash (or get verifier error).
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