From c65a70eec16671452875cc5151f8dda7f8989c44 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Wed, 15 May 2019 10:24:38 +0000 Subject: [PATCH] [NFC][InstCombine] Regenerate trunc.ll test llvm-svn: 360759 --- test/Transforms/InstCombine/trunc.ll | 112 ++++++++++++++------------- 1 file changed, 57 insertions(+), 55 deletions(-) diff --git a/test/Transforms/InstCombine/trunc.ll b/test/Transforms/InstCombine/trunc.ll index 01d53ab9840..bff2fc3770f 100644 --- a/test/Transforms/InstCombine/trunc.ll +++ b/test/Transforms/InstCombine/trunc.ll @@ -8,8 +8,8 @@ declare void @use(i32) define i64 @test1(i64 %a) { ; CHECK-LABEL: @test1( -; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32 -; CHECK-NEXT: [[C:%.*]] = and i64 %a, 15 +; CHECK-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32 +; CHECK-NEXT: [[C:%.*]] = and i64 [[A]], 15 ; CHECK-NEXT: call void @use(i32 [[B]]) ; CHECK-NEXT: ret i64 [[C]] ; @@ -22,8 +22,8 @@ define i64 @test1(i64 %a) { define i64 @test2(i64 %a) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32 -; CHECK-NEXT: [[D1:%.*]] = shl i64 %a, 36 +; CHECK-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32 +; CHECK-NEXT: [[D1:%.*]] = shl i64 [[A]], 36 ; CHECK-NEXT: [[D:%.*]] = ashr exact i64 [[D1]], 36 ; CHECK-NEXT: call void @use(i32 [[B]]) ; CHECK-NEXT: ret i64 [[D]] @@ -38,8 +38,8 @@ define i64 @test2(i64 %a) { define i64 @test3(i64 %a) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32 -; CHECK-NEXT: [[C:%.*]] = and i64 %a, 8 +; CHECK-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32 +; CHECK-NEXT: [[C:%.*]] = and i64 [[A]], 8 ; CHECK-NEXT: call void @use(i32 [[B]]) ; CHECK-NEXT: ret i64 [[C]] ; @@ -52,8 +52,8 @@ define i64 @test3(i64 %a) { define i64 @test4(i64 %a) { ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32 -; CHECK-NEXT: [[C:%.*]] = and i64 %a, 8 +; CHECK-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32 +; CHECK-NEXT: [[C:%.*]] = and i64 [[A]], 8 ; CHECK-NEXT: [[X:%.*]] = xor i64 [[C]], 8 ; CHECK-NEXT: call void @use(i32 [[B]]) ; CHECK-NEXT: ret i64 [[X]] @@ -68,8 +68,8 @@ define i64 @test4(i64 %a) { define i32 @test5(i32 %A) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[C:%.*]] = lshr i32 %A, 16 -; CHECK-NEXT: ret i32 [[C]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[A:%.*]], 16 +; CHECK-NEXT: ret i32 [[TMP1]] ; %B = zext i32 %A to i128 %C = lshr i128 %B, 16 @@ -79,8 +79,8 @@ define i32 @test5(i32 %A) { define i32 @test6(i64 %A) { ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[C:%.*]] = lshr i64 %A, 32 -; CHECK-NEXT: [[D:%.*]] = trunc i64 [[C]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[A:%.*]], 32 +; CHECK-NEXT: [[D:%.*]] = trunc i64 [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[D]] ; %B = zext i64 %A to i128 @@ -93,11 +93,12 @@ define i32 @test6(i64 %A) { ; but does contain sign bits, where the sign bit is not known to be zero. define i16 @ashr_mul_sign_bits(i8 %X, i8 %Y) { ; CHECK-LABEL: @ashr_mul_sign_bits( -; CHECK-NEXT: [[A:%.*]] = sext i8 %X to i16 -; CHECK-NEXT: [[B:%.*]] = sext i8 %Y to i16 +; CHECK-NEXT: [[A:%.*]] = sext i8 [[X:%.*]] to i16 +; CHECK-NEXT: [[B:%.*]] = sext i8 [[Y:%.*]] to i16 ; CHECK-NEXT: [[C:%.*]] = mul nsw i16 [[A]], [[B]] ; CHECK-NEXT: [[D:%.*]] = ashr i16 [[C]], 3 ; CHECK-NEXT: ret i16 [[D]] +; %A = sext i8 %X to i32 %B = sext i8 %Y to i32 %C = mul i32 %A, %B @@ -108,11 +109,12 @@ define i16 @ashr_mul_sign_bits(i8 %X, i8 %Y) { define i16 @ashr_mul(i8 %X, i8 %Y) { ; CHECK-LABEL: @ashr_mul( -; CHECK-NEXT: [[A:%.*]] = sext i8 %X to i16 -; CHECK-NEXT: [[B:%.*]] = sext i8 %Y to i16 +; CHECK-NEXT: [[A:%.*]] = sext i8 [[X:%.*]] to i16 +; CHECK-NEXT: [[B:%.*]] = sext i8 [[Y:%.*]] to i16 ; CHECK-NEXT: [[C:%.*]] = mul nsw i16 [[A]], [[B]] ; CHECK-NEXT: [[D:%.*]] = ashr i16 [[C]], 8 ; CHECK-NEXT: ret i16 [[D]] +; %A = sext i8 %X to i20 %B = sext i8 %Y to i20 %C = mul i20 %A, %B @@ -149,7 +151,7 @@ define <2 x i32> @trunc_ashr_vec(<2 x i32> %X) { define i92 @test7(i64 %A) { ; CHECK-LABEL: @test7( -; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 %A, 32 +; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[A:%.*]], 32 ; CHECK-NEXT: [[D:%.*]] = zext i64 [[TMP1]] to i92 ; CHECK-NEXT: ret i92 [[D]] ; @@ -161,8 +163,8 @@ define i92 @test7(i64 %A) { define i64 @test8(i32 %A, i32 %B) { ; CHECK-LABEL: @test8( -; CHECK-NEXT: [[TMP38:%.*]] = zext i32 %A to i64 -; CHECK-NEXT: [[TMP32:%.*]] = zext i32 %B to i64 +; CHECK-NEXT: [[TMP38:%.*]] = zext i32 [[A:%.*]] to i64 +; CHECK-NEXT: [[TMP32:%.*]] = zext i32 [[B:%.*]] to i64 ; CHECK-NEXT: [[TMP33:%.*]] = shl nuw i64 [[TMP32]], 32 ; CHECK-NEXT: [[INS35:%.*]] = or i64 [[TMP33]], [[TMP38]] ; CHECK-NEXT: ret i64 [[INS35]] @@ -177,7 +179,7 @@ define i64 @test8(i32 %A, i32 %B) { define i8 @test9(i32 %X) { ; CHECK-LABEL: @test9( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %X to i8 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 ; CHECK-NEXT: [[Z:%.*]] = and i8 [[TMP1]], 42 ; CHECK-NEXT: ret i8 [[Z]] ; @@ -189,7 +191,7 @@ define i8 @test9(i32 %X) { ; rdar://8808586 define i8 @test10(i32 %X) { ; CHECK-LABEL: @test10( -; CHECK-NEXT: [[Y:%.*]] = trunc i32 %X to i8 +; CHECK-NEXT: [[Y:%.*]] = trunc i32 [[X:%.*]] to i8 ; CHECK-NEXT: [[Z:%.*]] = and i8 [[Y]], 42 ; CHECK-NEXT: ret i8 [[Z]] ; @@ -204,7 +206,7 @@ define i8 @test10(i32 %X) { define i32 @trunc_bitcast1(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast1( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> %v, i32 1 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 1 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 @@ -217,7 +219,7 @@ define i32 @trunc_bitcast1(<4 x i32> %v) { define i32 @trunc_bitcast2(<2 x i64> %v) { ; CHECK-LABEL: @trunc_bitcast2( -; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i64> %v to <4 x i32> +; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i64> [[V:%.*]] to <4 x i32> ; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i32 2 ; CHECK-NEXT: ret i32 [[EXT]] ; @@ -231,7 +233,7 @@ define i32 @trunc_bitcast2(<2 x i64> %v) { define i32 @trunc_bitcast3(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast3( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> %v, i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 @@ -241,7 +243,7 @@ define i32 @trunc_bitcast3(<4 x i32> %v) { define i32 @trunc_shl_31_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_31_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -252,7 +254,7 @@ define i32 @trunc_shl_31_i32_i64(i64 %val) { define i32 @trunc_shl_nsw_31_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_nsw_31_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -263,7 +265,7 @@ define i32 @trunc_shl_nsw_31_i32_i64(i64 %val) { define i32 @trunc_shl_nuw_31_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_nuw_31_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -274,7 +276,7 @@ define i32 @trunc_shl_nuw_31_i32_i64(i64 %val) { define i32 @trunc_shl_nsw_nuw_31_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_nsw_nuw_31_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -285,7 +287,7 @@ define i32 @trunc_shl_nsw_nuw_31_i32_i64(i64 %val) { define i16 @trunc_shl_15_i16_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_15_i16_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i16 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i16 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i16 [[VAL_TR]], 15 ; CHECK-NEXT: ret i16 [[TRUNC]] ; @@ -296,7 +298,7 @@ define i16 @trunc_shl_15_i16_i64(i64 %val) { define i16 @trunc_shl_15_i16_i32(i32 %val) { ; CHECK-LABEL: @trunc_shl_15_i16_i32( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i32 %val to i16 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i32 [[VAL:%.*]] to i16 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i16 [[VAL_TR]], 15 ; CHECK-NEXT: ret i16 [[TRUNC]] ; @@ -307,7 +309,7 @@ define i16 @trunc_shl_15_i16_i32(i32 %val) { define i8 @trunc_shl_7_i8_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_7_i8_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i8 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i8 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i8 [[VAL_TR]], 7 ; CHECK-NEXT: ret i8 [[TRUNC]] ; @@ -318,7 +320,7 @@ define i8 @trunc_shl_7_i8_i64(i64 %val) { define i2 @trunc_shl_1_i2_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_1_i2_i64( -; CHECK-NEXT: [[SHL:%.*]] = shl i64 %val, 1 +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[VAL:%.*]], 1 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHL]] to i2 ; CHECK-NEXT: ret i2 [[TRUNC]] ; @@ -329,7 +331,7 @@ define i2 @trunc_shl_1_i2_i64(i64 %val) { define i32 @trunc_shl_1_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_1_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 1 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -340,7 +342,7 @@ define i32 @trunc_shl_1_i32_i64(i64 %val) { define i32 @trunc_shl_16_i32_i64(i64 %val) { ; CHECK-LABEL: @trunc_shl_16_i32_i64( -; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32 +; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 [[VAL:%.*]] to i32 ; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 16 ; CHECK-NEXT: ret i32 [[TRUNC]] ; @@ -370,7 +372,7 @@ define i32 @trunc_shl_32_i32_i64(i64 %val) { ; TODO: Should be able to handle vectors define <2 x i32> @trunc_shl_16_v2i32_v2i64(<2 x i64> %val) { ; CHECK-LABEL: @trunc_shl_16_v2i32_v2i64( -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> %val, +; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[TRUNC]] ; @@ -381,7 +383,7 @@ define <2 x i32> @trunc_shl_16_v2i32_v2i64(<2 x i64> %val) { define <2 x i32> @trunc_shl_nosplat_v2i32_v2i64(<2 x i64> %val) { ; CHECK-LABEL: @trunc_shl_nosplat_v2i32_v2i64( -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> %val, +; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[TRUNC]] ; @@ -392,10 +394,10 @@ define <2 x i32> @trunc_shl_nosplat_v2i32_v2i64(<2 x i64> %val) { define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i64 addrspace(1)* %ptr1) { ; CHECK-LABEL: @trunc_shl_31_i32_i64_multi_use( -; CHECK-NEXT: [[SHL:%.*]] = shl i64 %val, 31 +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[VAL:%.*]], 31 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHL]] to i32 -; CHECK-NEXT: store volatile i32 [[TRUNC]], i32 addrspace(1)* %ptr0, align 4 -; CHECK-NEXT: store volatile i64 [[SHL]], i64 addrspace(1)* %ptr1, align 8 +; CHECK-NEXT: store volatile i32 [[TRUNC]], i32 addrspace(1)* [[PTR0:%.*]], align 4 +; CHECK-NEXT: store volatile i64 [[SHL]], i64 addrspace(1)* [[PTR1:%.*]], align 8 ; CHECK-NEXT: ret void ; %shl = shl i64 %val, 31 @@ -407,7 +409,7 @@ define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i define i32 @trunc_shl_lshr_infloop(i64 %arg) { ; CHECK-LABEL: @trunc_shl_lshr_infloop( -; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 %arg, 1 +; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ARG:%.*]], 1 ; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[TMP2]] @@ -420,7 +422,7 @@ define i32 @trunc_shl_lshr_infloop(i64 %arg) { define i32 @trunc_shl_ashr_infloop(i64 %arg) { ; CHECK-LABEL: @trunc_shl_ashr_infloop( -; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 %arg, 3 +; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 [[ARG:%.*]], 3 ; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[TMP0]], 2 ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[TMP2]] @@ -433,7 +435,7 @@ define i32 @trunc_shl_ashr_infloop(i64 %arg) { define i32 @trunc_shl_shl_infloop(i64 %arg) { ; CHECK-LABEL: @trunc_shl_shl_infloop( -; CHECK-NEXT: [[ARG_TR:%.*]] = trunc i64 %arg to i32 +; CHECK-NEXT: [[ARG_TR:%.*]] = trunc i64 [[ARG:%.*]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[ARG_TR]], 3 ; CHECK-NEXT: ret i32 [[TMP2]] ; @@ -445,7 +447,7 @@ define i32 @trunc_shl_shl_infloop(i64 %arg) { define i32 @trunc_shl_lshr_var(i64 %arg, i64 %val) { ; CHECK-LABEL: @trunc_shl_lshr_var( -; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 %arg, %val +; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ARG:%.*]], [[VAL:%.*]] ; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2 ; CHECK-NEXT: ret i32 [[TMP2]] @@ -458,7 +460,7 @@ define i32 @trunc_shl_lshr_var(i64 %arg, i64 %val) { define i32 @trunc_shl_ashr_var(i64 %arg, i64 %val) { ; CHECK-LABEL: @trunc_shl_ashr_var( -; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 %arg, %val +; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 [[ARG:%.*]], [[VAL:%.*]] ; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2 ; CHECK-NEXT: ret i32 [[TMP2]] @@ -471,7 +473,7 @@ define i32 @trunc_shl_ashr_var(i64 %arg, i64 %val) { define i32 @trunc_shl_shl_var(i64 %arg, i64 %val) { ; CHECK-LABEL: @trunc_shl_shl_var( -; CHECK-NEXT: [[TMP0:%.*]] = shl i64 %arg, %val +; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[ARG:%.*]], [[VAL:%.*]] ; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2 ; CHECK-NEXT: ret i32 [[TMP2]] @@ -484,7 +486,7 @@ define i32 @trunc_shl_shl_var(i64 %arg, i64 %val) { define <8 x i16> @trunc_shl_v8i15_v8i32_15(<8 x i32> %a) { ; CHECK-LABEL: @trunc_shl_v8i15_v8i32_15( -; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> %a, +; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A:%.*]], ; CHECK-NEXT: [[CONV:%.*]] = trunc <8 x i32> [[SHL]] to <8 x i16> ; CHECK-NEXT: ret <8 x i16> [[CONV]] ; @@ -513,7 +515,7 @@ define <8 x i16> @trunc_shl_v8i16_v8i32_17(<8 x i32> %a) { define <8 x i16> @trunc_shl_v8i16_v8i32_4(<8 x i32> %a) { ; CHECK-LABEL: @trunc_shl_v8i16_v8i32_4( -; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> %a, +; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A:%.*]], ; CHECK-NEXT: [[CONV:%.*]] = trunc <8 x i32> [[SHL]] to <8 x i16> ; CHECK-NEXT: ret <8 x i16> [[CONV]] ; @@ -527,7 +529,7 @@ define <8 x i16> @trunc_shl_v8i16_v8i32_4(<8 x i32> %a) { define <4 x i8> @wide_shuf(<4 x i32> %x) { ; CHECK-LABEL: @wide_shuf( -; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> %x, <4 x i32> , <4 x i32> +; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> , <4 x i32> ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <4 x i32> [[SHUF]] to <4 x i8> ; CHECK-NEXT: ret <4 x i8> [[TRUNC]] ; @@ -540,7 +542,7 @@ define <4 x i8> @wide_shuf(<4 x i32> %x) { define <4 x i8> @wide_splat1(<4 x i32> %x) { ; CHECK-LABEL: @wide_splat1( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> %x to <4 x i8> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i8> ; CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> undef, <4 x i32> ; CHECK-NEXT: ret <4 x i8> [[TRUNC]] ; @@ -554,7 +556,7 @@ define <4 x i8> @wide_splat1(<4 x i32> %x) { define <3 x i31> @wide_splat2(<3 x i33> %x) { ; CHECK-LABEL: @wide_splat2( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <3 x i33> %x to <3 x i31> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <3 x i33> [[X:%.*]] to <3 x i31> ; CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <3 x i31> [[TMP1]], <3 x i31> undef, <3 x i32> ; CHECK-NEXT: ret <3 x i31> [[TRUNC]] ; @@ -569,7 +571,7 @@ define <3 x i31> @wide_splat2(<3 x i33> %x) { define <3 x i31> @wide_splat3(<3 x i33> %x) { ; CHECK-LABEL: @wide_splat3( -; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i33> %x, <3 x i33> undef, <3 x i32> +; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i33> [[X:%.*]], <3 x i33> undef, <3 x i32> ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <3 x i33> [[SHUF]] to <3 x i31> ; CHECK-NEXT: ret <3 x i31> [[TRUNC]] ; @@ -582,7 +584,7 @@ define <3 x i31> @wide_splat3(<3 x i33> %x) { define <8 x i8> @wide_lengthening_splat(<4 x i16> %v) { ; CHECK-LABEL: @wide_lengthening_splat( -; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i16> %v, <4 x i16> undef, <8 x i32> zeroinitializer +; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i16> [[V:%.*]], <4 x i16> undef, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TR:%.*]] = trunc <8 x i16> [[SHUF]] to <8 x i8> ; CHECK-NEXT: ret <8 x i8> [[TR]] ; @@ -593,7 +595,7 @@ define <8 x i8> @wide_lengthening_splat(<4 x i16> %v) { define <2 x i8> @narrow_add_vec_constant(<2 x i32> %x) { ; CHECK-LABEL: @narrow_add_vec_constant( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i8> ; CHECK-NEXT: [[TR:%.*]] = add <2 x i8> [[TMP1]], ; CHECK-NEXT: ret <2 x i8> [[TR]] ; @@ -604,7 +606,7 @@ define <2 x i8> @narrow_add_vec_constant(<2 x i32> %x) { define <2 x i8> @narrow_mul_vec_constant(<2 x i32> %x) { ; CHECK-LABEL: @narrow_mul_vec_constant( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i8> ; CHECK-NEXT: [[TR:%.*]] = mul <2 x i8> [[TMP1]], ; CHECK-NEXT: ret <2 x i8> [[TR]] ; @@ -615,7 +617,7 @@ define <2 x i8> @narrow_mul_vec_constant(<2 x i32> %x) { define <2 x i8> @narrow_sub_vec_constant(<2 x i32> %x) { ; CHECK-LABEL: @narrow_sub_vec_constant( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i8> ; CHECK-NEXT: [[TR:%.*]] = sub <2 x i8> , [[TMP1]] ; CHECK-NEXT: ret <2 x i8> [[TR]] ;