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WebAssembly: textual emission uses expected opcode names
Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files. Reviewers: sunfish Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D11776 llvm-svn: 244305
This commit is contained in:
parent
f76ed1f361
commit
c6f87ed268
@ -74,6 +74,17 @@ private:
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//===----------------------------------------------------------------------===//
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// Untyped, lower-case version of the opcode's name matching the names
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// WebAssembly opcodes are expected to have. The tablegen names are uppercase
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// and suffixed with their type (after an underscore).
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static SmallString<32> Name(const WebAssemblyInstrInfo *TII,
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const MachineInstr *MI) {
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std::string N(StringRef(TII->getName(MI->getOpcode())).lower());
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std::string::size_type End = N.find('_');
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End = std::string::npos == End ? N.length() : End;
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return SmallString<32>(&N[0], &N[End]);
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}
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void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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@ -96,21 +107,11 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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case WebAssembly::ARGUMENT_Int64:
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case WebAssembly::ARGUMENT_Float32:
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case WebAssembly::ARGUMENT_Float64:
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OS << "argument " << MI->getOperand(1).getImm();
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OS << Name(TII, MI) << ' ' << MI->getOperand(1).getImm();
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PrintOperands = false;
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break;
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case WebAssembly::RETURN_Int32:
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case WebAssembly::RETURN_Int64:
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case WebAssembly::RETURN_Float32:
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case WebAssembly::RETURN_Float64:
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case WebAssembly::RETURN_VOID:
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// FIXME This is here only so "return" prints nicely, instead of printing
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// the isel name. Other operations have the same problem, fix this in
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// a generic way instead.
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OS << "return";
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break;
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default:
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OS << TII->getName(MI->getOpcode());
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OS << Name(TII, MI);
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break;
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}
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@ -12,7 +12,7 @@ declare i32 @llvm.ctpop.i32(i32)
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; CHECK-LABEL: add32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (add @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @add32(i32 %x, i32 %y) {
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%a = add i32 %x, %y
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@ -22,7 +22,7 @@ define i32 @add32(i32 %x, i32 %y) {
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; CHECK-LABEL: sub32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sub @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @sub32(i32 %x, i32 %y) {
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%a = sub i32 %x, %y
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@ -32,7 +32,7 @@ define i32 @sub32(i32 %x, i32 %y) {
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; CHECK-LABEL: mul32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (mul @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @mul32(i32 %x, i32 %y) {
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%a = mul i32 %x, %y
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@ -42,7 +42,7 @@ define i32 @mul32(i32 %x, i32 %y) {
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; CHECK-LABEL: sdiv32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sdiv @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @sdiv32(i32 %x, i32 %y) {
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%a = sdiv i32 %x, %y
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@ -52,7 +52,7 @@ define i32 @sdiv32(i32 %x, i32 %y) {
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; CHECK-LABEL: udiv32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (udiv @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @udiv32(i32 %x, i32 %y) {
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%a = udiv i32 %x, %y
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@ -62,7 +62,7 @@ define i32 @udiv32(i32 %x, i32 %y) {
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; CHECK-LABEL: srem32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (srem @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @srem32(i32 %x, i32 %y) {
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%a = srem i32 %x, %y
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@ -72,7 +72,7 @@ define i32 @srem32(i32 %x, i32 %y) {
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; CHECK-LABEL: urem32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (urem @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @urem32(i32 %x, i32 %y) {
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%a = urem i32 %x, %y
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@ -82,7 +82,7 @@ define i32 @urem32(i32 %x, i32 %y) {
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; CHECK-LABEL: and32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (and @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @and32(i32 %x, i32 %y) {
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%a = and i32 %x, %y
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@ -92,7 +92,7 @@ define i32 @and32(i32 %x, i32 %y) {
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; CHECK-LABEL: ior32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (ior @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @ior32(i32 %x, i32 %y) {
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%a = or i32 %x, %y
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@ -102,7 +102,7 @@ define i32 @ior32(i32 %x, i32 %y) {
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; CHECK-LABEL: xor32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (xor @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @xor32(i32 %x, i32 %y) {
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%a = xor i32 %x, %y
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@ -112,7 +112,7 @@ define i32 @xor32(i32 %x, i32 %y) {
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; CHECK-LABEL: shl32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (shl @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @shl32(i32 %x, i32 %y) {
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%a = shl i32 %x, %y
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@ -122,7 +122,7 @@ define i32 @shl32(i32 %x, i32 %y) {
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; CHECK-LABEL: shr32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (shr @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @shr32(i32 %x, i32 %y) {
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%a = lshr i32 %x, %y
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@ -132,7 +132,7 @@ define i32 @shr32(i32 %x, i32 %y) {
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; CHECK-LABEL: sar32:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sar @1 @0))
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; CHECK-NEXT: (return @2)
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define i32 @sar32(i32 %x, i32 %y) {
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%a = ashr i32 %x, %y
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@ -141,7 +141,7 @@ define i32 @sar32(i32 %x, i32 %y) {
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; CHECK-LABEL: clz32:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
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; CHECK-NEXT: (setlocal @1 (clz @0))
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; CHECK-NEXT: (return @1)
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define i32 @clz32(i32 %x) {
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%a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
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@ -150,7 +150,7 @@ define i32 @clz32(i32 %x) {
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; CHECK-LABEL: ctz32:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
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; CHECK-NEXT: (setlocal @1 (ctz @0))
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; CHECK-NEXT: (return @1)
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define i32 @ctz32(i32 %x) {
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%a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
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@ -159,7 +159,7 @@ define i32 @ctz32(i32 %x) {
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; CHECK-LABEL: popcnt32:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
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; CHECK-NEXT: (setlocal @1 (popcnt @0))
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; CHECK-NEXT: (return @1)
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define i32 @popcnt32(i32 %x) {
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%a = call i32 @llvm.ctpop.i32(i32 %x)
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; CHECK-LABEL: add64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (ADD_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (add @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @add64(i64 %x, i64 %y) {
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%a = add i64 %x, %y
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@ -22,7 +22,7 @@ define i64 @add64(i64 %x, i64 %y) {
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; CHECK-LABEL: sub64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SUB_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sub @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @sub64(i64 %x, i64 %y) {
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%a = sub i64 %x, %y
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@ -32,7 +32,7 @@ define i64 @sub64(i64 %x, i64 %y) {
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; CHECK-LABEL: mul64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (MUL_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (mul @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @mul64(i64 %x, i64 %y) {
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%a = mul i64 %x, %y
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@ -42,7 +42,7 @@ define i64 @mul64(i64 %x, i64 %y) {
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; CHECK-LABEL: sdiv64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SDIV_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sdiv @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @sdiv64(i64 %x, i64 %y) {
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%a = sdiv i64 %x, %y
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@ -52,7 +52,7 @@ define i64 @sdiv64(i64 %x, i64 %y) {
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; CHECK-LABEL: udiv64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (UDIV_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (udiv @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @udiv64(i64 %x, i64 %y) {
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%a = udiv i64 %x, %y
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@ -62,7 +62,7 @@ define i64 @udiv64(i64 %x, i64 %y) {
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; CHECK-LABEL: srem64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SREM_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (srem @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @srem64(i64 %x, i64 %y) {
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%a = srem i64 %x, %y
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@ -72,7 +72,7 @@ define i64 @srem64(i64 %x, i64 %y) {
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; CHECK-LABEL: urem64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (UREM_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (urem @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @urem64(i64 %x, i64 %y) {
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%a = urem i64 %x, %y
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@ -82,7 +82,7 @@ define i64 @urem64(i64 %x, i64 %y) {
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; CHECK-LABEL: and64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (AND_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (and @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @and64(i64 %x, i64 %y) {
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%a = and i64 %x, %y
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@ -92,7 +92,7 @@ define i64 @and64(i64 %x, i64 %y) {
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; CHECK-LABEL: ior64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (IOR_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (ior @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @ior64(i64 %x, i64 %y) {
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%a = or i64 %x, %y
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@ -102,7 +102,7 @@ define i64 @ior64(i64 %x, i64 %y) {
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; CHECK-LABEL: xor64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (XOR_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (xor @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @xor64(i64 %x, i64 %y) {
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%a = xor i64 %x, %y
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@ -112,7 +112,7 @@ define i64 @xor64(i64 %x, i64 %y) {
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; CHECK-LABEL: shl64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (shl @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @shl64(i64 %x, i64 %y) {
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%a = shl i64 %x, %y
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@ -122,7 +122,7 @@ define i64 @shl64(i64 %x, i64 %y) {
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; CHECK-LABEL: shr64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (shr @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @shr64(i64 %x, i64 %y) {
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%a = lshr i64 %x, %y
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@ -132,7 +132,7 @@ define i64 @shr64(i64 %x, i64 %y) {
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; CHECK-LABEL: sar64:
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; CHECK-NEXT: (setlocal @0 (argument 1))
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; CHECK-NEXT: (setlocal @1 (argument 0))
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; CHECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
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; CHECK-NEXT: (setlocal @2 (sar @1 @0))
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; CHECK-NEXT: (return @2)
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define i64 @sar64(i64 %x, i64 %y) {
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%a = ashr i64 %x, %y
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@ -141,7 +141,7 @@ define i64 @sar64(i64 %x, i64 %y) {
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; CHECK-LABEL: clz64:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (CLZ_I64 @0))
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; CHECK-NEXT: (setlocal @1 (clz @0))
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; CHECK-NEXT: (return @1)
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define i64 @clz64(i64 %x) {
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%a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
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@ -150,7 +150,7 @@ define i64 @clz64(i64 %x) {
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; CHECK-LABEL: ctz64:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (CTZ_I64 @0))
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; CHECK-NEXT: (setlocal @1 (ctz @0))
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; CHECK-NEXT: (return @1)
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define i64 @ctz64(i64 %x) {
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%a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
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@ -159,7 +159,7 @@ define i64 @ctz64(i64 %x) {
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; CHECK-LABEL: popcnt64:
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; CHECK-NEXT: (setlocal @0 (argument 0))
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; CHECK-NEXT: (setlocal @1 (POPCNT_I64 @0))
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; CHECK-NEXT: (setlocal @1 (popcnt @0))
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; CHECK-NEXT: (return @1)
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define i64 @popcnt64(i64 %x) {
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%a = call i64 @llvm.ctpop.i64(i64 %x)
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