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[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
This new MIR pass removes redundant DBG_VALUEs. After the register allocator is done, more precisely, after the Virtual Register Rewriter, we end up having duplicated DBG_VALUEs, since some virtual registers are being rewritten into the same physical register as some of existing DBG_VALUEs. Each DBG_VALUE should indicate (at least before the LiveDebugValues) variables assignment, but it is being clobbered for function parameters during the SelectionDAG since it generates new DBG_VALUEs after COPY instructions, even though the parameter has no assignment. For example, if we had a DBG_VALUE $regX as an entry debug value representing the parameter, and a COPY and after the COPY, DBG_VALUE $virt_reg, and after the virtregrewrite the $virt_reg gets rewritten into $regX, we'd end up having redundant DBG_VALUE. This breaks the definition of the DBG_VALUE since some analysis passes might be built on top of that premise..., and this patch tries to fix the MIR with the respect to that. This first patch performs bacward scan, by trying to detect a sequence of consecutive DBG_VALUEs, and to remove all DBG_VALUEs describing one variable but the last one: For example: (1) DBG_VALUE $edi, !"var1", ... (2) DBG_VALUE $esi, !"var2", ... (3) DBG_VALUE $edi, !"var1", ... ... in this case, we can remove (1). By combining the forward scan that will be introduced in the next patch (from this stack), by inspecting the statistics, the RemoveRedundantDebugValues removes 15032 instructions by using gdb-7.11 as a testbed. Differential Revision: https://reviews.llvm.org/D105279
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@ -770,7 +770,9 @@ VirtRegRewriter pass re-inserts DBG_VALUE instructions in their original
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positions, translating virtual register references into their physical
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positions, translating virtual register references into their physical
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machine locations. To avoid encoding incorrect variable locations, in this
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machine locations. To avoid encoding incorrect variable locations, in this
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pass any DBG_VALUE of a virtual register that is not live, is replaced by
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pass any DBG_VALUE of a virtual register that is not live, is replaced by
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the undefined location.
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the undefined location. The LiveDebugVariables may insert redundant DBG_VALUEs
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because of virtual register rewriting. These will be subsequently removed by
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the RemoveRedundantDebugValues pass.
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LiveDebugValues expansion of variable locations
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LiveDebugValues expansion of variable locations
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-----------------------------------------------
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-----------------------------------------------
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@ -869,6 +869,8 @@ Error CodeGenPassBuilder<Derived>::addMachinePasses(
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// Run post-ra passes.
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// Run post-ra passes.
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derived().addPostRegAlloc(addPass);
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derived().addPostRegAlloc(addPass);
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addPass(RemoveRedundantDebugValuesPass());
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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if (getOptLevel() != CodeGenOpt::None) {
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if (getOptLevel() != CodeGenOpt::None) {
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addPass(PostRAMachineSinkingPass());
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addPass(PostRAMachineSinkingPass());
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@ -155,6 +155,7 @@ DUMMY_MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass
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DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugValuesPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("livedebugvalues", LiveDebugValuesPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("livedebugvalues", LiveDebugValuesPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("early-tailduplication", EarlyTailDuplicatePass, ())
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DUMMY_MACHINE_FUNCTION_PASS("early-tailduplication", EarlyTailDuplicatePass, ())
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DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass, ())
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@ -400,6 +400,9 @@ namespace llvm {
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/// the intrinsic for later emission to the StackMap.
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/// the intrinsic for later emission to the StackMap.
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extern char &StackMapLivenessID;
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extern char &StackMapLivenessID;
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/// RemoveRedundantDebugValues pass.
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extern char &RemoveRedundantDebugValuesID;
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/// LiveDebugValues pass
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/// LiveDebugValues pass
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extern char &LiveDebugValuesID;
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extern char &LiveDebugValuesID;
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@ -382,6 +382,7 @@ void initializeRegionOnlyViewerPass(PassRegistry&);
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void initializeRegionPrinterPass(PassRegistry&);
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void initializeRegionPrinterPass(PassRegistry&);
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void initializeRegionViewerPass(PassRegistry&);
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void initializeRegionViewerPass(PassRegistry&);
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void initializeRegisterCoalescerPass(PassRegistry&);
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void initializeRegisterCoalescerPass(PassRegistry&);
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void initializeRemoveRedundantDebugValuesPass(PassRegistry&);
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void initializeRenameIndependentSubregsPass(PassRegistry&);
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void initializeRenameIndependentSubregsPass(PassRegistry&);
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void initializeReplaceWithVeclibLegacyPass(PassRegistry &);
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void initializeReplaceWithVeclibLegacyPass(PassRegistry &);
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void initializeResetMachineFunctionPass(PassRegistry&);
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void initializeResetMachineFunctionPass(PassRegistry&);
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@ -142,6 +142,7 @@ add_llvm_component_library(LLVMCodeGen
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RegisterCoalescer.cpp
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RegisterCoalescer.cpp
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RegisterPressure.cpp
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RegisterPressure.cpp
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RegisterScavenging.cpp
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RegisterScavenging.cpp
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RemoveRedundantDebugValues.cpp
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RenameIndependentSubregs.cpp
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RenameIndependentSubregs.cpp
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MachineStableHash.cpp
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MachineStableHash.cpp
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MIRVRegNamerUtils.cpp
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MIRVRegNamerUtils.cpp
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@ -97,6 +97,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeRegUsageInfoCollectorPass(Registry);
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initializeRegUsageInfoCollectorPass(Registry);
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initializeRegUsageInfoPropagationPass(Registry);
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initializeRegUsageInfoPropagationPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRemoveRedundantDebugValuesPass(Registry);
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initializeRenameIndependentSubregsPass(Registry);
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initializeRenameIndependentSubregsPass(Registry);
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initializeSafeStackLegacyPassPass(Registry);
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initializeSafeStackLegacyPassPass(Registry);
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initializeShadowStackGCLoweringPass(Registry);
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initializeShadowStackGCLoweringPass(Registry);
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150
lib/CodeGen/RemoveRedundantDebugValues.cpp
Normal file
150
lib/CodeGen/RemoveRedundantDebugValues.cpp
Normal file
@ -0,0 +1,150 @@
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//===- RemoveRedundantDebugValues.cpp - Remove Redundant Debug Value MIs --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/Function.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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/// \file RemoveRedundantDebugValues.cpp
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///
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/// The RemoveRedundantDebugValues pass removes redundant DBG_VALUEs that
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/// appear in MIR after the register allocator.
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#define DEBUG_TYPE "removeredundantdebugvalues"
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using namespace llvm;
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STATISTIC(NumRemovedBackward, "Number of DBG_VALUEs removed (backward scan)");
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namespace {
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class RemoveRedundantDebugValues : public MachineFunctionPass {
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public:
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static char ID;
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RemoveRedundantDebugValues();
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bool reduceDbgValues(MachineFunction &MF);
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/// Remove redundant debug value MIs for the given machine function.
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// Implementation
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//===----------------------------------------------------------------------===//
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char RemoveRedundantDebugValues::ID = 0;
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char &llvm::RemoveRedundantDebugValuesID = RemoveRedundantDebugValues::ID;
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INITIALIZE_PASS(RemoveRedundantDebugValues, DEBUG_TYPE,
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"Remove Redundant DEBUG_VALUE analysis", false, false)
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/// Default construct and initialize the pass.
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RemoveRedundantDebugValues::RemoveRedundantDebugValues()
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: MachineFunctionPass(ID) {
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initializeRemoveRedundantDebugValuesPass(*PassRegistry::getPassRegistry());
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}
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// This analysis aims to remove redundant DBG_VALUEs by going backward
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// in the basic block and removing all but the last DBG_VALUE for any
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// given variable in a set of consecutive DBG_VALUE instructions.
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// For example:
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// (1) DBG_VALUE $edi, !"var1", ...
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// (2) DBG_VALUE $esi, !"var2", ...
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// (3) DBG_VALUE $edi, !"var1", ...
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// ...
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// in this case, we can remove (1).
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static bool reduceDbgValsBackwardScan(MachineBasicBlock &MBB) {
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LLVM_DEBUG(dbgs() << "\n == Backward Scan == \n");
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SmallVector<MachineInstr *, 8> DbgValsToBeRemoved;
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SmallDenseSet<DebugVariable> VariableSet;
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for (MachineBasicBlock::reverse_iterator I = MBB.rbegin(), E = MBB.rend();
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I != E; ++I) {
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MachineInstr *MI = &*I;
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if (MI->isDebugValue()) {
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DebugVariable Var(MI->getDebugVariable(), MI->getDebugExpression(),
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MI->getDebugLoc()->getInlinedAt());
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auto R = VariableSet.insert(Var);
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// If it is a DBG_VALUE describing a constant as:
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// DBG_VALUE 0, ...
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// we just don't consider such instructions as candidates
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// for redundant removal.
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if (MI->isNonListDebugValue()) {
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MachineOperand &Loc = MI->getDebugOperand(0);
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if (!Loc.isReg()) {
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// If we have already encountered this variable, just stop
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// tracking it.
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if (!R.second)
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VariableSet.erase(Var);
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continue;
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}
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}
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// We have already encountered the value for this variable,
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// so this one can be deleted.
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if (!R.second)
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DbgValsToBeRemoved.push_back(MI);
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continue;
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}
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// If we encountered a non-DBG_VALUE, try to find the next
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// sequence with consecutive DBG_VALUE instructions.
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VariableSet.clear();
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}
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for (auto &Instr : DbgValsToBeRemoved) {
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LLVM_DEBUG(dbgs() << "removing "; Instr->dump());
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Instr->eraseFromParent();
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++NumRemovedBackward;
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}
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return !DbgValsToBeRemoved.empty();
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}
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bool RemoveRedundantDebugValues::reduceDbgValues(MachineFunction &MF) {
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LLVM_DEBUG(dbgs() << "\nDebug Value Reduction\n");
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bool Changed = false;
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for (auto &MBB : MF)
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Changed |= reduceDbgValsBackwardScan(MBB);
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return Changed;
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}
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bool RemoveRedundantDebugValues::runOnMachineFunction(MachineFunction &MF) {
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// Skip functions without debugging information.
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if (!MF.getFunction().getSubprogram())
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return false;
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// Skip functions from NoDebug compilation units.
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if (MF.getFunction().getSubprogram()->getUnit()->getEmissionKind() ==
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DICompileUnit::NoDebug)
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return false;
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bool Changed = reduceDbgValues(MF);
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return Changed;
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}
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@ -1123,6 +1123,8 @@ void TargetPassConfig::addMachinePasses() {
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// Run post-ra passes.
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// Run post-ra passes.
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addPostRegAlloc();
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addPostRegAlloc();
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addPass(&RemoveRedundantDebugValuesID, false);
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addPass(&FixupStatepointCallerSavedID);
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addPass(&FixupStatepointCallerSavedID);
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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@ -46,6 +46,7 @@
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Machine Optimization Remark Emitter
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@ -159,6 +159,7 @@
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; CHECK-NEXT: Machine Loop Invariant Code Motion
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; CHECK-NEXT: Machine Loop Invariant Code Motion
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; CHECK-NEXT: AArch64 Redundant Copy Elimination
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; CHECK-NEXT: AArch64 Redundant Copy Elimination
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; CHECK-NEXT: A57 FP Anti-dependency breaker
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; CHECK-NEXT: A57 FP Anti-dependency breaker
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; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: PostRA Machine Sink
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; CHECK-NEXT: PostRA Machine Sink
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: MachineDominator Tree Construction
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@ -126,6 +126,7 @@
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; GCN-O0-NEXT: SI lower SGPR spill instructions
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; GCN-O0-NEXT: SI lower SGPR spill instructions
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; GCN-O0-NEXT: Fast Register Allocator
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; GCN-O0-NEXT: Fast Register Allocator
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; GCN-O0-NEXT: SI Fix VGPR copies
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; GCN-O0-NEXT: SI Fix VGPR copies
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; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis
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; GCN-O0-NEXT: Fixup Statepoint Caller Saved
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; GCN-O0-NEXT: Fixup Statepoint Caller Saved
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; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis
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; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis
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; GCN-O0-NEXT: Machine Optimization Remark Emitter
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; GCN-O0-NEXT: Machine Optimization Remark Emitter
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; GCN-O1-NEXT: Machine Loop Invariant Code Motion
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; GCN-O1-NEXT: Machine Loop Invariant Code Motion
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; GCN-O1-NEXT: SI Fix VGPR copies
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; GCN-O1-NEXT: SI Fix VGPR copies
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; GCN-O1-NEXT: SI optimize exec mask operations
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; GCN-O1-NEXT: SI optimize exec mask operations
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; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis
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; GCN-O1-NEXT: Fixup Statepoint Caller Saved
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; GCN-O1-NEXT: Fixup Statepoint Caller Saved
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; GCN-O1-NEXT: PostRA Machine Sink
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; GCN-O1-NEXT: PostRA Machine Sink
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; GCN-O1-NEXT: MachineDominator Tree Construction
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; GCN-O1-NEXT: MachineDominator Tree Construction
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; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion
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; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion
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; GCN-O1-OPTS-NEXT: SI Fix VGPR copies
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; GCN-O1-OPTS-NEXT: SI Fix VGPR copies
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; GCN-O1-OPTS-NEXT: SI optimize exec mask operations
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; GCN-O1-OPTS-NEXT: SI optimize exec mask operations
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; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis
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; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved
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; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved
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; GCN-O1-OPTS-NEXT: PostRA Machine Sink
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; GCN-O1-OPTS-NEXT: PostRA Machine Sink
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; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
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; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
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@ -925,6 +928,7 @@
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; GCN-O2-NEXT: Machine Loop Invariant Code Motion
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; GCN-O2-NEXT: Machine Loop Invariant Code Motion
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; GCN-O2-NEXT: SI Fix VGPR copies
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; GCN-O2-NEXT: SI Fix VGPR copies
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; GCN-O2-NEXT: SI optimize exec mask operations
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; GCN-O2-NEXT: SI optimize exec mask operations
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; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis
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; GCN-O2-NEXT: Fixup Statepoint Caller Saved
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; GCN-O2-NEXT: Fixup Statepoint Caller Saved
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; GCN-O2-NEXT: PostRA Machine Sink
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; GCN-O2-NEXT: PostRA Machine Sink
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; GCN-O2-NEXT: MachineDominator Tree Construction
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; GCN-O2-NEXT: MachineDominator Tree Construction
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@ -1222,6 +1226,7 @@
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; GCN-O3-NEXT: Machine Loop Invariant Code Motion
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; GCN-O3-NEXT: Machine Loop Invariant Code Motion
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; GCN-O3-NEXT: SI Fix VGPR copies
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; GCN-O3-NEXT: SI Fix VGPR copies
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; GCN-O3-NEXT: SI optimize exec mask operations
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; GCN-O3-NEXT: SI optimize exec mask operations
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; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis
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; GCN-O3-NEXT: Fixup Statepoint Caller Saved
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; GCN-O3-NEXT: Fixup Statepoint Caller Saved
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; GCN-O3-NEXT: PostRA Machine Sink
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; GCN-O3-NEXT: PostRA Machine Sink
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; GCN-O3-NEXT: MachineDominator Tree Construction
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; GCN-O3-NEXT: MachineDominator Tree Construction
|
||||||
|
@ -43,7 +43,8 @@ define hidden void @ptr_arg_split_reg_mem(<31 x i32>, %struct.A* %arg2) #0 !dbg
|
|||||||
; CHECK-NEXT: .loc 1 10 0 ; example.cpp:10:0
|
; CHECK-NEXT: .loc 1 10 0 ; example.cpp:10:0
|
||||||
; CHECK-NEXT: .cfi_startproc
|
; CHECK-NEXT: .cfi_startproc
|
||||||
; CHECK-NEXT: ; %bb.0:
|
; CHECK-NEXT: ; %bb.0:
|
||||||
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0]
|
;; NOTE: One dbg_value (DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0]) will be considered as
|
||||||
|
;; redundant after the virtregrewrite, so it will be removed.
|
||||||
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0]
|
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0]
|
||||||
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||||
; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32
|
; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32
|
||||||
|
@ -128,6 +128,7 @@
|
|||||||
; CHECK-NEXT: Stack Slot Coloring
|
; CHECK-NEXT: Stack Slot Coloring
|
||||||
; CHECK-NEXT: Machine Copy Propagation Pass
|
; CHECK-NEXT: Machine Copy Propagation Pass
|
||||||
; CHECK-NEXT: Machine Loop Invariant Code Motion
|
; CHECK-NEXT: Machine Loop Invariant Code Motion
|
||||||
|
; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
|
||||||
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
||||||
; CHECK-NEXT: PostRA Machine Sink
|
; CHECK-NEXT: PostRA Machine Sink
|
||||||
; CHECK-NEXT: Machine Block Frequency Analysis
|
; CHECK-NEXT: Machine Block Frequency Analysis
|
||||||
|
@ -162,6 +162,7 @@
|
|||||||
; CHECK-NEXT: Stack Slot Coloring
|
; CHECK-NEXT: Stack Slot Coloring
|
||||||
; CHECK-NEXT: Machine Copy Propagation Pass
|
; CHECK-NEXT: Machine Copy Propagation Pass
|
||||||
; CHECK-NEXT: Machine Loop Invariant Code Motion
|
; CHECK-NEXT: Machine Loop Invariant Code Motion
|
||||||
|
; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
|
||||||
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
||||||
; CHECK-NEXT: PostRA Machine Sink
|
; CHECK-NEXT: PostRA Machine Sink
|
||||||
; CHECK-NEXT: Machine Block Frequency Analysis
|
; CHECK-NEXT: Machine Block Frequency Analysis
|
||||||
|
@ -5,7 +5,6 @@ define dso_local void @test(float* nocapture readonly %Fptr, <4 x float>* nocapt
|
|||||||
; CHECK-LABEL: test:
|
; CHECK-LABEL: test:
|
||||||
; CHECK: # %bb.0: # %entry
|
; CHECK: # %bb.0: # %entry
|
||||||
; CHECK-NEXT: #DEBUG_VALUE: test:Fptr <- $x3
|
; CHECK-NEXT: #DEBUG_VALUE: test:Fptr <- $x3
|
||||||
; CHECK-NEXT: #DEBUG_VALUE: test:Fptr <- $x3
|
|
||||||
; CHECK-NEXT: #DEBUG_VALUE: test:Vptr <- $x4
|
; CHECK-NEXT: #DEBUG_VALUE: test:Vptr <- $x4
|
||||||
; CHECK-NEXT: addis 5, 2, .LCPI0_0@toc@ha
|
; CHECK-NEXT: addis 5, 2, .LCPI0_0@toc@ha
|
||||||
; CHECK-NEXT: .Ltmp0:
|
; CHECK-NEXT: .Ltmp0:
|
||||||
|
@ -49,6 +49,7 @@
|
|||||||
; CHECK-NEXT: X86 Lower Tile Copy
|
; CHECK-NEXT: X86 Lower Tile Copy
|
||||||
; CHECK-NEXT: Bundle Machine CFG Edges
|
; CHECK-NEXT: Bundle Machine CFG Edges
|
||||||
; CHECK-NEXT: X86 FP Stackifier
|
; CHECK-NEXT: X86 FP Stackifier
|
||||||
|
; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
|
||||||
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
||||||
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
|
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
|
||||||
; CHECK-NEXT: Machine Optimization Remark Emitter
|
; CHECK-NEXT: Machine Optimization Remark Emitter
|
||||||
|
@ -152,6 +152,7 @@
|
|||||||
; CHECK-NEXT: MachineDominator Tree Construction
|
; CHECK-NEXT: MachineDominator Tree Construction
|
||||||
; CHECK-NEXT: Machine Dominance Frontier Construction
|
; CHECK-NEXT: Machine Dominance Frontier Construction
|
||||||
; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening
|
; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening
|
||||||
|
; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
|
||||||
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
; CHECK-NEXT: Fixup Statepoint Caller Saved
|
||||||
; CHECK-NEXT: PostRA Machine Sink
|
; CHECK-NEXT: PostRA Machine Sink
|
||||||
; CHECK-NEXT: Machine Block Frequency Analysis
|
; CHECK-NEXT: Machine Block Frequency Analysis
|
||||||
|
@ -113,7 +113,6 @@ body: |
|
|||||||
successors: %bb.1
|
successors: %bb.1
|
||||||
liveins: $r0
|
liveins: $r0
|
||||||
|
|
||||||
DBG_VALUE $r0, $noreg, !22, !DIExpression(), debug-location !23
|
|
||||||
DBG_VALUE $r0, $noreg, !22, !DIExpression(), debug-location !23
|
DBG_VALUE $r0, $noreg, !22, !DIExpression(), debug-location !23
|
||||||
BUNDLE implicit-def dead $p0, implicit-def $pc, implicit killed $r0, implicit killed $r31, debug-location !24 {
|
BUNDLE implicit-def dead $p0, implicit-def $pc, implicit killed $r0, implicit killed $r31, debug-location !24 {
|
||||||
renamable $p0 = C2_cmpeqi killed renamable $r0, 0, debug-location !24
|
renamable $p0 = C2_cmpeqi killed renamable $r0, 0, debug-location !24
|
||||||
|
@ -73,7 +73,6 @@ body: |
|
|||||||
bb.0.entry:
|
bb.0.entry:
|
||||||
liveins: $edi
|
liveins: $edi
|
||||||
|
|
||||||
DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !18
|
|
||||||
DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !18
|
DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !18
|
||||||
DBG_VALUE $esi, $noreg, !16, !DIExpression(), debug-location !18
|
DBG_VALUE $esi, $noreg, !16, !DIExpression(), debug-location !18
|
||||||
DBG_VALUE $edx, $noreg, !17, !DIExpression(), debug-location !18
|
DBG_VALUE $edx, $noreg, !17, !DIExpression(), debug-location !18
|
||||||
|
123
test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
Normal file
123
test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
Normal file
@ -0,0 +1,123 @@
|
|||||||
|
# RUN: llc %s -o - -run-pass=removeredundantdebugvalues | FileCheck %s
|
||||||
|
|
||||||
|
## This checks that the RemoveRedundantDebugValues removes redundant
|
||||||
|
## DBG_VALUEs.
|
||||||
|
|
||||||
|
# CHECK-LABEL: foo
|
||||||
|
# CHECK-LABEL: bb.0.entry:
|
||||||
|
# CHECK: DBG_VALUE $edi
|
||||||
|
# CHECK-NOT: DBG_VALUE $edi
|
||||||
|
# CHECK: frame-setup PUSH64r
|
||||||
|
|
||||||
|
# CHECK-LABEL: foo6
|
||||||
|
# CHECK-LABEL: bb.0.entry:
|
||||||
|
# CHECK: DBG_VALUE 0
|
||||||
|
# CHECK: DBG_VALUE 1
|
||||||
|
# CHECK: frame-setup PUSH64r
|
||||||
|
|
||||||
|
--- |
|
||||||
|
; ModuleID = 'test.ll'
|
||||||
|
source_filename = "test.c"
|
||||||
|
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
|
||||||
|
target triple = "x86_64-unknown-linux-gnu"
|
||||||
|
|
||||||
|
@side_effect = external dso_local local_unnamed_addr global i32, align 4
|
||||||
|
@value = external dso_local local_unnamed_addr global i32, align 4
|
||||||
|
|
||||||
|
; Function Attrs: nounwind uwtable
|
||||||
|
define dso_local i32 @foo(i32 %param) local_unnamed_addr !dbg !8 {
|
||||||
|
entry:
|
||||||
|
call void @llvm.dbg.value(metadata i32 %param, metadata !13, metadata !DIExpression()), !dbg !14
|
||||||
|
store i32 %param, i32* @side_effect, align 4, !dbg !15
|
||||||
|
%0 = load i32, i32* @value, align 4, !dbg !20
|
||||||
|
call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !DIExpression()), !dbg !14
|
||||||
|
tail call void @bar(i32 %0), !dbg !21
|
||||||
|
ret i32 0, !dbg !22
|
||||||
|
}
|
||||||
|
|
||||||
|
define dso_local i32 @foo6(i32 %param) local_unnamed_addr !dbg !34 {
|
||||||
|
entry:
|
||||||
|
store i32 %param, i32* @side_effect, align 4, !dbg !35
|
||||||
|
%0 = load i32, i32* @value, align 4, !dbg !35
|
||||||
|
tail call void @bar(i32 %0), !dbg !35
|
||||||
|
ret i32 0, !dbg !35
|
||||||
|
}
|
||||||
|
|
||||||
|
declare !dbg !23 dso_local void @bar(i32) local_unnamed_addr
|
||||||
|
|
||||||
|
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
|
||||||
|
declare void @llvm.dbg.value(metadata, metadata, metadata)
|
||||||
|
|
||||||
|
!llvm.dbg.cu = !{!0}
|
||||||
|
!llvm.module.flags = !{!3, !4, !5, !6}
|
||||||
|
!llvm.ident = !{!7}
|
||||||
|
|
||||||
|
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
|
||||||
|
!1 = !DIFile(filename: "test.c", directory: "/dir")
|
||||||
|
!2 = !{}
|
||||||
|
!3 = !{i32 7, !"Dwarf Version", i32 4}
|
||||||
|
!4 = !{i32 2, !"Debug Info Version", i32 3}
|
||||||
|
!5 = !{i32 1, !"wchar_size", i32 4}
|
||||||
|
!6 = !{i32 7, !"uwtable", i32 1}
|
||||||
|
!7 = !{!"clang version 13.0.0"}
|
||||||
|
!8 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 4, type: !9, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12)
|
||||||
|
!9 = !DISubroutineType(types: !10)
|
||||||
|
!10 = !{!11, !11}
|
||||||
|
!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
|
||||||
|
!12 = !{!13}
|
||||||
|
!13 = !DILocalVariable(name: "param", arg: 1, scope: !8, file: !1, line: 4, type: !11)
|
||||||
|
!14 = !DILocation(line: 0, scope: !8)
|
||||||
|
!15 = !DILocation(line: 5, column: 17, scope: !8)
|
||||||
|
!20 = !DILocation(line: 6, column: 13, scope: !8)
|
||||||
|
!21 = !DILocation(line: 7, column: 5, scope: !8)
|
||||||
|
!22 = !DILocation(line: 8, column: 5, scope: !8)
|
||||||
|
!23 = !DISubprogram(name: "bar", scope: !1, file: !1, line: 1, type: !24, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
|
||||||
|
!24 = !DISubroutineType(types: !25)
|
||||||
|
!25 = !{null, !11}
|
||||||
|
!34 = distinct !DISubprogram(name: "foo6", scope: !1, file: !1, line: 4, type: !9, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12)
|
||||||
|
!35 = !DILocation(line: 0, scope: !34)
|
||||||
|
|
||||||
|
...
|
||||||
|
---
|
||||||
|
name: foo
|
||||||
|
alignment: 16
|
||||||
|
liveins:
|
||||||
|
- { reg: '$edi', virtual-reg: '' }
|
||||||
|
body: |
|
||||||
|
bb.0.entry:
|
||||||
|
liveins: $edi, $esi
|
||||||
|
|
||||||
|
DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14
|
||||||
|
DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14
|
||||||
|
frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
|
||||||
|
CFI_INSTRUCTION def_cfa_offset 16
|
||||||
|
MOV32mr $rip, 1, $noreg, @side_effect, $noreg, killed renamable $esi, debug-location !15 :: (store 4 into @side_effect)
|
||||||
|
DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14
|
||||||
|
CALL64pcrel32 @bar, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, debug-location !21
|
||||||
|
$eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
|
||||||
|
$rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
|
||||||
|
CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
|
||||||
|
RETQ killed $eax, debug-location !22
|
||||||
|
|
||||||
|
...
|
||||||
|
---
|
||||||
|
name: foo6
|
||||||
|
alignment: 16
|
||||||
|
liveins:
|
||||||
|
- { reg: '$edi', virtual-reg: '' }
|
||||||
|
body: |
|
||||||
|
bb.0.entry:
|
||||||
|
liveins: $edi, $esi
|
||||||
|
|
||||||
|
DBG_VALUE 0, $noreg, !13, !DIExpression(), debug-location !14
|
||||||
|
DBG_VALUE 1, $noreg, !13, !DIExpression(), debug-location !14
|
||||||
|
frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
|
||||||
|
CFI_INSTRUCTION def_cfa_offset 16
|
||||||
|
MOV32mr $rip, 1, $noreg, @side_effect, $noreg, killed renamable $esi, debug-location !15 :: (store 4 into @side_effect)
|
||||||
|
renamable $esi = MOV32rm $rip, 1, $noreg, @value, $noreg, debug-location !20 :: (dereferenceable load 4 from @value)
|
||||||
|
$eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
|
||||||
|
$rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
|
||||||
|
CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
|
||||||
|
RETQ killed $eax, debug-location !22
|
||||||
|
|
||||||
|
...
|
@ -170,6 +170,7 @@ static_library("CodeGen") {
|
|||||||
"RegisterPressure.cpp",
|
"RegisterPressure.cpp",
|
||||||
"RegisterScavenging.cpp",
|
"RegisterScavenging.cpp",
|
||||||
"RegisterUsageInfo.cpp",
|
"RegisterUsageInfo.cpp",
|
||||||
|
"RemoveRedundantDebugValues.cpp",
|
||||||
"RenameIndependentSubregs.cpp",
|
"RenameIndependentSubregs.cpp",
|
||||||
"ReplaceWithVeclib.cpp",
|
"ReplaceWithVeclib.cpp",
|
||||||
"ResetMachineFunctionPass.cpp",
|
"ResetMachineFunctionPass.cpp",
|
||||||
|
Loading…
Reference in New Issue
Block a user