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[ARM] Thumb2 constant cmp testcases.

Shows some missed optimizations for the -7929856 and -2166 testcases.
-7929856 is due to a bug in ARMTargetLowering::getARMCmp, I think;
the -2166 case is a missing pattern.

llvm-svn: 335004
This commit is contained in:
Eli Friedman 2018-06-19 00:14:10 +00:00
parent 88aaf1ecd8
commit c7da456a48

View File

@ -61,3 +61,240 @@ true:
false:
ret i32 0
}
define i32 @slt_poweroftwo(i32 %a) {
; CHECK-LABEL: slt_poweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp slt i32 %a, 4096
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sle_poweroftwo(i32 %a) {
; CHECK-LABEL: sle_poweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sle i32 %a, 4096
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sge_poweroftwo(i32 %a) {
; CHECK-LABEL: sge_poweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sge i32 %a, 4096
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_poweroftwo(i32 %a) {
; CHECK-LABEL: sgt_poweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sgt i32 %a, 4096
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @slt_nearpoweroftwo(i32 %a) {
; CHECK-LABEL: slt_nearpoweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp slt i32 %a, 4097
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sle_nearpoweroftwo(i32 %a) {
; CHECK-LABEL: sle_nearpoweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sle i32 %a, 4095
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sge_nearpoweroftwo(i32 %a) {
; CHECK-LABEL: sge_nearpoweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sge i32 %a, 4097
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_nearpoweroftwo(i32 %a) {
; CHECK-LABEL: sgt_nearpoweroftwo:
; CHECK: cmp.w r0, #4096
%b = icmp sgt i32 %a, 4095
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @slt_neg_soimm(i32 %a) {
; CHECK-LABEL: slt_neg_soimm:
; CHECK: mvn r1, #7929856
%b = icmp slt i32 %a, -7929856
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sle_neg_soimm(i32 %a) {
; CHECK-LABEL: sle_neg_soimm:
; CHECK: cmn.w r0, #7929856
%b = icmp sle i32 %a, -7929856
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sge_neg_soimm(i32 %a) {
; CHECK-LABEL: sge_neg_soimm:
; CHECK: cmn.w r0, #7929856
%b = icmp sge i32 %a, -7929856
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_neg_soimm(i32 %a) {
; CHECK-LABEL: sgt_neg_soimm:
; CHECK: movs r1, #1
; CHECK: movt r1, #65415
%b = icmp sgt i32 %a, -7929856
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @slt_notneg_soimm(i32 %a) {
; CHECK-LABEL: slt_notneg_soimm:
; CHECK: cmp.w r0, #-2013231104
%b = icmp slt i32 %a, -2013231104
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sle_notneg_soimm(i32 %a) {
; CHECK-LABEL: sle_notneg_soimm:
; CHECK: cmp.w r0, #-2013231104
%b = icmp sle i32 %a, -2013231104
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sge_notneg_soimm(i32 %a) {
; CHECK-LABEL: sge_notneg_soimm:
; CHECK: cmp.w r0, #-2013231104
%b = icmp sge i32 %a, -2013231104
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_notneg_soimm(i32 %a) {
; CHECK-LABEL: sgt_notneg_soimm:
; CHECK: cmp.w r0, #-2013231104
%b = icmp sgt i32 %a, -2013231104
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_movw(i32 %a) {
; CHECK-LABEL: sgt_movw:
; CHECK: movw r1, #2167
%b = icmp sgt i32 %a, 2166
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}
define i32 @sgt_neg_movw(i32 %a) {
; CHECK-LABEL: sgt_neg_movw:
; CHECK: movw r1, #63371
; CHECK: movt r1, #65535
%b = icmp sgt i32 %a, -2166
br i1 %b, label %true, label %false
true:
ret i32 1
false:
ret i32 2
}