mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 10:42:39 +01:00
[test] Fix CodeGen/VE/Scalar tests
This commit is contained in:
parent
e45cab4d4c
commit
c7e22fdcf5
@ -49,9 +49,9 @@ define zeroext i32 @func32z(i32 zeroext %p) {
|
||||
define signext i16 @func16s(i16 signext %p) {
|
||||
; CHECK-LABEL: func16s:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: brv %s0, %s0
|
||||
; CHECK-NEXT: sra.l %s0, %s0, 48
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
; CHECK-NEXT: bswp %s0, %s0, 1
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: srl %s1, %s0, 12
|
||||
%r = tail call i16 @llvm.bitreverse.i16(i16 %p)
|
||||
ret i16 %r
|
||||
}
|
||||
@ -59,9 +59,9 @@ define signext i16 @func16s(i16 signext %p) {
|
||||
define zeroext i16 @func16z(i16 zeroext %p) {
|
||||
; CHECK-LABEL: func16z:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: brv %s0, %s0
|
||||
; CHECK-NEXT: srl %s0, %s0, 48
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
; CHECK-NEXT: bswp %s0, %s0, 1
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: srl %s1, %s0, 12
|
||||
%r = tail call i16 @llvm.bitreverse.i16(i16 %p)
|
||||
ret i16 %r
|
||||
}
|
||||
@ -69,9 +69,6 @@ define zeroext i16 @func16z(i16 zeroext %p) {
|
||||
define signext i8 @func8s(i8 signext %p) {
|
||||
; CHECK-LABEL: func8s:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: brv %s0, %s0
|
||||
; CHECK-NEXT: sra.l %s0, %s0, 56
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
%r = tail call i8 @llvm.bitreverse.i8(i8 %p)
|
||||
ret i8 %r
|
||||
}
|
||||
@ -79,9 +76,6 @@ define signext i8 @func8s(i8 signext %p) {
|
||||
define zeroext i8 @func8z(i8 zeroext %p) {
|
||||
; CHECK-LABEL: func8z:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: brv %s0, %s0
|
||||
; CHECK-NEXT: srl %s0, %s0, 56
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
%r = tail call i8 @llvm.bitreverse.i8(i8 %p)
|
||||
ret i8 %r
|
||||
}
|
||||
|
@ -83,8 +83,7 @@ define signext i16 @remi16(i16 signext %a, i16 signext %b) {
|
||||
; CHECK-NEXT: divs.w.sx %s2, %s0, %s1
|
||||
; CHECK-NEXT: muls.w.sx %s1, %s2, %s1
|
||||
; CHECK-NEXT: subs.w.sx %s0, %s0, %s1
|
||||
; CHECK-NEXT: sll %s0, %s0, 48
|
||||
; CHECK-NEXT: sra.l %s0, %s0, 48
|
||||
; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
%a32 = sext i16 %a to i32
|
||||
%b32 = sext i16 %b to i32
|
||||
@ -113,8 +112,7 @@ define signext i8 @remi8(i8 signext %a, i8 signext %b) {
|
||||
; CHECK-NEXT: divs.w.sx %s2, %s0, %s1
|
||||
; CHECK-NEXT: muls.w.sx %s1, %s2, %s1
|
||||
; CHECK-NEXT: subs.w.sx %s0, %s0, %s1
|
||||
; CHECK-NEXT: sll %s0, %s0, 56
|
||||
; CHECK-NEXT: sra.l %s0, %s0, 56
|
||||
; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
|
||||
; CHECK-NEXT: b.l.t (, %s10)
|
||||
%a32 = sext i8 %a to i32
|
||||
%b32 = sext i8 %b to i32
|
||||
|
Loading…
Reference in New Issue
Block a user