From c7fb4c55c4746573ece9eaec7e12a7fd0e832b00 Mon Sep 17 00:00:00 2001 From: Yuanfang Chen Date: Tue, 11 Feb 2020 20:39:34 -0800 Subject: [PATCH] Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"" This reverts commit rGcd5b308b828e, rGcd5b308b828e, rG8cedf0e2994c. There are issues to be investigated for polly bots and bots turning on EXPENSIVE_CHECKS. --- docs/ProgrammersManual.rst | 4 +-- include/llvm/Support/ErrorHandling.h | 2 +- lib/Support/ErrorHandling.cpp | 2 +- ...talayout-invalid-function-ptr-alignment.ll | 2 +- ...alayout-invalid-stack-natural-alignment.ll | 2 +- test/Assembler/getInt.ll | 2 +- .../invalid-datalayout-alloca-addrspace.ll | 2 +- .../invalid-datalayout-program-addrspace.ll | 2 +- test/Assembler/invalid-datalayout1.ll | 2 +- test/Assembler/invalid-datalayout10.ll | 2 +- test/Assembler/invalid-datalayout11.ll | 2 +- test/Assembler/invalid-datalayout12.ll | 2 +- test/Assembler/invalid-datalayout13.ll | 2 +- test/Assembler/invalid-datalayout14.ll | 2 +- test/Assembler/invalid-datalayout15.ll | 2 +- test/Assembler/invalid-datalayout16.ll | 2 +- test/Assembler/invalid-datalayout17.ll | 2 +- test/Assembler/invalid-datalayout18.ll | 2 +- test/Assembler/invalid-datalayout19.ll | 2 +- test/Assembler/invalid-datalayout2.ll | 2 +- test/Assembler/invalid-datalayout20.ll | 2 +- test/Assembler/invalid-datalayout21.ll | 2 +- test/Assembler/invalid-datalayout22.ll | 2 +- test/Assembler/invalid-datalayout23.ll | 2 +- test/Assembler/invalid-datalayout24.ll | 2 +- test/Assembler/invalid-datalayout3.ll | 2 +- test/Assembler/invalid-datalayout4.ll | 2 +- test/Assembler/invalid-datalayout5.ll | 2 +- test/Assembler/invalid-datalayout6.ll | 2 +- test/Assembler/invalid-datalayout7.ll | 2 +- test/Assembler/invalid-datalayout8.ll | 2 +- test/Assembler/invalid-datalayout9.ll | 2 +- .../function-default-address-spaces.ll | 2 +- test/Bitcode/invalid-functionptr-align.ll | 2 +- test/Bitcode/invalid.test | 12 +++---- .../AArch64/GlobalISel/arm64-fallback.ll | 4 +-- .../GlobalISel/call-translator-musttail.ll | 2 +- .../GlobalISel/legalize-inttoptr-xfail-1.mir | 3 +- .../GlobalISel/legalize-inttoptr-xfail-2.mir | 3 +- .../AArch64/GlobalISel/no-neon-no-fp.ll | 2 +- test/CodeGen/AArch64/arm64-named-reg-alloc.ll | 4 +-- .../AArch64/arm64-named-reg-notareg.ll | 4 +-- test/CodeGen/AArch64/arm64-tls-dynamics.ll | 2 +- .../CodeGen/AArch64/arm64-tls-initial-exec.ll | 2 +- test/CodeGen/AArch64/fast-isel-sp-adjust.ll | 2 +- test/CodeGen/AArch64/tiny_supported.ll | 6 ++-- .../AMDGPU/GlobalISel/insertelement.ll | 2 +- .../inst-select-pattern-xor3.xfail.mir | 2 +- .../AMDGPU/GlobalISel/lds-zero-initializer.ll | 2 +- .../GlobalISel/legalize-atomicrmw-nand.mir | 2 +- .../legalize-atomicrmw-xchg-flat.mir | 2 +- .../AMDGPU/GlobalISel/legalize-jump-table.mir | 2 +- .../legalize-unmerge-values-xfail.mir | 2 +- .../llvm.amdgcn.ds.gws.sema.release.all.ll | 2 +- .../GlobalISel/regbankselect-illegal-copy.mir | 4 +-- .../AMDGPU/at-least-one-def-value-assert.mir | 2 +- test/CodeGen/AMDGPU/branch-relax-spill.ll | 2 +- .../AMDGPU/call-to-kernel-undefined.ll | 2 +- test/CodeGen/AMDGPU/call-to-kernel.ll | 2 +- test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll | 6 ++-- test/CodeGen/AMDGPU/div_i128.ll | 2 +- .../AMDGPU/flat-error-unsupported-gpu-hsa.ll | 6 ++-- test/CodeGen/AMDGPU/lds-initializer.ll | 4 +-- test/CodeGen/AMDGPU/lds-zero-initializer.ll | 4 +-- .../llvm.amdgcn.ds.gws.sema.release.all.ll | 2 +- .../AMDGPU/read-register-invalid-subtarget.ll | 2 +- .../AMDGPU/read-register-invalid-type-i32.ll | 2 +- .../AMDGPU/read-register-invalid-type-i64.ll | 2 +- test/CodeGen/AMDGPU/unsupported-image-a16.ll | 2 +- test/CodeGen/AMDGPU/verify-sop.mir | 2 +- test/CodeGen/ARM/codemodel.ll | 4 +-- test/CodeGen/ARM/ldc2l.ll | 4 +-- test/CodeGen/ARM/machine-verifier.mir | 2 +- test/CodeGen/ARM/named-reg-alloc.ll | 4 +-- test/CodeGen/ARM/named-reg-notareg.ll | 4 +-- test/CodeGen/ARM/special-reg-acore.ll | 2 +- test/CodeGen/ARM/special-reg-mcore.ll | 4 +-- test/CodeGen/ARM/special-reg-v8m-base.ll | 2 +- test/CodeGen/ARM/special-reg-v8m-main.ll | 2 +- test/CodeGen/ARM/ssat-lower.ll | 4 +-- test/CodeGen/ARM/ssat-upper.ll | 4 +-- test/CodeGen/ARM/ssat-v4t.ll | 2 +- test/CodeGen/ARM/stc2.ll | 4 +-- test/CodeGen/ARM/usat-lower.ll | 4 +-- test/CodeGen/ARM/usat-upper.ll | 4 +-- test/CodeGen/ARM/usat-v4t.ll | 2 +- test/CodeGen/BPF/sdiv_error.ll | 2 +- test/CodeGen/BPF/xadd.ll | 8 ++--- .../Generic/llc-start-stop-instance-errors.ll | 2 +- test/CodeGen/Generic/llc-start-stop.ll | 12 +++---- .../Generic/opt-codegen-no-target-machine.ll | 2 +- test/CodeGen/Hexagon/misaligned-const-load.ll | 2 +- .../CodeGen/Hexagon/misaligned-const-store.ll | 2 +- .../Hexagon/verify-liveness-at-def.mir | 4 +-- test/CodeGen/Lanai/codemodel.ll | 4 +-- test/CodeGen/MIR/X86/machine-verifier.mir | 2 +- .../MIR/X86/tied-physical-regs-match.mir | 2 +- test/CodeGen/Mips/Fast-ISel/double-arg.ll | 2 +- .../fast-isel-softfloat-lower-args.ll | 2 +- test/CodeGen/Mips/cpus-no-mips64.ll | 14 ++++---- test/CodeGen/Mips/cpus.ll | 4 +-- test/CodeGen/Mips/fp64a.ll | 6 ++-- test/CodeGen/Mips/fpxx.ll | 4 +-- .../guards-verify-call.mir | 2 +- .../guards-verify-tailcall.mir | 2 +- .../unsupported-micromips.ll | 2 +- .../unsupported-mips32.ll | 2 +- test/CodeGen/Mips/instverify/dext-pos.mir | 2 +- test/CodeGen/Mips/instverify/dext-size.mir | 2 +- .../Mips/instverify/dextm-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/dextm-pos.mir | 2 +- test/CodeGen/Mips/instverify/dextm-size.mir | 2 +- .../Mips/instverify/dextu-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/dextu-pos.mir | 2 +- test/CodeGen/Mips/instverify/dextu-size.mir | 2 +- .../CodeGen/Mips/instverify/dins-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/dins-pos.mir | 2 +- test/CodeGen/Mips/instverify/dins-size.mir | 2 +- .../Mips/instverify/dinsm-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/dinsm-pos.mir | 2 +- test/CodeGen/Mips/instverify/dinsm-size.mir | 2 +- .../Mips/instverify/dinsu-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/dinsu-pos.mir | 2 +- test/CodeGen/Mips/instverify/dinsu-size.mir | 2 +- test/CodeGen/Mips/instverify/ext-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/ext-pos.mir | 2 +- test/CodeGen/Mips/instverify/ext-size.mir | 2 +- test/CodeGen/Mips/instverify/ins-pos-size.mir | 2 +- test/CodeGen/Mips/instverify/ins-pos.mir | 2 +- test/CodeGen/Mips/instverify/ins-size.mir | 2 +- test/CodeGen/Mips/interrupt-attr-64-error.ll | 2 +- .../CodeGen/Mips/interrupt-attr-args-error.ll | 2 +- test/CodeGen/Mips/interrupt-attr-error.ll | 2 +- test/CodeGen/Mips/micromips64-unsupported.ll | 4 +-- test/CodeGen/Mips/mips32r6/compatibility.ll | 2 +- test/CodeGen/Mips/mips64r6/compatibility.ll | 2 +- test/CodeGen/Mips/msa/3r-a.ll | 2 +- test/CodeGen/Mips/msa/immediates-bad.ll | 2 +- test/CodeGen/NVPTX/alias.ll | 2 +- test/CodeGen/NVPTX/fcos-no-fast-math.ll | 2 +- test/CodeGen/NVPTX/fsin-no-fast-math.ll | 2 +- test/CodeGen/NVPTX/global-ctor.ll | 2 +- test/CodeGen/NVPTX/global-dtor.ll | 2 +- test/CodeGen/NVPTX/libcall-instruction.ll | 2 +- test/CodeGen/NVPTX/libcall-intrinsic.ll | 2 +- test/CodeGen/PowerPC/aix-byval-param.ll | 4 +-- test/CodeGen/PowerPC/aix-cc-altivec.ll | 4 +-- test/CodeGen/PowerPC/aix-nest-param.ll | 4 +-- test/CodeGen/PowerPC/aix-trampoline.ll | 4 +-- .../PowerPC/aix-user-defined-memcpy.ll | 2 +- .../PowerPC/aix-xcoff-data-only-notoc.ll | 2 +- test/CodeGen/PowerPC/aix-xcoff-data.ll | 2 +- test/CodeGen/PowerPC/aix-xcoff-lcomm.ll | 2 +- test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 2 +- test/CodeGen/PowerPC/aix-xcoff-rodata.ll | 2 +- test/CodeGen/PowerPC/aix-xcoff-toc.ll | 2 +- test/CodeGen/PowerPC/codemodel.ll | 4 +-- .../CodeGen/PowerPC/lower-globaladdr32-aix.ll | 2 +- .../CodeGen/PowerPC/lower-globaladdr64-aix.ll | 2 +- test/CodeGen/PowerPC/named-reg-alloc-r0.ll | 6 ++-- test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll | 4 +-- test/CodeGen/PowerPC/named-reg-alloc-r2.ll | 2 +- test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll | 2 +- test/CodeGen/RISCV/get-register-invalid.ll | 2 +- test/CodeGen/RISCV/get-register-reserve.ll | 4 +-- .../RISCV/interrupt-attr-args-error.ll | 4 +-- test/CodeGen/RISCV/interrupt-attr-invalid.ll | 4 +-- .../CodeGen/RISCV/interrupt-attr-ret-error.ll | 4 +-- .../RISCV/mattr-invalid-combination.ll | 2 +- test/CodeGen/RISCV/module-target-abi.ll | 2 +- test/CodeGen/RISCV/module-target-abi2.ll | 2 +- test/CodeGen/RISCV/musttail-call.ll | 8 ++--- test/CodeGen/RISCV/rv32e.ll | 2 +- test/CodeGen/RISCV/target-abi-valid.ll | 2 +- test/CodeGen/RISCV/verify-instr.mir | 2 +- test/CodeGen/SPARC/codemodel.ll | 4 +-- test/CodeGen/SPARC/fail-alloca-align.ll | 4 +-- test/CodeGen/SPARC/sret-secondary.ll | 2 +- test/CodeGen/SystemZ/codemodel.ll | 4 +-- test/CodeGen/SystemZ/ghc-cc-02.ll | 2 +- test/CodeGen/SystemZ/ghc-cc-03.ll | 2 +- test/CodeGen/SystemZ/ghc-cc-04.ll | 2 +- test/CodeGen/SystemZ/ghc-cc-05.ll | 2 +- test/CodeGen/SystemZ/ghc-cc-06.ll | 2 +- test/CodeGen/SystemZ/ghc-cc-07.ll | 2 +- test/CodeGen/SystemZ/mnop-mcount-02.ll | 2 +- test/CodeGen/SystemZ/mrecord-mcount-02.ll | 2 +- test/CodeGen/SystemZ/mverify-optypes.mir | 3 +- test/CodeGen/SystemZ/vec-args-error-01.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-02.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-03.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-04.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-05.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-06.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-07.ll | 2 +- test/CodeGen/SystemZ/vec-args-error-08.ll | 2 +- test/CodeGen/WebAssembly/clear-cache.ll | 2 +- test/CodeGen/WebAssembly/cpus.ll | 8 ++--- test/CodeGen/WebAssembly/exception.ll | 2 +- test/CodeGen/WebAssembly/offset-atomics.ll | 2 +- .../WebAssembly/tls-general-dynamic.ll | 4 +-- test/CodeGen/X86/AppendingLinkage.ll | 2 +- .../X86/GlobalISel/avoid-matchtable-crash.mir | 2 +- ...fi-inserter-verify-inconsistent-offset.mir | 2 +- ...-inserter-verify-inconsistent-register.mir | 2 +- test/CodeGen/X86/clwb.ll | 2 +- test/CodeGen/X86/codemodel.ll | 2 +- test/CodeGen/X86/coff-comdat2.ll | 2 +- test/CodeGen/X86/coff-comdat3.ll | 2 +- test/CodeGen/X86/cpus-amd-no-x86_64.ll | 18 +++++------ test/CodeGen/X86/cpus-intel-no-x86_64.ll | 32 +++++++++---------- test/CodeGen/X86/cpus-no-x86_64.ll | 8 ++--- test/CodeGen/X86/equiv_with_fndef.ll | 2 +- test/CodeGen/X86/equiv_with_vardef.ll | 2 +- .../expand-integer-x86_64-intrinsic-error.ll | 2 +- test/CodeGen/X86/fast-isel-args-fail2.ll | 3 +- test/CodeGen/X86/inalloca-regparm.ll | 2 +- .../X86/inline-asm-avx-v-constraint-32bit.ll | 2 -- .../inline-asm-avx512vl-v-constraint-32bit.ll | 2 -- test/CodeGen/X86/invalid-liveness.mir | 2 +- test/CodeGen/X86/label-redefinition.ll | 2 +- test/CodeGen/X86/llc-print-machineinstrs.mir | 2 +- test/CodeGen/X86/macho-comdat.ll | 2 +- test/CodeGen/X86/named-reg-alloc.ll | 4 +-- test/CodeGen/X86/named-reg-notareg.ll | 4 +-- test/CodeGen/X86/nonconst-static-ev.ll | 2 +- test/CodeGen/X86/nonconst-static-iv.ll | 2 +- test/CodeGen/X86/read-fp-no-frame-pointer.ll | 2 +- test/CodeGen/X86/segmented-stacks.ll | 4 +-- test/CodeGen/XCore/alignment.ll | 2 +- test/CodeGen/XCore/codemodel.ll | 6 ++-- test/CodeGen/XCore/section-name.ll | 2 +- .../DebugInfo/COFF/types-recursive-unnamed.ll | 2 +- test/LTO/X86/attrs.ll | 2 +- .../illegal-subtarget-change.s | 2 +- test/MC/ARM/Windows/invalid-relocation.s | 2 +- test/MC/COFF/section-comdat-conflict.s | 2 +- test/MC/COFF/section-comdat-conflict2.s | 2 +- test/MC/Disassembler/AMDGPU/si-support.txt | 2 +- test/MC/ELF/ARM/bss-non-zero-value.s | 2 +- test/MC/ELF/common-error3.s | 4 +-- test/MC/ELF/section-numeric-invalid-type.s | 2 +- test/MC/MachO/variable-errors.s | 2 +- test/MC/Mips/micromips64-unsupported.s | 8 ++--- test/MC/Mips/micromips64r6-unsupported.s | 2 +- test/MC/Mips/nooddspreg-cmdarg.s | 4 +-- test/MC/PowerPC/ppc64-localentry-error1.s | 4 +-- test/MC/PowerPC/ppc64-localentry-error2.s | 4 +-- test/MC/PowerPC/pr24686.s | 2 +- test/MC/RISCV/mattr-invalid-combination.s | 2 +- test/MC/WebAssembly/blockaddress.ll | 2 +- .../data-symbol-in-text-section.ll | 2 +- .../bundle-group-too-large-error.s | 4 +-- .../bundle-lock-option-error.s | 2 +- .../bundle-subtarget-change-error.s | 4 +-- .../lock-without-bundle-mode-error.s | 2 +- .../switch-section-locked-error.s | 2 +- .../unlock-without-lock-error.s | 2 +- test/MC/X86/check-end-of-data-region.s | 2 +- test/MC/X86/encoder-fail.s | 2 +- test/MC/X86/invalid-sleb.s | 2 +- test/MC/X86/reloc-bss.s | 2 +- test/MachineVerifier/live-ins-01.mir | 2 +- test/MachineVerifier/live-ins-02.mir | 2 +- test/MachineVerifier/live-ins-03.mir | 2 +- test/MachineVerifier/test_copy.mir | 2 +- .../test_copy_mismatch_types.mir | 2 +- test/MachineVerifier/test_g_add.mir | 2 +- test/MachineVerifier/test_g_addrspacecast.mir | 2 +- test/MachineVerifier/test_g_bitcast.mir | 2 +- test/MachineVerifier/test_g_brjt.mir | 2 +- test/MachineVerifier/test_g_build_vector.mir | 2 +- .../test_g_build_vector_trunc.mir | 2 +- .../MachineVerifier/test_g_concat_vectors.mir | 2 +- test/MachineVerifier/test_g_constant.mir | 2 +- .../MachineVerifier/test_g_dyn_stackalloc.mir | 2 +- test/MachineVerifier/test_g_extract.mir | 2 +- test/MachineVerifier/test_g_fcmp.mir | 2 +- test/MachineVerifier/test_g_fconstant.mir | 2 +- test/MachineVerifier/test_g_icmp.mir | 2 +- test/MachineVerifier/test_g_insert.mir | 2 +- test/MachineVerifier/test_g_intrinsic.mir | 2 +- .../test_g_intrinsic_w_side_effects.mir | 2 +- test/MachineVerifier/test_g_inttoptr.mir | 2 +- test/MachineVerifier/test_g_jump_table.mir | 2 +- test/MachineVerifier/test_g_load.mir | 2 +- test/MachineVerifier/test_g_merge_values.mir | 2 +- test/MachineVerifier/test_g_phi.mir | 2 +- test/MachineVerifier/test_g_ptr_add.mir | 2 +- test/MachineVerifier/test_g_ptrtoint.mir | 2 +- test/MachineVerifier/test_g_select.mir | 2 +- test/MachineVerifier/test_g_sext_inreg.mir | 2 +- test/MachineVerifier/test_g_sextload.mir | 2 +- .../MachineVerifier/test_g_shuffle_vector.mir | 2 +- test/MachineVerifier/test_g_store.mir | 2 +- test/MachineVerifier/test_g_trunc.mir | 2 +- test/MachineVerifier/test_g_zextload.mir | 2 +- .../test_memccpy_intrinsics.mir | 2 +- .../test_phis_precede_nonphis.mir | 2 +- .../verifier-generic-extend-truncate.mir | 2 +- .../verifier-generic-types-1.mir | 2 +- .../verifier-generic-types-2.mir | 2 +- ...licit-virtreg-invalid-physreg-liveness.mir | 2 +- test/MachineVerifier/verifier-phi-fail0.mir | 2 +- .../verifier-pseudo-terminators.mir | 2 +- .../verify-regbankselected.mir | 2 +- test/MachineVerifier/verify-regops.mir | 2 +- test/MachineVerifier/verify-selected.mir | 2 +- test/Object/coff-invalid.test | 2 +- test/Object/elf-invalid-phdr.test | 4 +-- test/Object/invalid.test | 2 +- test/Object/wasm-invalid-file.yaml | 2 +- test/Object/wasm-string-outside-section.test | 2 +- test/Other/close-stderr.ll | 13 ++++++++ test/Other/optimization-remarks-inline.ll | 2 +- test/TableGen/HwModeSelect.td | 2 +- .../BlockExtractor/invalid-block.ll | 2 +- .../BlockExtractor/invalid-function.ll | 2 +- .../Transforms/BlockExtractor/invalid-line.ll | 2 +- .../FunctionImport/not-prevailing.ll | 2 +- test/Transforms/GCOVProfiling/version.ll | 4 +-- .../InstCombine/limit-max-iterations.ll | 2 +- test/tools/llvm-lto2/X86/pipeline.ll | 4 +-- .../llvm-readobj/COFF/arm64-many-epilogs.s | 2 +- .../llvm-readobj/COFF/arm64-win-error2.s | 2 +- 325 files changed, 453 insertions(+), 440 deletions(-) create mode 100644 test/Other/close-stderr.ll diff --git a/docs/ProgrammersManual.rst b/docs/ProgrammersManual.rst index 8f8fec611c4..98002f687a5 100644 --- a/docs/ProgrammersManual.rst +++ b/docs/ProgrammersManual.rst @@ -453,8 +453,8 @@ recovery. LLVM, there are places where this hasn't been practical to apply. In situations where you absolutely must emit a non-programmatic error and the ``Error`` model isn't workable you can call ``report_fatal_error``, - which will call installed error handlers, print a message, and abort the - program. The use of `report_fatal_error` in this case is discouraged. + which will call installed error handlers, print a message, and exit the + program. Recoverable errors are modeled using LLVM's ``Error`` scheme. This scheme represents errors using function return values, similar to classic C integer diff --git a/include/llvm/Support/ErrorHandling.h b/include/llvm/Support/ErrorHandling.h index 7678d8d6ba9..f75c2984a9f 100644 --- a/include/llvm/Support/ErrorHandling.h +++ b/include/llvm/Support/ErrorHandling.h @@ -66,7 +66,7 @@ class StringRef; /// /// If no error handler is installed the default is to print the message to /// standard error, followed by a newline. -/// After the error handler is called this function will call abort(), it +/// After the error handler is called this function will call exit(1), it /// does not return. LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason, bool gen_crash_diag = true); diff --git a/lib/Support/ErrorHandling.cpp b/lib/Support/ErrorHandling.cpp index f70a6921a41..a9463024c42 100644 --- a/lib/Support/ErrorHandling.cpp +++ b/lib/Support/ErrorHandling.cpp @@ -123,7 +123,7 @@ void llvm::report_fatal_error(const Twine &Reason, bool GenCrashDiag) { // files registered with RemoveFileOnSignal. sys::RunInterruptHandlers(); - abort(); + sys::Process::Exit(1); } void llvm::install_bad_alloc_error_handler(fatal_error_handler_t handler, diff --git a/test/Assembler/datalayout-invalid-function-ptr-alignment.ll b/test/Assembler/datalayout-invalid-function-ptr-alignment.ll index 4203c5546c2..21cd6a6dc78 100644 --- a/test/Assembler/datalayout-invalid-function-ptr-alignment.ll +++ b/test/Assembler/datalayout-invalid-function-ptr-alignment.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s +; RUN: not llvm-as %s 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 diff --git a/test/Assembler/datalayout-invalid-stack-natural-alignment.ll b/test/Assembler/datalayout-invalid-stack-natural-alignment.ll index 8fc18d86b1f..c8d7ba62ab8 100644 --- a/test/Assembler/datalayout-invalid-stack-natural-alignment.ll +++ b/test/Assembler/datalayout-invalid-stack-natural-alignment.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s +; RUN: not llvm-as %s 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 diff --git a/test/Assembler/getInt.ll b/test/Assembler/getInt.ll index 02f312b1bc6..8e2537ae6cf 100644 --- a/test/Assembler/getInt.ll +++ b/test/Assembler/getInt.ll @@ -1,3 +1,3 @@ -; RUN: not --crash opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int' +; RUN: not opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int' target datalayout = "p:4294967296:64:64" diff --git a/test/Assembler/invalid-datalayout-alloca-addrspace.ll b/test/Assembler/invalid-datalayout-alloca-addrspace.ll index 16670259ccf..f0407da73e4 100644 --- a/test/Assembler/invalid-datalayout-alloca-addrspace.ll +++ b/test/Assembler/invalid-datalayout-alloca-addrspace.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "A16777216" ; CHECK: Invalid address space, must be a 24-bit integer diff --git a/test/Assembler/invalid-datalayout-program-addrspace.ll b/test/Assembler/invalid-datalayout-program-addrspace.ll index fe0ab5c6087..e636b75dee4 100644 --- a/test/Assembler/invalid-datalayout-program-addrspace.ll +++ b/test/Assembler/invalid-datalayout-program-addrspace.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; CHECK: Invalid address space, must be a 24-bit integer target datalayout = "P16777216" diff --git a/test/Assembler/invalid-datalayout1.ll b/test/Assembler/invalid-datalayout1.ll index 5cf088b785b..d1befdcdf29 100644 --- a/test/Assembler/invalid-datalayout1.ll +++ b/test/Assembler/invalid-datalayout1.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "^" ; CHECK: Unknown specifier in datalayout string diff --git a/test/Assembler/invalid-datalayout10.ll b/test/Assembler/invalid-datalayout10.ll index 80e5d4026d9..9f19688f852 100644 --- a/test/Assembler/invalid-datalayout10.ll +++ b/test/Assembler/invalid-datalayout10.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "m" ; CHECK: Expected mangling specifier in datalayout string diff --git a/test/Assembler/invalid-datalayout11.ll b/test/Assembler/invalid-datalayout11.ll index 0fa99c5f7c2..f8fed8ff9ff 100644 --- a/test/Assembler/invalid-datalayout11.ll +++ b/test/Assembler/invalid-datalayout11.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "m." ; CHECK: Unexpected trailing characters after mangling specifier in datalayout string diff --git a/test/Assembler/invalid-datalayout12.ll b/test/Assembler/invalid-datalayout12.ll index 9a7535f7b6c..d79c196baab 100644 --- a/test/Assembler/invalid-datalayout12.ll +++ b/test/Assembler/invalid-datalayout12.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "f" ; CHECK: Missing alignment specification in datalayout string diff --git a/test/Assembler/invalid-datalayout13.ll b/test/Assembler/invalid-datalayout13.ll index 26dbf44f192..5ac719dbb7a 100644 --- a/test/Assembler/invalid-datalayout13.ll +++ b/test/Assembler/invalid-datalayout13.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = ":32" ; CHECK: Expected token before separator in datalayout string diff --git a/test/Assembler/invalid-datalayout14.ll b/test/Assembler/invalid-datalayout14.ll index 3ca2da41743..84634b52a14 100644 --- a/test/Assembler/invalid-datalayout14.ll +++ b/test/Assembler/invalid-datalayout14.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i64:64:16" ; CHECK: Preferred alignment cannot be less than the ABI alignment diff --git a/test/Assembler/invalid-datalayout15.ll b/test/Assembler/invalid-datalayout15.ll index 8fdfcbf1ee8..ea240b73fd2 100644 --- a/test/Assembler/invalid-datalayout15.ll +++ b/test/Assembler/invalid-datalayout15.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i64:16:16777216" ; CHECK: Invalid preferred alignment, must be a 16bit integer diff --git a/test/Assembler/invalid-datalayout16.ll b/test/Assembler/invalid-datalayout16.ll index 23f3e17e6d1..0dd1abb629b 100644 --- a/test/Assembler/invalid-datalayout16.ll +++ b/test/Assembler/invalid-datalayout16.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i64:16777216:16777216" ; CHECK: Invalid ABI alignment, must be a 16bit integer diff --git a/test/Assembler/invalid-datalayout17.ll b/test/Assembler/invalid-datalayout17.ll index 75c9b005c30..519f5c10ab3 100644 --- a/test/Assembler/invalid-datalayout17.ll +++ b/test/Assembler/invalid-datalayout17.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i16777216:16:16" ; CHECK: Invalid bit width, must be a 24bit integer diff --git a/test/Assembler/invalid-datalayout18.ll b/test/Assembler/invalid-datalayout18.ll index dc6e722445f..b9956f98c9c 100644 --- a/test/Assembler/invalid-datalayout18.ll +++ b/test/Assembler/invalid-datalayout18.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p:32:32:16" ; CHECK: Preferred alignment cannot be less than the ABI alignment diff --git a/test/Assembler/invalid-datalayout19.ll b/test/Assembler/invalid-datalayout19.ll index dc3fa2bde1b..fc0fc468520 100644 --- a/test/Assembler/invalid-datalayout19.ll +++ b/test/Assembler/invalid-datalayout19.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p:0:32:32" diff --git a/test/Assembler/invalid-datalayout2.ll b/test/Assembler/invalid-datalayout2.ll index 1f7db4e605a..a435612bf85 100644 --- a/test/Assembler/invalid-datalayout2.ll +++ b/test/Assembler/invalid-datalayout2.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "m:v" ; CHECK: Unknown mangling in datalayout string diff --git a/test/Assembler/invalid-datalayout20.ll b/test/Assembler/invalid-datalayout20.ll index 811488e945c..a9ac1d7fe09 100644 --- a/test/Assembler/invalid-datalayout20.ll +++ b/test/Assembler/invalid-datalayout20.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p:64:24:64" diff --git a/test/Assembler/invalid-datalayout21.ll b/test/Assembler/invalid-datalayout21.ll index 0db99d254b1..a39d1d7a14a 100644 --- a/test/Assembler/invalid-datalayout21.ll +++ b/test/Assembler/invalid-datalayout21.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p:64:64:24" diff --git a/test/Assembler/invalid-datalayout22.ll b/test/Assembler/invalid-datalayout22.ll index 3db71d7d1b2..14e4c2822ce 100644 --- a/test/Assembler/invalid-datalayout22.ll +++ b/test/Assembler/invalid-datalayout22.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "v128:0:128" diff --git a/test/Assembler/invalid-datalayout23.ll b/test/Assembler/invalid-datalayout23.ll index 308b0140cd9..430326327bc 100644 --- a/test/Assembler/invalid-datalayout23.ll +++ b/test/Assembler/invalid-datalayout23.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i32:24:32" diff --git a/test/Assembler/invalid-datalayout24.ll b/test/Assembler/invalid-datalayout24.ll index 0c38103c905..616ec64518a 100644 --- a/test/Assembler/invalid-datalayout24.ll +++ b/test/Assembler/invalid-datalayout24.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "i32:32:24" diff --git a/test/Assembler/invalid-datalayout3.ll b/test/Assembler/invalid-datalayout3.ll index 613d619c5a0..44535fd055b 100644 --- a/test/Assembler/invalid-datalayout3.ll +++ b/test/Assembler/invalid-datalayout3.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "n0" ; CHECK: Zero width native integer type in datalayout string diff --git a/test/Assembler/invalid-datalayout4.ll b/test/Assembler/invalid-datalayout4.ll index 5b174ff0618..2d946d32609 100644 --- a/test/Assembler/invalid-datalayout4.ll +++ b/test/Assembler/invalid-datalayout4.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p16777216:64:64:64" ; CHECK: Invalid address space, must be a 24bit integer diff --git a/test/Assembler/invalid-datalayout5.ll b/test/Assembler/invalid-datalayout5.ll index 6ca188a4fd5..3ce8791c087 100644 --- a/test/Assembler/invalid-datalayout5.ll +++ b/test/Assembler/invalid-datalayout5.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "a1:64" ; CHECK: Sized aggregate specification in datalayout string diff --git a/test/Assembler/invalid-datalayout6.ll b/test/Assembler/invalid-datalayout6.ll index f8ea6392a35..425099f7cad 100644 --- a/test/Assembler/invalid-datalayout6.ll +++ b/test/Assembler/invalid-datalayout6.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "a:" ; CHECK: Trailing separator in datalayout string diff --git a/test/Assembler/invalid-datalayout7.ll b/test/Assembler/invalid-datalayout7.ll index 66eb7643d11..097227ae6ae 100644 --- a/test/Assembler/invalid-datalayout7.ll +++ b/test/Assembler/invalid-datalayout7.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "p:52" ; CHECK: number of bits must be a byte width multiple diff --git a/test/Assembler/invalid-datalayout8.ll b/test/Assembler/invalid-datalayout8.ll index 2f7f18c7af5..28832ffb17d 100644 --- a/test/Assembler/invalid-datalayout8.ll +++ b/test/Assembler/invalid-datalayout8.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "e-p" ; CHECK: Missing size specification for pointer in datalayout string diff --git a/test/Assembler/invalid-datalayout9.ll b/test/Assembler/invalid-datalayout9.ll index 74b9dbacbf0..dfeac65cf60 100644 --- a/test/Assembler/invalid-datalayout9.ll +++ b/test/Assembler/invalid-datalayout9.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s +; RUN: not llvm-as < %s 2>&1 | FileCheck %s target datalayout = "e-p:64" ; CHECK: Missing alignment specification for pointer in datalayout string diff --git a/test/Bitcode/function-default-address-spaces.ll b/test/Bitcode/function-default-address-spaces.ll index 72b727924b4..e008f43501a 100644 --- a/test/Bitcode/function-default-address-spaces.ll +++ b/test/Bitcode/function-default-address-spaces.ll @@ -1,6 +1,6 @@ ; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s -check-prefixes CHECK,PROG-AS0 ; RUN: llvm-as -data-layout "P200" %s -o - | llvm-dis | FileCheck %s -check-prefixes CHECK,PROG-AS200 -; RUN: not --crash llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT +; RUN: not llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT ; BAD-DATALAYOUT: LLVM ERROR: Invalid address space, must be a 24-bit integer ; PROG-AS0-NOT: target datalayout diff --git a/test/Bitcode/invalid-functionptr-align.ll b/test/Bitcode/invalid-functionptr-align.ll index be7ce49e4d5..4ff797a4b01 100644 --- a/test/Bitcode/invalid-functionptr-align.ll +++ b/test/Bitcode/invalid-functionptr-align.ll @@ -1,5 +1,5 @@ ; Bitcode with invalid function pointer alignment. -; RUN: not --crash llvm-dis %s.bc -o - 2>&1 | FileCheck %s +; RUN: not llvm-dis %s.bc -o - 2>&1 | FileCheck %s CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 diff --git a/test/Bitcode/invalid.test b/test/Bitcode/invalid.test index 90303586ec3..8260ac86257 100644 --- a/test/Bitcode/invalid.test +++ b/test/Bitcode/invalid.test @@ -1,6 +1,6 @@ RUN: not llvm-dis -disable-output %p/Inputs/invalid-empty.bc 2>&1 | \ RUN: FileCheck --check-prefix=INVALID-EMPTY %s -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \ RUN: FileCheck --check-prefix=INVALID-ENCODING %s RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev.bc 2>&1 | \ RUN: FileCheck --check-prefix=BAD-ABBREV %s @@ -71,14 +71,14 @@ RUN: FileCheck --check-prefix=FP-SHIFT %s FP-SHIFT: Invalid record -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \ RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \ RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s HUGE-ABBREV-OP: Fixed or VBR abbrev record with size > MaxChunkData -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \ RUN: FileCheck --check-prefix=ARRAY-TYPE %s ARRAY-TYPE: Array element type can't be an Array or a Blob @@ -116,7 +116,7 @@ RUN: FileCheck --check-prefix=INVALID-CAST %s INVALID-CAST: Invalid cast -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \ RUN: FileCheck --check-prefix=ARRAY-NOT-2LAST %s ARRAY-NOT-2LAST: Array op not second to last @@ -176,7 +176,7 @@ RUN: FileCheck --check-prefix=INVALID-GVCOMDAT-ID %s INVALID-GVCOMDAT-ID: Invalid global variable comdat ID -RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \ +RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \ RUN: FileCheck --check-prefix=ABBREV-NO-OPS %s ABBREV-NO-OPS: Abbrev record with no operands diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll b/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll index 661bd0d121e..bbe8ea0da25 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll +++ b/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll @@ -1,9 +1,9 @@ -; RUN: not --crash llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +; RUN: not llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK ; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err -; RUN: not --crash llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN +; RUN: not llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN ; This file checks that the fallback path to selection dag works. ; The test is fragile in the sense that it must be updated to expose ; something that fails with global-isel. diff --git a/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll b/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll index 0894fbeb34a..72af098a894 100644 --- a/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll +++ b/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s +; RUN: not llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s ; REQUIRES: asserts ; Verify that we fall back to SelectionDAG, and error out when we can't tail call musttail functions diff --git a/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir b/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir index 9c318b7574b..7661626f6c1 100644 --- a/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir +++ b/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir @@ -1,4 +1,5 @@ -# RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s +# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s +# REQUIRES: asserts # This is to demonstrate what kind of bugs we're missing w/o some kind # of validation for LegalizerInfo: G_INTTOPTR could only be legal / diff --git a/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir b/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir index bbdc54a5121..0b5b7b440f2 100644 --- a/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir +++ b/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir @@ -1,4 +1,5 @@ -# RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s +# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s +# REQUIRES: asserts # This is to demonstrate what kind of bugs we're missing w/o some kind # of validation for LegalizerInfo: G_INTTOPTR could only be legal / diff --git a/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll b/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll index 6408f2e0b0d..f2e6fbce0d7 100644 --- a/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll +++ b/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s +; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64-unknown-unknown" diff --git a/test/CodeGen/AArch64/arm64-named-reg-alloc.ll b/test/CodeGen/AArch64/arm64-named-reg-alloc.ll index bd14ec61b55..5d48c17e128 100644 --- a/test/CodeGen/AArch64/arm64-named-reg-alloc.ll +++ b/test/CodeGen/AArch64/arm64-named-reg-alloc.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/AArch64/arm64-named-reg-notareg.ll b/test/CodeGen/AArch64/arm64-named-reg-notareg.ll index fe5f000a393..8a5fd6f1ac8 100644 --- a/test/CodeGen/AArch64/arm64-named-reg-notareg.ll +++ b/test/CodeGen/AArch64/arm64-named-reg-notareg.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/AArch64/arm64-tls-dynamics.ll b/test/CodeGen/AArch64/arm64-tls-dynamics.ll index 9a24d6acfa1..7ef51d7d4c0 100644 --- a/test/CodeGen/AArch64/arm64-tls-dynamics.ll +++ b/test/CodeGen/AArch64/arm64-tls-dynamics.ll @@ -9,7 +9,7 @@ ; FIXME: We currently produce "small" code for the tiny model ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=tiny -verify-machineinstrs < %s | FileCheck %s ; FIXME: We currently error for the large code model -; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE +; RUN: not llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE ; CHECK-LARGE: ELF TLS only supported in small memory model diff --git a/test/CodeGen/AArch64/arm64-tls-initial-exec.ll b/test/CodeGen/AArch64/arm64-tls-initial-exec.ll index d6df1a3907b..4f169678974 100644 --- a/test/CodeGen/AArch64/arm64-tls-initial-exec.ll +++ b/test/CodeGen/AArch64/arm64-tls-initial-exec.ll @@ -3,7 +3,7 @@ ; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=tiny < %s | FileCheck %s --check-prefix=CHECK-TINY ; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s -code-model=tiny | llvm-objdump -r - | FileCheck --check-prefix=CHECK-TINY-RELOC %s ; FIXME: We currently error for the large code model -; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE +; RUN: not llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE ; CHECK-LARGE: ELF TLS only supported in small memory model diff --git a/test/CodeGen/AArch64/fast-isel-sp-adjust.ll b/test/CodeGen/AArch64/fast-isel-sp-adjust.ll index 8d62fb35566..62815daa6c5 100644 --- a/test/CodeGen/AArch64/fast-isel-sp-adjust.ll +++ b/test/CodeGen/AArch64/fast-isel-sp-adjust.ll @@ -1,5 +1,5 @@ ; RUN: llc -O0 -fast-isel -mtriple=aarch64-apple-ios -o - %s | FileCheck %s -; RUN: not --crash llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t +; RUN: not llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t ; RUN: FileCheck %s --check-prefix=CHECK-ERRORS < %t ; The issue here is that FastISel cannot emit an ADDrr where one of the inputs diff --git a/test/CodeGen/AArch64/tiny_supported.ll b/test/CodeGen/AArch64/tiny_supported.ll index 400fde0aa0a..50f4a9c344a 100644 --- a/test/CodeGen/AArch64/tiny_supported.ll +++ b/test/CodeGen/AArch64/tiny_supported.ll @@ -1,8 +1,8 @@ ; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s ; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY ; CHECK-NOT: tiny code model is only supported on ELF ; CHECK-LABEL: foo diff --git a/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll b/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll index 5243076ea8b..8eee33af24a 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll +++ b/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s -; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s +; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s ; FIXME: Need constant bus fixup pre-gfx10 for movrel ; ERR: Bad machine code: VOP* instruction violates constant bus restriction diff --git a/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir b/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir index 8ea1d4b659a..2c7a03c0064 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s +# RUN: not llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s # ERR: *** Bad machine code: VOP* instruction violates constant bus restriction *** diff --git a/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll b/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll index 8c84c1c5e30..02f77141b41 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll +++ b/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll @@ -1,3 +1,3 @@ -; RUN: not --crash llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s +; RUN: not llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s ; CHECK: error: :0:0: in function load_zeroinit_lds_global void (i32 addrspace(1)*, i1): unsupported initializer for address space diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir index 845bffd1d9f..ccce93db415 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s +# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s # This needs to be expanded into a cmpxchg loop. # TODO: Will AtomicExpand still do this? diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir index 9f2be730569..96b33c1b768 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir @@ -1,6 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s -# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s # ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32) diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir index 7a880f86c08..40e5ccd2c1e 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s # CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test) diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir index 6f7ef466394..5ffbeab9872 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s # CHECK: LLVM ERROR: unable to legalize instruction: %1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0:_(<2 x s1>) (in function: test_unmerge_v2s1) diff --git a/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll b/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll index 806a16eb764..550a7312cbe 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll +++ b/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s +; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll diff --git a/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir b/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir index 7e1d3871616..32968c0250b 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir @@ -1,5 +1,5 @@ -# RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s -# RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s # Check behavior for illegal copies. diff --git a/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir b/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir index eb244190e56..95e0ada8004 100644 --- a/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir +++ b/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s # CHECK: *** Bad machine code: No live subrange at use *** # CHECK-NEXT: - function: at_least_one_value_should_be_defined_by_this_mask diff --git a/test/CodeGen/AMDGPU/branch-relax-spill.ll b/test/CodeGen/AMDGPU/branch-relax-spill.ll index 6ea73ed8c7a..e4d3df91d59 100644 --- a/test/CodeGen/AMDGPU/branch-relax-spill.ll +++ b/test/CodeGen/AMDGPU/branch-relax-spill.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s +; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s ; FIXME: This should be able to compile, but requires inserting an ; extra block to restore the scavenged register. diff --git a/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll b/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll index 1c5da794a5f..2d9183e6a99 100644 --- a/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll +++ b/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; FIXME: It should be invalid IR to have a call to a kernel, but this ; is currently relied on, but should be eliminated before codegen. diff --git a/test/CodeGen/AMDGPU/call-to-kernel.ll b/test/CodeGen/AMDGPU/call-to-kernel.ll index 24b019ccefe..6b457cfd4bf 100644 --- a/test/CodeGen/AMDGPU/call-to-kernel.ll +++ b/test/CodeGen/AMDGPU/call-to-kernel.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; FIXME: It should be invalid IR to have a call to a kernel, but this ; is currently relied on, but should be eliminated before codegen. diff --git a/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll b/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll index a37db5a2724..72c6cfee28d 100644 --- a/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll +++ b/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll @@ -1,6 +1,6 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ;CHECK: LLVM ERROR: unable to allocate function argument define amdgpu_gs { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @_amdgpu_gs_sgpr_i32 (i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg) { diff --git a/test/CodeGen/AMDGPU/div_i128.ll b/test/CodeGen/AMDGPU/div_i128.ll index 68fe7ec6234..80acf6804cc 100644 --- a/test/CodeGen/AMDGPU/div_i128.ll +++ b/test/CodeGen/AMDGPU/div_i128.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: unsupported libcall legalization define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { diff --git a/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll b/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll index 8881d9e7088..25b21326d57 100644 --- a/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll +++ b/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll @@ -1,8 +1,8 @@ -; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s -; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -o - %s | FileCheck -check-prefix=HSA-DEFAULT %s -; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s ; Flat instructions should not select if the target device doesn't ; support them. The default device should be able to select for HSA. diff --git a/test/CodeGen/AMDGPU/lds-initializer.ll b/test/CodeGen/AMDGPU/lds-initializer.ll index 42a9782ad0b..7cfe013b845 100644 --- a/test/CodeGen/AMDGPU/lds-initializer.ll +++ b/test/CodeGen/AMDGPU/lds-initializer.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; CHECK: lds: unsupported initializer for address space diff --git a/test/CodeGen/AMDGPU/lds-zero-initializer.ll b/test/CodeGen/AMDGPU/lds-zero-initializer.ll index 70bf4e951b9..367dd173f78 100644 --- a/test/CodeGen/AMDGPU/lds-zero-initializer.ll +++ b/test/CodeGen/AMDGPU/lds-zero-initializer.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; CHECK: lds: unsupported initializer for address space diff --git a/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll b/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll index 8ba2b0e5369..2d690ec7623 100644 --- a/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll +++ b/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s +; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s diff --git a/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll b/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll index 6b169e0f18f..34cbe396336 100644 --- a/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll +++ b/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s ; CHECK: invalid register "flat_scratch_lo" for subtarget. diff --git a/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll b/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll index 178b22f329b..6417d28e7aa 100644 --- a/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll +++ b/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s ; CHECK: invalid type for register "exec". diff --git a/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll b/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll index f05d900b39d..8e248fdfea4 100644 --- a/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll +++ b/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s ; CHECK: invalid type for register "m0". diff --git a/test/CodeGen/AMDGPU/unsupported-image-a16.ll b/test/CodeGen/AMDGPU/unsupported-image-a16.ll index c028adf5d93..e7346c4c1d4 100644 --- a/test/CodeGen/AMDGPU/unsupported-image-a16.ll +++ b/test/CodeGen/AMDGPU/unsupported-image-a16.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s +; RUN: not llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s ; Make sure this doesn't assert on targets without the r128-16 ; feature, and instead generates a slection error. diff --git a/test/CodeGen/AMDGPU/verify-sop.mir b/test/CodeGen/AMDGPU/verify-sop.mir index 040cd58f28c..53d749f7119 100644 --- a/test/CodeGen/AMDGPU/verify-sop.mir +++ b/test/CodeGen/AMDGPU/verify-sop.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s # CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants # CHECK: - instruction: %0:sreg_32_xm0 = S_ADD_I32 diff --git a/test/CodeGen/ARM/codemodel.ll b/test/CodeGen/ARM/codemodel.ll index ee435986c61..ec9982faba1 100644 --- a/test/CodeGen/ARM/codemodel.ll +++ b/test/CodeGen/ARM/codemodel.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL +; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; TINY: Target does not support the tiny CodeModel ; KERNEL: Target does not support the kernel CodeModel diff --git a/test/CodeGen/ARM/ldc2l.ll b/test/CodeGen/ARM/ldc2l.ll index bdfcbbf7df2..58d9509b167 100644 --- a/test/CodeGen/ARM/ldc2l.ll +++ b/test/CodeGen/ARM/ldc2l.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ldc2l define void @ldc2l(i8* %i) nounwind { diff --git a/test/CodeGen/ARM/machine-verifier.mir b/test/CodeGen/ARM/machine-verifier.mir index eab4d45e5ab..c5d678c38cf 100644 --- a/test/CodeGen/ARM/machine-verifier.mir +++ b/test/CodeGen/ARM/machine-verifier.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser runs the machine verifier after parsing. --- | diff --git a/test/CodeGen/ARM/named-reg-alloc.ll b/test/CodeGen/ARM/named-reg-alloc.ll index 535149a6745..d41fa64882c 100644 --- a/test/CodeGen/ARM/named-reg-alloc.ll +++ b/test/CodeGen/ARM/named-reg-alloc.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/ARM/named-reg-notareg.ll b/test/CodeGen/ARM/named-reg-notareg.ll index 0af94825005..45cb38f30f3 100644 --- a/test/CodeGen/ARM/named-reg-notareg.ll +++ b/test/CodeGen/ARM/named-reg-notareg.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/ARM/special-reg-acore.ll b/test/CodeGen/ARM/special-reg-acore.ll index 30e59b14685..3d65ff44bfb 100644 --- a/test/CodeGen/ARM/special-reg-acore.ll +++ b/test/CodeGen/ARM/special-reg-acore.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE -; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE +; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE ; MCORE: LLVM ERROR: Invalid register name "cpsr". diff --git a/test/CodeGen/ARM/special-reg-mcore.ll b/test/CodeGen/ARM/special-reg-mcore.ll index dff02ce2ea4..1ecf8dc77a7 100644 --- a/test/CodeGen/ARM/special-reg-mcore.ll +++ b/test/CodeGen/ARM/special-reg-mcore.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 --show-mc-encoding 2>&1 | FileCheck %s --check-prefix=MCORE -; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE -; RUN: not --crash llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE +; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE +; RUN: not llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE ; ACORE: LLVM ERROR: Invalid register name "control". ; M3CORE: LLVM ERROR: Invalid register name "xpsr_nzcvqg". diff --git a/test/CodeGen/ARM/special-reg-v8m-base.ll b/test/CodeGen/ARM/special-reg-v8m-base.ll index 5b74a55fe8c..20284daa046 100644 --- a/test/CodeGen/ARM/special-reg-v8m-base.ll +++ b/test/CodeGen/ARM/special-reg-v8m-base.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M +; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M ; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s ; V7M: LLVM ERROR: Invalid register name "sp_ns". diff --git a/test/CodeGen/ARM/special-reg-v8m-main.ll b/test/CodeGen/ARM/special-reg-v8m-main.ll index 9a314fa4c77..88f238cb83a 100644 --- a/test/CodeGen/ARM/special-reg-v8m-main.ll +++ b/test/CodeGen/ARM/special-reg-v8m-main.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE +; RUN: not llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE ; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE ; BASELINE: LLVM ERROR: Invalid register name "faultmask_ns". diff --git a/test/CodeGen/ARM/ssat-lower.ll b/test/CodeGen/ARM/ssat-lower.ll index 93930298fb4..9f0cd0364bc 100644 --- a/test/CodeGen/ARM/ssat-lower.ll +++ b/test/CodeGen/ARM/ssat-lower.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; immediate argument < lower-bound ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat diff --git a/test/CodeGen/ARM/ssat-upper.ll b/test/CodeGen/ARM/ssat-upper.ll index 9fcab67b4a7..e53f82b3efa 100644 --- a/test/CodeGen/ARM/ssat-upper.ll +++ b/test/CodeGen/ARM/ssat-upper.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; immediate argument > upper-bound ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat diff --git a/test/CodeGen/ARM/ssat-v4t.ll b/test/CodeGen/ARM/ssat-v4t.ll index 42511f92fdc..3d74c88da82 100644 --- a/test/CodeGen/ARM/ssat-v4t.ll +++ b/test/CodeGen/ARM/ssat-v4t.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s +; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s ; CHECK: Cannot select: intrinsic %llvm.arm.ssat define i32 @ssat() nounwind { diff --git a/test/CodeGen/ARM/stc2.ll b/test/CodeGen/ARM/stc2.ll index c4d7ff007f5..1127796387b 100644 --- a/test/CodeGen/ARM/stc2.ll +++ b/test/CodeGen/ARM/stc2.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.stc2 define void @stc2(i8* %i) nounwind { diff --git a/test/CodeGen/ARM/usat-lower.ll b/test/CodeGen/ARM/usat-lower.ll index 3d7b24d9373..58d3bba5a1f 100644 --- a/test/CodeGen/ARM/usat-lower.ll +++ b/test/CodeGen/ARM/usat-lower.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; immediate argument < lower-bound ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat diff --git a/test/CodeGen/ARM/usat-upper.ll b/test/CodeGen/ARM/usat-upper.ll index 4f186a013cd..84ad694725b 100644 --- a/test/CodeGen/ARM/usat-upper.ll +++ b/test/CodeGen/ARM/usat-upper.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s +; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; immediate argument > upper-bound ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat diff --git a/test/CodeGen/ARM/usat-v4t.ll b/test/CodeGen/ARM/usat-v4t.ll index 9cc75846ca3..572c760e3ae 100644 --- a/test/CodeGen/ARM/usat-v4t.ll +++ b/test/CodeGen/ARM/usat-v4t.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s +; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat define i32 @usat1() nounwind { diff --git a/test/CodeGen/BPF/sdiv_error.ll b/test/CodeGen/BPF/sdiv_error.ll index fc79a1d44c1..053b82dd98f 100644 --- a/test/CodeGen/BPF/sdiv_error.ll +++ b/test/CodeGen/BPF/sdiv_error.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=bpf < %s 2> %t1 +; RUN: not llc -march=bpf < %s 2> %t1 ; RUN: FileCheck %s < %t1 ; CHECK: Unsupport signed division diff --git a/test/CodeGen/BPF/xadd.ll b/test/CodeGen/BPF/xadd.ll index 6fd0a1f644b..0bf8576df1c 100644 --- a/test/CodeGen/BPF/xadd.ll +++ b/test/CodeGen/BPF/xadd.ll @@ -1,7 +1,7 @@ -; RUN: not --crash llc -march=bpfel < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=bpfeb < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s +; RUN: not llc -march=bpfel < %s 2>&1 | FileCheck %s +; RUN: not llc -march=bpfeb < %s 2>&1 | FileCheck %s +; RUN: not llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s +; RUN: not llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s ; This file is generated with the source command and source ; $ clang -target bpf -O2 -g -S -emit-llvm t.c diff --git a/test/CodeGen/Generic/llc-start-stop-instance-errors.ll b/test/CodeGen/Generic/llc-start-stop-instance-errors.ll index 76cc8b681b6..cb1b30f3a81 100644 --- a/test/CodeGen/Generic/llc-start-stop-instance-errors.ll +++ b/test/CodeGen/Generic/llc-start-stop-instance-errors.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \ +; RUN: not llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \ ; RUN: | FileCheck -check-prefix=NOT-NUM %s ; NOT-NUM: LLVM ERROR: invalid pass instance specifier dead-mi-elimination,arst diff --git a/test/CodeGen/Generic/llc-start-stop.ll b/test/CodeGen/Generic/llc-start-stop.ll index 4f2e708c4f2..fa34838a411 100644 --- a/test/CodeGen/Generic/llc-start-stop.ll +++ b/test/CodeGen/Generic/llc-start-stop.ll @@ -23,16 +23,16 @@ ; START-BEFORE: Loop Strength Reduction ; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl) -; RUN: not --crash llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE -; RUN: not --crash llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE -; RUN: not --crash llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER -; RUN: not --crash llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER +; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE +; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE +; RUN: not llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER +; RUN: not llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER ; NONEXISTENT-START-BEFORE: "nonexistent" pass is not registered. ; NONEXISTENT-STOP-BEFORE: "nonexistent" pass is not registered. ; NONEXISTENT-START-AFTER: "nonexistent" pass is not registered. ; NONEXISTENT-STOP-AFTER: "nonexistent" pass is not registered. -; RUN: not --crash llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START -; RUN: not --crash llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP +; RUN: not llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START +; RUN: not llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP ; DOUBLE-START: start-before and start-after specified! ; DOUBLE-STOP: stop-before and stop-after specified! diff --git a/test/CodeGen/Generic/opt-codegen-no-target-machine.ll b/test/CodeGen/Generic/opt-codegen-no-target-machine.ll index 413f09ba55d..c6cb1c2b657 100644 --- a/test/CodeGen/Generic/opt-codegen-no-target-machine.ll +++ b/test/CodeGen/Generic/opt-codegen-no-target-machine.ll @@ -1,3 +1,3 @@ -; RUN: not --crash opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s +; RUN: not opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s ; CHECK: Trying to construct TargetPassConfig without a target machine. Scheduling a CodeGen pass without a target triple set? diff --git a/test/CodeGen/Hexagon/misaligned-const-load.ll b/test/CodeGen/Hexagon/misaligned-const-load.ll index 74b744305a0..37d1155ca27 100644 --- a/test/CodeGen/Hexagon/misaligned-const-load.ll +++ b/test/CodeGen/Hexagon/misaligned-const-load.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s +; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s ; Check that the misaligned load is diagnosed. ; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-load.c:2:10 diff --git a/test/CodeGen/Hexagon/misaligned-const-store.ll b/test/CodeGen/Hexagon/misaligned-const-store.ll index 0a5b1aafcc0..311a56e13a7 100644 --- a/test/CodeGen/Hexagon/misaligned-const-store.ll +++ b/test/CodeGen/Hexagon/misaligned-const-store.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s +; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s ; Check that the misaligned store is diagnosed. ; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-store.c:2:10 diff --git a/test/CodeGen/Hexagon/verify-liveness-at-def.mir b/test/CodeGen/Hexagon/verify-liveness-at-def.mir index fefe2451409..149790c9863 100644 --- a/test/CodeGen/Hexagon/verify-liveness-at-def.mir +++ b/test/CodeGen/Hexagon/verify-liveness-at-def.mir @@ -1,8 +1,8 @@ # Using a trick to run simple-register-coalescing twice, that way # liveintervals should be preserved while running the machine verifier. # -# RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s -# RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s +# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s +# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s --- name: test_pass diff --git a/test/CodeGen/Lanai/codemodel.ll b/test/CodeGen/Lanai/codemodel.ll index acfbabacf33..72d1d65daf5 100644 --- a/test/CodeGen/Lanai/codemodel.ll +++ b/test/CodeGen/Lanai/codemodel.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=lanai < %s | FileCheck %s ; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s -; RUN: not --crash llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s -; RUN: not --crash llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s +; RUN: not llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s +; RUN: not llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s ; CHECK-TINY: Target does not support the tiny CodeModel ; CHECK-KERNEL: Target does not support the kernel CodeModel diff --git a/test/CodeGen/MIR/X86/machine-verifier.mir b/test/CodeGen/MIR/X86/machine-verifier.mir index 17aa16b4a43..16a55ea5fea 100644 --- a/test/CodeGen/MIR/X86/machine-verifier.mir +++ b/test/CodeGen/MIR/X86/machine-verifier.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser runs the machine verifier after parsing. --- | diff --git a/test/CodeGen/MIR/X86/tied-physical-regs-match.mir b/test/CodeGen/MIR/X86/tied-physical-regs-match.mir index 3d842f66f0a..8f531d96d1d 100644 --- a/test/CodeGen/MIR/X86/tied-physical-regs-match.mir +++ b/test/CodeGen/MIR/X86/tied-physical-regs-match.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the Machine Verifier detects tied physical registers # that doesn't match. diff --git a/test/CodeGen/Mips/Fast-ISel/double-arg.ll b/test/CodeGen/Mips/Fast-ISel/double-arg.ll index 84a284a5bf2..eb592189e60 100644 --- a/test/CodeGen/Mips/Fast-ISel/double-arg.ll +++ b/test/CodeGen/Mips/Fast-ISel/double-arg.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \ +; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \ ; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s ; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently diff --git a/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll b/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll index 18bc397480e..24161ca8238 100644 --- a/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll +++ b/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \ +; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \ ; RUN: -O0 -fast-isel-abort=3 -relocation-model=pic < %s ; Test that FastISel aborts instead of trying to lower arguments for soft-float. diff --git a/test/CodeGen/Mips/cpus-no-mips64.ll b/test/CodeGen/Mips/cpus-no-mips64.ll index 63b0140a8a6..301f6c2152e 100644 --- a/test/CodeGen/Mips/cpus-no-mips64.ll +++ b/test/CodeGen/Mips/cpus-no-mips64.ll @@ -1,13 +1,13 @@ ; Check that we reject 64-bit mode on 32-bit only CPUs. -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! diff --git a/test/CodeGen/Mips/cpus.ll b/test/CodeGen/Mips/cpus.ll index 182d13b1c7e..d9377044dca 100644 --- a/test/CodeGen/Mips/cpus.ll +++ b/test/CodeGen/Mips/cpus.ll @@ -57,9 +57,9 @@ ; Check that we reject CPUs that are not implemented. -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \ +; RUN: not llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \ ; RUN: | FileCheck %s --check-prefix=ERROR -; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \ +; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \ ; RUN: | FileCheck %s --check-prefix=ERROR ; ERROR: LLVM ERROR: Code generation for MIPS-{{.}} is not implemented diff --git a/test/CodeGen/Mips/fp64a.ll b/test/CodeGen/Mips/fp64a.ll index 2bf59052761..317afd7003b 100644 --- a/test/CodeGen/Mips/fp64a.ll +++ b/test/CodeGen/Mips/fp64a.ll @@ -7,16 +7,16 @@ ; We don't test MIPS32r1 since support for 64-bit coprocessors (such as a 64-bit ; FPU) on a 32-bit architecture was added in MIPS32r2. -; RUN: not --crash llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64 +; RUN: not llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-BE ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-LE ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A -; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A +; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A -; RUN: not --crash llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A +; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A ; 32R1-FP64: LLVM ERROR: FPU with 64-bit registers is not available on MIPS32 pre revision 2. Use -mcpu=mips32r2 or greater. ; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI. diff --git a/test/CodeGen/Mips/fpxx.ll b/test/CodeGen/Mips/fpxx.ll index 075eff1e580..6fdb95efe8e 100644 --- a/test/CodeGen/Mips/fpxx.ll +++ b/test/CodeGen/Mips/fpxx.ll @@ -5,10 +5,10 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32R2-FPXX ; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,4-NOFPXX -; RUN: not --crash llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX +; RUN: not llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX ; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,64-NOFPXX -; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX +; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,4-O32-NOFPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,4-O32-FPXX diff --git a/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir b/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir index 02fef74eeef..b1d177a22ea 100644 --- a/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir +++ b/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ +# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ # RUN: -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \ # RUN: | FileCheck %s diff --git a/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir b/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir index d313cad4d8d..e13c93bec24 100644 --- a/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir +++ b/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ +# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ # RUN: -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \ # RUN: | FileCheck %s diff --git a/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll b/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll index 23841d31e0b..99612525ae3 100644 --- a/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll +++ b/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s ; Test that microMIPS and indirect jump with hazard barriers is not supported. diff --git a/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll b/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll index be27eea5dac..48baedf53ea 100644 --- a/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll +++ b/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s ; Test that mips32 and indirect jump with hazard barriers is not supported. diff --git a/test/CodeGen/Mips/instverify/dext-pos.mir b/test/CodeGen/Mips/instverify/dext-pos.mir index 02dd9085c31..a93231b72a0 100644 --- a/test/CodeGen/Mips/instverify/dext-pos.mir +++ b/test/CodeGen/Mips/instverify/dext-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dext-size.mir b/test/CodeGen/Mips/instverify/dext-size.mir index 97cb085eac5..6ba7243cdfb 100644 --- a/test/CodeGen/Mips/instverify/dext-size.mir +++ b/test/CodeGen/Mips/instverify/dext-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dextm-pos-size.mir b/test/CodeGen/Mips/instverify/dextm-pos-size.mir index e76af1be949..fbf84819a0f 100644 --- a/test/CodeGen/Mips/instverify/dextm-pos-size.mir +++ b/test/CodeGen/Mips/instverify/dextm-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/dextm-pos.mir b/test/CodeGen/Mips/instverify/dextm-pos.mir index 26496838244..d4cf55bf6ca 100644 --- a/test/CodeGen/Mips/instverify/dextm-pos.mir +++ b/test/CodeGen/Mips/instverify/dextm-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dextm-size.mir b/test/CodeGen/Mips/instverify/dextm-size.mir index fc24a2756c6..cd9fd2de915 100644 --- a/test/CodeGen/Mips/instverify/dextm-size.mir +++ b/test/CodeGen/Mips/instverify/dextm-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dextu-pos-size.mir b/test/CodeGen/Mips/instverify/dextu-pos-size.mir index 7001221bb0d..782596ec4ec 100644 --- a/test/CodeGen/Mips/instverify/dextu-pos-size.mir +++ b/test/CodeGen/Mips/instverify/dextu-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/dextu-pos.mir b/test/CodeGen/Mips/instverify/dextu-pos.mir index b9e3b8c169e..418c98f44fd 100644 --- a/test/CodeGen/Mips/instverify/dextu-pos.mir +++ b/test/CodeGen/Mips/instverify/dextu-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dextu-size.mir b/test/CodeGen/Mips/instverify/dextu-size.mir index 8407a7a836f..70f12dd1a91 100644 --- a/test/CodeGen/Mips/instverify/dextu-size.mir +++ b/test/CodeGen/Mips/instverify/dextu-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dins-pos-size.mir b/test/CodeGen/Mips/instverify/dins-pos-size.mir index d72837850cf..ec6f24aed18 100644 --- a/test/CodeGen/Mips/instverify/dins-pos-size.mir +++ b/test/CodeGen/Mips/instverify/dins-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/dins-pos.mir b/test/CodeGen/Mips/instverify/dins-pos.mir index 71d4242c948..13a7c6536da 100644 --- a/test/CodeGen/Mips/instverify/dins-pos.mir +++ b/test/CodeGen/Mips/instverify/dins-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dins-size.mir b/test/CodeGen/Mips/instverify/dins-size.mir index 35848a936e5..63e6f9193c9 100644 --- a/test/CodeGen/Mips/instverify/dins-size.mir +++ b/test/CodeGen/Mips/instverify/dins-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsm-pos-size.mir b/test/CodeGen/Mips/instverify/dinsm-pos-size.mir index a00d3cf715a..bec2fc03431 100644 --- a/test/CodeGen/Mips/instverify/dinsm-pos-size.mir +++ b/test/CodeGen/Mips/instverify/dinsm-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsm-pos.mir b/test/CodeGen/Mips/instverify/dinsm-pos.mir index 0bbbdd23224..90dced0435d 100644 --- a/test/CodeGen/Mips/instverify/dinsm-pos.mir +++ b/test/CodeGen/Mips/instverify/dinsm-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsm-size.mir b/test/CodeGen/Mips/instverify/dinsm-size.mir index c1f5f044bde..9c8c247f9ea 100644 --- a/test/CodeGen/Mips/instverify/dinsm-size.mir +++ b/test/CodeGen/Mips/instverify/dinsm-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsu-pos-size.mir b/test/CodeGen/Mips/instverify/dinsu-pos-size.mir index 9f9953a8556..4209a8ddf61 100644 --- a/test/CodeGen/Mips/instverify/dinsu-pos-size.mir +++ b/test/CodeGen/Mips/instverify/dinsu-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsu-pos.mir b/test/CodeGen/Mips/instverify/dinsu-pos.mir index 12e999d5d48..7d4828d9294 100644 --- a/test/CodeGen/Mips/instverify/dinsu-pos.mir +++ b/test/CodeGen/Mips/instverify/dinsu-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/dinsu-size.mir b/test/CodeGen/Mips/instverify/dinsu-size.mir index f204a3373f7..d4c2f56c408 100644 --- a/test/CodeGen/Mips/instverify/dinsu-size.mir +++ b/test/CodeGen/Mips/instverify/dinsu-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/ext-pos-size.mir b/test/CodeGen/Mips/instverify/ext-pos-size.mir index c7b16fd50ab..b9c1d6193c9 100644 --- a/test/CodeGen/Mips/instverify/ext-pos-size.mir +++ b/test/CodeGen/Mips/instverify/ext-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/ext-pos.mir b/test/CodeGen/Mips/instverify/ext-pos.mir index ce2abeb3cdc..23cede00d31 100644 --- a/test/CodeGen/Mips/instverify/ext-pos.mir +++ b/test/CodeGen/Mips/instverify/ext-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/ext-size.mir b/test/CodeGen/Mips/instverify/ext-size.mir index 57737ea6028..8b8ae45ded4 100644 --- a/test/CodeGen/Mips/instverify/ext-size.mir +++ b/test/CodeGen/Mips/instverify/ext-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/instverify/ins-pos-size.mir b/test/CodeGen/Mips/instverify/ins-pos-size.mir index 1e48f1e8a23..9220bbdb747 100644 --- a/test/CodeGen/Mips/instverify/ins-pos-size.mir +++ b/test/CodeGen/Mips/instverify/ins-pos-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position + Size is out of range! diff --git a/test/CodeGen/Mips/instverify/ins-pos.mir b/test/CodeGen/Mips/instverify/ins-pos.mir index c72e6f5a3be..3932d174be9 100644 --- a/test/CodeGen/Mips/instverify/ins-pos.mir +++ b/test/CodeGen/Mips/instverify/ins-pos.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Position operand is out of range! diff --git a/test/CodeGen/Mips/instverify/ins-size.mir b/test/CodeGen/Mips/instverify/ins-size.mir index 92319bd3ff8..4f5348c2951 100644 --- a/test/CodeGen/Mips/instverify/ins-size.mir +++ b/test/CodeGen/Mips/instverify/ins-size.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ +# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # CHECK: Size operand is out of range! diff --git a/test/CodeGen/Mips/interrupt-attr-64-error.ll b/test/CodeGen/Mips/interrupt-attr-64-error.ll index 02c0e3d5b77..9626bda45f5 100644 --- a/test/CodeGen/Mips/interrupt-attr-64-error.ll +++ b/test/CodeGen/Mips/interrupt-attr-64-error.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t +; RUN: not llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t ; RUN: FileCheck %s < %t ; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time. diff --git a/test/CodeGen/Mips/interrupt-attr-args-error.ll b/test/CodeGen/Mips/interrupt-attr-args-error.ll index dd2cf443c7c..993629bdbcd 100644 --- a/test/CodeGen/Mips/interrupt-attr-args-error.ll +++ b/test/CodeGen/Mips/interrupt-attr-args-error.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t +; RUN: not llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t ; RUN: FileCheck %s < %t ; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments! diff --git a/test/CodeGen/Mips/interrupt-attr-error.ll b/test/CodeGen/Mips/interrupt-attr-error.ll index d84e511a23f..f35e98ea14b 100644 --- a/test/CodeGen/Mips/interrupt-attr-error.ll +++ b/test/CodeGen/Mips/interrupt-attr-error.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t +; RUN: not llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t ; RUN: FileCheck %s < %t ; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets. diff --git a/test/CodeGen/Mips/micromips64-unsupported.ll b/test/CodeGen/Mips/micromips64-unsupported.ll index 0f24167e315..713722ea120 100644 --- a/test/CodeGen/Mips/micromips64-unsupported.ll +++ b/test/CodeGen/Mips/micromips64-unsupported.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6 -; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64 +; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6 +; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64 ; Test that microMIPS64(R6) is not supported. diff --git a/test/CodeGen/Mips/mips32r6/compatibility.ll b/test/CodeGen/Mips/mips32r6/compatibility.ll index 1adb1bc944e..8eac8d4683d 100644 --- a/test/CodeGen/Mips/mips32r6/compatibility.ll +++ b/test/CodeGen/Mips/mips32r6/compatibility.ll @@ -1,5 +1,5 @@ ; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck %s -; RUN: not --crash llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s +; RUN: not llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s ; CHECK: foo: ; DSP: MIPS32r6 is not compatible with the DSP ASE diff --git a/test/CodeGen/Mips/mips64r6/compatibility.ll b/test/CodeGen/Mips/mips64r6/compatibility.ll index 8b7607eccc7..174f4ce1771 100644 --- a/test/CodeGen/Mips/mips64r6/compatibility.ll +++ b/test/CodeGen/Mips/mips64r6/compatibility.ll @@ -1,5 +1,5 @@ ; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s -; RUN: not --crash llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s +; RUN: not llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s ; CHECK: foo: ; DSP: MIPS64r6 is not compatible with the DSP ASE diff --git a/test/CodeGen/Mips/msa/3r-a.ll b/test/CodeGen/Mips/msa/3r-a.ll index 47d8eaa68be..933c4ed6946 100644 --- a/test/CodeGen/Mips/msa/3r-a.ll +++ b/test/CodeGen/Mips/msa/3r-a.ll @@ -5,7 +5,7 @@ ; RUN: llc -march=mipsel -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s ; It should fail to compile without fp64. -; RUN: not --crash llc -march=mips -mattr=+msa < %s 2>&1 | \ +; RUN: not llc -march=mips -mattr=+msa < %s 2>&1 | \ ; RUN: FileCheck -check-prefix=FP32ERROR %s ; FP32ERROR: LLVM ERROR: MSA requires a 64-bit FPU register file (FR=1 mode). diff --git a/test/CodeGen/Mips/msa/immediates-bad.ll b/test/CodeGen/Mips/msa/immediates-bad.ll index cd0ef21d002..efb3dfc4be4 100644 --- a/test/CodeGen/Mips/msa/immediates-bad.ll +++ b/test/CodeGen/Mips/msa/immediates-bad.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1 +; RUN: not llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1 ; RUN: FileCheck %s < %t1 ; Test that the immediate intrinsics with out of range values trigger an error. diff --git a/test/CodeGen/NVPTX/alias.ll b/test/CodeGen/NVPTX/alias.ll index 6dad3845b08..a2785192769 100644 --- a/test/CodeGen/NVPTX/alias.ll +++ b/test/CodeGen/NVPTX/alias.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; Check that llc dies gracefully when given an alias. diff --git a/test/CodeGen/NVPTX/fcos-no-fast-math.ll b/test/CodeGen/NVPTX/fcos-no-fast-math.ll index 7294958dcd7..d435c1d14fe 100644 --- a/test/CodeGen/NVPTX/fcos-no-fast-math.ll +++ b/test/CodeGen/NVPTX/fcos-no-fast-math.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; Check that we fail to select fcos without fast-math enabled diff --git a/test/CodeGen/NVPTX/fsin-no-fast-math.ll b/test/CodeGen/NVPTX/fsin-no-fast-math.ll index 083aa1da3e2..56396b84925 100644 --- a/test/CodeGen/NVPTX/fsin-no-fast-math.ll +++ b/test/CodeGen/NVPTX/fsin-no-fast-math.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; Check that we fail to select fsin without fast-math enabled diff --git a/test/CodeGen/NVPTX/global-ctor.ll b/test/CodeGen/NVPTX/global-ctor.ll index b7206dce661..89155db08ea 100644 --- a/test/CodeGen/NVPTX/global-ctor.ll +++ b/test/CodeGen/NVPTX/global-ctor.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; Check that llc dies when given a nonempty global ctor. @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }] diff --git a/test/CodeGen/NVPTX/global-dtor.ll b/test/CodeGen/NVPTX/global-dtor.ll index 6125b65c409..9d01f9bd387 100644 --- a/test/CodeGen/NVPTX/global-dtor.ll +++ b/test/CodeGen/NVPTX/global-dtor.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; Check that llc dies when given a nonempty global dtor. @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }] diff --git a/test/CodeGen/NVPTX/libcall-instruction.ll b/test/CodeGen/NVPTX/libcall-instruction.ll index 33bd9a4c8e3..a40a504c94c 100644 --- a/test/CodeGen/NVPTX/libcall-instruction.ll +++ b/test/CodeGen/NVPTX/libcall-instruction.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s ; used to panic on failed assertion and now fails with an "Undefined external symbol" ; CHECK: LLVM ERROR: Undefined external symbol "__umodti3" diff --git a/test/CodeGen/NVPTX/libcall-intrinsic.ll b/test/CodeGen/NVPTX/libcall-intrinsic.ll index 4778667002c..0b5e0224399 100644 --- a/test/CodeGen/NVPTX/libcall-intrinsic.ll +++ b/test/CodeGen/NVPTX/libcall-intrinsic.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s +; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s ; used to seqfault and now fails with an "Undefined external symbol" ; CHECK: LLVM ERROR: Undefined external symbol "__powidf2" diff --git a/test/CodeGen/PowerPC/aix-byval-param.ll b/test/CodeGen/PowerPC/aix-byval-param.ll index 2dfdf7f8535..951475438d5 100644 --- a/test/CodeGen/PowerPC/aix-byval-param.ll +++ b/test/CodeGen/PowerPC/aix-byval-param.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s %struct.S = type { i32, i32 } diff --git a/test/CodeGen/PowerPC/aix-cc-altivec.ll b/test/CodeGen/PowerPC/aix-cc-altivec.ll index 5be6213398d..59ad57e1bba 100644 --- a/test/CodeGen/PowerPC/aix-cc-altivec.ll +++ b/test/CodeGen/PowerPC/aix-cc-altivec.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s ; This test expects a compiler diagnostic for an AIX limitation on Altivec ; support. When the Altivec limitation diagnostic is removed, this test diff --git a/test/CodeGen/PowerPC/aix-nest-param.ll b/test/CodeGen/PowerPC/aix-nest-param.ll index f768eba31d5..8534c80ca64 100644 --- a/test/CodeGen/PowerPC/aix-nest-param.ll +++ b/test/CodeGen/PowerPC/aix-nest-param.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s define i8* @nest_receiver(i8* nest %arg) nounwind { ret i8* %arg diff --git a/test/CodeGen/PowerPC/aix-trampoline.ll b/test/CodeGen/PowerPC/aix-trampoline.ll index 4e5cbb6a7e6..5c45dc58896 100644 --- a/test/CodeGen/PowerPC/aix-trampoline.ll +++ b/test/CodeGen/PowerPC/aix-trampoline.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: INIT_TRAMPOLINE operation is not supported on AIX. diff --git a/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll index b179b86c896..9116ea4e8d9 100644 --- a/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll +++ b/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll @@ -8,7 +8,7 @@ ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s -; RUN: not --crash llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: not llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \ ; RUN: --check-prefix=64-CHECK %s diff --git a/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll b/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll index a1f1f12f968..d6e772ffc92 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll @@ -4,7 +4,7 @@ ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: FileCheck --check-prefix=OBJ64 %s ; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/aix-xcoff-data.ll b/test/CodeGen/PowerPC/aix-xcoff-data.ll index 44a740c7c7a..d911383dcff 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-data.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-data.ll @@ -9,7 +9,7 @@ ; RUN: FileCheck --check-prefix=OBJ %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll b/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll index ad77eeb349d..536229fc8c4 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll @@ -6,7 +6,7 @@ ; RUN: FileCheck --check-prefix=OBJ %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: FileCheck --check-prefix=OBJ64 %s ; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/test/CodeGen/PowerPC/aix-xcoff-reloc.ll index 0b8f43f9c79..8b7032af660 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-reloc.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-reloc.ll @@ -5,7 +5,7 @@ ; RUN: llvm-readobj -t %t.o | FileCheck --check-prefix=SYM %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s -; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \ +; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \ ; RUN: FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/test/CodeGen/PowerPC/aix-xcoff-rodata.ll index 05fde17c952..e846b39f07c 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-rodata.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-rodata.ll @@ -7,7 +7,7 @@ ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s -; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ +; RUN: not llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/aix-xcoff-toc.ll b/test/CodeGen/PowerPC/aix-xcoff-toc.ll index feab85f87bc..543cca72029 100644 --- a/test/CodeGen/PowerPC/aix-xcoff-toc.ll +++ b/test/CodeGen/PowerPC/aix-xcoff-toc.ll @@ -6,7 +6,7 @@ ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s -; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \ +; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \ ; RUN: < %s | FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/test/CodeGen/PowerPC/codemodel.ll b/test/CodeGen/PowerPC/codemodel.ll index cbceaf78b17..ee3ceae6df2 100644 --- a/test/CodeGen/PowerPC/codemodel.ll +++ b/test/CodeGen/PowerPC/codemodel.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL +; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; TINY: Target does not support the tiny CodeModel ; KERNEL: Target does not support the kernel CodeModel diff --git a/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll b/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll index 78cf10ebe68..3f02d4f6c3e 100644 --- a/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll +++ b/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll @@ -2,7 +2,7 @@ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: %s | FileCheck --check-prefix=SMALL %s -; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \ +; RUN: not llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \ ; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large \ diff --git a/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll b/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll index 29119f3257a..7e00a595c60 100644 --- a/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll +++ b/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll @@ -2,7 +2,7 @@ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: %s | FileCheck --check-prefix=SMALL %s -; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \ +; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \ ; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large \ diff --git a/test/CodeGen/PowerPC/named-reg-alloc-r0.ll b/test/CodeGen/PowerPC/named-reg-alloc-r0.ll index 11cb72296e2..2506f474cb2 100644 --- a/test/CodeGen/PowerPC/named-reg-alloc-r0.ll +++ b/test/CodeGen/PowerPC/named-reg-alloc-r0.ll @@ -1,6 +1,6 @@ -; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s define i32 @get_reg() nounwind { entry: diff --git a/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll b/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll index 3df778f445c..de251350861 100644 --- a/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll +++ b/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s define i64 @get_reg() nounwind { entry: diff --git a/test/CodeGen/PowerPC/named-reg-alloc-r2.ll b/test/CodeGen/PowerPC/named-reg-alloc-r2.ll index ca79f857548..0083f47fd2a 100644 --- a/test/CodeGen/PowerPC/named-reg-alloc-r2.ll +++ b/test/CodeGen/PowerPC/named-reg-alloc-r2.ll @@ -1,5 +1,5 @@ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32 +; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32 define i32 @get_reg() nounwind { entry: diff --git a/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll b/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll index e0ff14e60bb..65b45ea555a 100644 --- a/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll +++ b/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll @@ -1,6 +1,6 @@ ; Test the ICBT instruction is not emitted on POWER7 ; Based on the ppc64-prefetch.ll test -; RUN: not --crash llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s declare void @llvm.prefetch(i8*, i32, i32, i32) diff --git a/test/CodeGen/RISCV/get-register-invalid.ll b/test/CodeGen/RISCV/get-register-invalid.ll index 1f23445b4f7..ee8ec44cef5 100644 --- a/test/CodeGen/RISCV/get-register-invalid.ll +++ b/test/CodeGen/RISCV/get-register-invalid.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=riscv32 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=riscv32 2>&1 | FileCheck %s define i32 @get_invalid_reg() nounwind { entry: diff --git a/test/CodeGen/RISCV/get-register-reserve.ll b/test/CodeGen/RISCV/get-register-reserve.ll index 87acd70ec62..7549b4dd3f6 100644 --- a/test/CodeGen/RISCV/get-register-reserve.ll +++ b/test/CodeGen/RISCV/get-register-reserve.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \ +; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \ ; RUN: | FileCheck -check-prefix=NO-RESERVE-A1 %s -; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \ +; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \ ; RUN: | FileCheck -check-prefix=NO-RESERVE-FP %s ; RUN: llc < %s -mtriple=riscv32 -mattr +reserve-x8 -mattr +reserve-x11 \ ; RUN: | FileCheck -check-prefix=RESERVE %s diff --git a/test/CodeGen/RISCV/interrupt-attr-args-error.ll b/test/CodeGen/RISCV/interrupt-attr-args-error.ll index 3458780bfc5..5f246cd6629 100644 --- a/test/CodeGen/RISCV/interrupt-attr-args-error.ll +++ b/test/CodeGen/RISCV/interrupt-attr-args-error.ll @@ -1,6 +1,6 @@ -; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments! diff --git a/test/CodeGen/RISCV/interrupt-attr-invalid.ll b/test/CodeGen/RISCV/interrupt-attr-invalid.ll index 2bcec1589df..bddca8af746 100644 --- a/test/CodeGen/RISCV/interrupt-attr-invalid.ll +++ b/test/CodeGen/RISCV/interrupt-attr-invalid.ll @@ -1,6 +1,6 @@ -; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Function interrupt attribute argument not supported! diff --git a/test/CodeGen/RISCV/interrupt-attr-ret-error.ll b/test/CodeGen/RISCV/interrupt-attr-ret-error.ll index a865090546f..58827a86060 100644 --- a/test/CodeGen/RISCV/interrupt-attr-ret-error.ll +++ b/test/CodeGen/RISCV/interrupt-attr-ret-error.ll @@ -1,6 +1,6 @@ -; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Functions with the interrupt attribute must have void return type! diff --git a/test/CodeGen/RISCV/mattr-invalid-combination.ll b/test/CodeGen/RISCV/mattr-invalid-combination.ll index fe4d570b9d9..cb24405b160 100644 --- a/test/CodeGen/RISCV/mattr-invalid-combination.ll +++ b/test/CodeGen/RISCV/mattr-invalid-combination.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \ +; RUN: not llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=RV64E %s ; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target diff --git a/test/CodeGen/RISCV/module-target-abi.ll b/test/CodeGen/RISCV/module-target-abi.ll index bc61c50b082..b2930a06ab7 100644 --- a/test/CodeGen/RISCV/module-target-abi.ll +++ b/test/CodeGen/RISCV/module-target-abi.ll @@ -2,7 +2,7 @@ ; RUN: | FileCheck -check-prefix=DEFAULT %s ; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s -; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ +; RUN: not llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s ; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s diff --git a/test/CodeGen/RISCV/module-target-abi2.ll b/test/CodeGen/RISCV/module-target-abi2.ll index 8664c9add06..f07f2770ace 100644 --- a/test/CodeGen/RISCV/module-target-abi2.ll +++ b/test/CodeGen/RISCV/module-target-abi2.ll @@ -1,6 +1,6 @@ ; RUN: llc -mtriple=riscv32 < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=DEFAULT %s -; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ +; RUN: not llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s ; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s diff --git a/test/CodeGen/RISCV/musttail-call.ll b/test/CodeGen/RISCV/musttail-call.ll index 37b0ab45692..551aa7245ce 100644 --- a/test/CodeGen/RISCV/musttail-call.ll +++ b/test/CodeGen/RISCV/musttail-call.ll @@ -1,12 +1,12 @@ ; Check that we error out if tail is not possible but call is marked as mustail. -; RUN: not --crash llc -mtriple riscv32-unknown-linux-gnu -o - %s \ +; RUN: not llc -mtriple riscv32-unknown-linux-gnu -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv64-unknown-linux-gnu -o - %s \ +; RUN: not llc -mtriple riscv64-unknown-linux-gnu -o - %s \ ; RUN: 2>&1 | FileCheck %s -; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \ +; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: 2>&1 | FileCheck %s %struct.A = type { i32 } diff --git a/test/CodeGen/RISCV/rv32e.ll b/test/CodeGen/RISCV/rv32e.ll index 88379ab4387..2416639dc93 100644 --- a/test/CodeGen/RISCV/rv32e.ll +++ b/test/CodeGen/RISCV/rv32e.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s ; CHECK: LLVM ERROR: Codegen not yet implemented for RV32E diff --git a/test/CodeGen/RISCV/target-abi-valid.ll b/test/CodeGen/RISCV/target-abi-valid.ll index 2d4079601f7..2bd7dde3cd8 100644 --- a/test/CodeGen/RISCV/target-abi-valid.ll +++ b/test/CodeGen/RISCV/target-abi-valid.ll @@ -34,7 +34,7 @@ define void @nothing() nounwind { ret void } -; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \ +; RUN: not llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \ ; RUN: | FileCheck -check-prefix=CHECK-UNIMP %s ; CHECK-UNIMP: LLVM ERROR: Don't know how to lower this ABI diff --git a/test/CodeGen/RISCV/verify-instr.mir b/test/CodeGen/RISCV/verify-instr.mir index 58fcbc3e47d..ed31126b53d 100644 --- a/test/CodeGen/RISCV/verify-instr.mir +++ b/test/CodeGen/RISCV/verify-instr.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s +# RUN: not llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s # CHECK: *** Bad machine code: Invalid immediate *** # CHECK: - instruction: $x2 = ADDI $x1, 10000 diff --git a/test/CodeGen/SPARC/codemodel.ll b/test/CodeGen/SPARC/codemodel.ll index fae56b801c9..68da48a0e95 100644 --- a/test/CodeGen/SPARC/codemodel.ll +++ b/test/CodeGen/SPARC/codemodel.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL +; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; TINY: Target does not support the tiny CodeModel ; KERNEL: Target does not support the kernel CodeModel diff --git a/test/CodeGen/SPARC/fail-alloca-align.ll b/test/CodeGen/SPARC/fail-alloca-align.ll index 062e3a4489f..b8d84a901f5 100644 --- a/test/CodeGen/SPARC/fail-alloca-align.ll +++ b/test/CodeGen/SPARC/fail-alloca-align.ll @@ -2,8 +2,8 @@ ;; alignment greater than the stack alignment. This code ought to ;; compile, but doesn't currently. -;; RUN: not --crash llc -march=sparc < %s 2>&1 | FileCheck %s -;; RUN: not --crash llc -march=sparcv9 < %s 2>&1 | FileCheck %s +;; RUN: not llc -march=sparc < %s 2>&1 | FileCheck %s +;; RUN: not llc -march=sparcv9 < %s 2>&1 | FileCheck %s ;; CHECK: ERROR: Function {{.*}} required stack re-alignment define void @variable_alloca_with_overalignment(i32 %num) { diff --git a/test/CodeGen/SPARC/sret-secondary.ll b/test/CodeGen/SPARC/sret-secondary.ll index 8f334e82383..4efcabfc6fb 100644 --- a/test/CodeGen/SPARC/sret-secondary.ll +++ b/test/CodeGen/SPARC/sret-secondary.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s ; CHECK: sparc only supports sret on the first parameter diff --git a/test/CodeGen/SystemZ/codemodel.ll b/test/CodeGen/SystemZ/codemodel.ll index a96a28a5167..4375366cfd7 100644 --- a/test/CodeGen/SystemZ/codemodel.ll +++ b/test/CodeGen/SystemZ/codemodel.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY -; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL +; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY +; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; TINY: Target does not support the tiny CodeModel ; KERNEL: Target does not support the kernel CodeModel diff --git a/test/CodeGen/SystemZ/ghc-cc-02.ll b/test/CodeGen/SystemZ/ghc-cc-02.ll index dfe3b269417..1d13429d208 100644 --- a/test/CodeGen/SystemZ/ghc-cc-02.ll +++ b/test/CodeGen/SystemZ/ghc-cc-02.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; Check that no more than 12 integer arguments are passed ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s define ghccc void @foo() nounwind { entry: diff --git a/test/CodeGen/SystemZ/ghc-cc-03.ll b/test/CodeGen/SystemZ/ghc-cc-03.ll index 1761cc4f09b..1db7a3ff3db 100644 --- a/test/CodeGen/SystemZ/ghc-cc-03.ll +++ b/test/CodeGen/SystemZ/ghc-cc-03.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; In GHC calling convention the only allowed return type is void ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s define ghccc i64 @foo() nounwind { entry: diff --git a/test/CodeGen/SystemZ/ghc-cc-04.ll b/test/CodeGen/SystemZ/ghc-cc-04.ll index d6b089808cf..0dbe5472207 100644 --- a/test/CodeGen/SystemZ/ghc-cc-04.ll +++ b/test/CodeGen/SystemZ/ghc-cc-04.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; Thread local storage is not supported in GHC calling convention ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s @x = thread_local global i32 0 diff --git a/test/CodeGen/SystemZ/ghc-cc-05.ll b/test/CodeGen/SystemZ/ghc-cc-05.ll index 68c0ee2e9ed..be2cc67807b 100644 --- a/test/CodeGen/SystemZ/ghc-cc-05.ll +++ b/test/CodeGen/SystemZ/ghc-cc-05.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; Variable-sized stack allocations are not supported in GHC calling convention ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s define ghccc void @foo() nounwind { entry: diff --git a/test/CodeGen/SystemZ/ghc-cc-06.ll b/test/CodeGen/SystemZ/ghc-cc-06.ll index e0213e92593..04df248c29f 100644 --- a/test/CodeGen/SystemZ/ghc-cc-06.ll +++ b/test/CodeGen/SystemZ/ghc-cc-06.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; At most 2048*sizeof(long)=16384 bytes of stack space may be used ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s define ghccc void @foo() nounwind { entry: diff --git a/test/CodeGen/SystemZ/ghc-cc-07.ll b/test/CodeGen/SystemZ/ghc-cc-07.ll index 278e6430380..e9bb3b5e18a 100644 --- a/test/CodeGen/SystemZ/ghc-cc-07.ll +++ b/test/CodeGen/SystemZ/ghc-cc-07.ll @@ -1,7 +1,7 @@ ; Check that the GHC calling convention works (s390x) ; In GHC calling convention a frame pointer is not supported ; -; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s define ghccc void @foo(i64 %0) nounwind { entry: diff --git a/test/CodeGen/SystemZ/mnop-mcount-02.ll b/test/CodeGen/SystemZ/mnop-mcount-02.ll index d6bb1ae7150..4a362911131 100644 --- a/test/CodeGen/SystemZ/mnop-mcount-02.ll +++ b/test/CodeGen/SystemZ/mnop-mcount-02.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s +; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s ; ; CHECK: LLVM ERROR: mnop-mcount only supported with fentry-call diff --git a/test/CodeGen/SystemZ/mrecord-mcount-02.ll b/test/CodeGen/SystemZ/mrecord-mcount-02.ll index e1f4a3748b7..9ce7cdd418e 100644 --- a/test/CodeGen/SystemZ/mrecord-mcount-02.ll +++ b/test/CodeGen/SystemZ/mrecord-mcount-02.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s +; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s ; ; CHECK: LLVM ERROR: mrecord-mcount only supported with fentry-call diff --git a/test/CodeGen/SystemZ/mverify-optypes.mir b/test/CodeGen/SystemZ/mverify-optypes.mir index cc0be442334..aebafd39562 100644 --- a/test/CodeGen/SystemZ/mverify-optypes.mir +++ b/test/CodeGen/SystemZ/mverify-optypes.mir @@ -1,5 +1,6 @@ -# RUN: not --crash llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \ +# RUN: not llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \ # RUN: 2>&1 | FileCheck %s +# REQUIRES: asserts # # Test that the machine verifier catches wrong operand types. diff --git a/test/CodeGen/SystemZ/vec-args-error-01.ll b/test/CodeGen/SystemZ/vec-args-error-01.ll index 5680873fb8e..e2f53794959 100644 --- a/test/CodeGen/SystemZ/vec-args-error-01.ll +++ b/test/CodeGen/SystemZ/vec-args-error-01.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s define void @foo(<1 x i128>) { ret void diff --git a/test/CodeGen/SystemZ/vec-args-error-02.ll b/test/CodeGen/SystemZ/vec-args-error-02.ll index 7c0efe5b8af..a5ae1102a74 100644 --- a/test/CodeGen/SystemZ/vec-args-error-02.ll +++ b/test/CodeGen/SystemZ/vec-args-error-02.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s define <1 x i128> @foo() { ret <1 x i128> diff --git a/test/CodeGen/SystemZ/vec-args-error-03.ll b/test/CodeGen/SystemZ/vec-args-error-03.ll index 7c8be013634..14698aae43b 100644 --- a/test/CodeGen/SystemZ/vec-args-error-03.ll +++ b/test/CodeGen/SystemZ/vec-args-error-03.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s declare void @bar(<1 x i128>) diff --git a/test/CodeGen/SystemZ/vec-args-error-04.ll b/test/CodeGen/SystemZ/vec-args-error-04.ll index f0b248c9348..a54ee90022c 100644 --- a/test/CodeGen/SystemZ/vec-args-error-04.ll +++ b/test/CodeGen/SystemZ/vec-args-error-04.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s declare <1 x i128> @bar() diff --git a/test/CodeGen/SystemZ/vec-args-error-05.ll b/test/CodeGen/SystemZ/vec-args-error-05.ll index c04095e7a73..067deb1c88b 100644 --- a/test/CodeGen/SystemZ/vec-args-error-05.ll +++ b/test/CodeGen/SystemZ/vec-args-error-05.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s define void @foo(<1 x fp128>) { ret void diff --git a/test/CodeGen/SystemZ/vec-args-error-06.ll b/test/CodeGen/SystemZ/vec-args-error-06.ll index 73891be036a..a9184d73575 100644 --- a/test/CodeGen/SystemZ/vec-args-error-06.ll +++ b/test/CodeGen/SystemZ/vec-args-error-06.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s define <1 x fp128> @foo() { ret <1 x fp128> diff --git a/test/CodeGen/SystemZ/vec-args-error-07.ll b/test/CodeGen/SystemZ/vec-args-error-07.ll index 4914217f002..4e914009391 100644 --- a/test/CodeGen/SystemZ/vec-args-error-07.ll +++ b/test/CodeGen/SystemZ/vec-args-error-07.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s declare void @bar(<1 x fp128>) diff --git a/test/CodeGen/SystemZ/vec-args-error-08.ll b/test/CodeGen/SystemZ/vec-args-error-08.ll index 8670b8fa4c7..7b16b9f46e3 100644 --- a/test/CodeGen/SystemZ/vec-args-error-08.ll +++ b/test/CodeGen/SystemZ/vec-args-error-08.ll @@ -1,6 +1,6 @@ ; Verify that we detect unsupported single-element vector types. -; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s declare <1 x fp128> @bar() diff --git a/test/CodeGen/WebAssembly/clear-cache.ll b/test/CodeGen/WebAssembly/clear-cache.ll index 4e1aee438eb..cab94882823 100644 --- a/test/CodeGen/WebAssembly/clear-cache.ll +++ b/test/CodeGen/WebAssembly/clear-cache.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -asm-verbose=false 2>&1 | FileCheck %s +; RUN: not llc < %s -asm-verbose=false 2>&1 | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/test/CodeGen/WebAssembly/cpus.ll b/test/CodeGen/WebAssembly/cpus.ll index b9210bd4d7f..01964e9c85a 100644 --- a/test/CodeGen/WebAssembly/cpus.ll +++ b/test/CodeGen/WebAssembly/cpus.ll @@ -1,13 +1,13 @@ ; This tests that llc accepts all valid WebAssembly CPUs. ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64 +; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64 +; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64 +; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID -; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64 +; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64 ; CHECK-NOT: is not a recognized processor for this target ; INVALID: {{.+}} is not a recognized processor for this target diff --git a/test/CodeGen/WebAssembly/exception.ll b/test/CodeGen/WebAssembly/exception.ll index 375b4c0c437..af470b27e89 100644 --- a/test/CodeGen/WebAssembly/exception.ll +++ b/test/CodeGen/WebAssembly/exception.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm +; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling diff --git a/test/CodeGen/WebAssembly/offset-atomics.ll b/test/CodeGen/WebAssembly/offset-atomics.ll index 43966a80ba4..6884b6a56ee 100644 --- a/test/CodeGen/WebAssembly/offset-atomics.ll +++ b/test/CodeGen/WebAssembly/offset-atomics.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt +; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s ; Test that atomic loads are assembled properly. diff --git a/test/CodeGen/WebAssembly/tls-general-dynamic.ll b/test/CodeGen/WebAssembly/tls-general-dynamic.ll index 1ce100b8653..41dbd476b06 100644 --- a/test/CodeGen/WebAssembly/tls-general-dynamic.ll +++ b/test/CodeGen/WebAssembly/tls-general-dynamic.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR -; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR +; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR +; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS diff --git a/test/CodeGen/X86/AppendingLinkage.ll b/test/CodeGen/X86/AppendingLinkage.ll index 83bfbe85240..5ab49a28e96 100644 --- a/test/CodeGen/X86/AppendingLinkage.ll +++ b/test/CodeGen/X86/AppendingLinkage.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=i686-- 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s ; CHECK: unknown special variable @foo = appending constant [1 x i32 ]zeroinitializer diff --git a/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir b/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir index 2c70ed3b045..31f1da5c674 100644 --- a/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir +++ b/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s +# RUN: not llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s --- | target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64--linux-gnu" diff --git a/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir index fd726b882b5..77962d7fbfa 100644 --- a/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir +++ b/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ # RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s # Test that CFI verifier finds inconsistent offset between bb.end and one of # its precedessors. diff --git a/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir index 30344edc259..1a247824bc9 100644 --- a/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir +++ b/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ # RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s # Test that CFI verifier finds inconsistent register between bb.end and one of # its precedessors. diff --git a/test/CodeGen/X86/clwb.ll b/test/CodeGen/X86/clwb.ll index 75ca48329ee..90862343d31 100644 --- a/test/CodeGen/X86/clwb.ll +++ b/test/CodeGen/X86/clwb.ll @@ -3,7 +3,7 @@ ; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch. ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s -; RUN: not --crash llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL +; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-client | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s diff --git a/test/CodeGen/X86/codemodel.ll b/test/CodeGen/X86/codemodel.ll index 9aba38ab3a2..d7ed7c46088 100644 --- a/test/CodeGen/X86/codemodel.ll +++ b/test/CodeGen/X86/codemodel.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s ; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s -; RUN: not --crash llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s +; RUN: not llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/coff-comdat2.ll b/test/CodeGen/X86/coff-comdat2.ll index 3538e7ec101..a417d096c47 100644 --- a/test/CodeGen/X86/coff-comdat2.ll +++ b/test/CodeGen/X86/coff-comdat2.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32" target triple = "i686-pc-windows-msvc" diff --git a/test/CodeGen/X86/coff-comdat3.ll b/test/CodeGen/X86/coff-comdat3.ll index 95a23742efa..01651ce4820 100644 --- a/test/CodeGen/X86/coff-comdat3.ll +++ b/test/CodeGen/X86/coff-comdat3.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32" target triple = "i686-pc-windows-msvc" diff --git a/test/CodeGen/X86/cpus-amd-no-x86_64.ll b/test/CodeGen/X86/cpus-amd-no-x86_64.ll index cb5c8f71432..0dadc599abd 100644 --- a/test/CodeGen/X86/cpus-amd-no-x86_64.ll +++ b/test/CodeGen/X86/cpus-amd-no-x86_64.ll @@ -2,15 +2,15 @@ ; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 define void @foo() { ret void diff --git a/test/CodeGen/X86/cpus-intel-no-x86_64.ll b/test/CodeGen/X86/cpus-intel-no-x86_64.ll index cf133aea635..d28ac9a83fd 100644 --- a/test/CodeGen/X86/cpus-intel-no-x86_64.ll +++ b/test/CodeGen/X86/cpus-intel-no-x86_64.ll @@ -2,22 +2,22 @@ ; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 define void @foo() { ret void diff --git a/test/CodeGen/X86/cpus-no-x86_64.ll b/test/CodeGen/X86/cpus-no-x86_64.ll index 6f74d4b29da..e2e00038671 100644 --- a/test/CodeGen/X86/cpus-no-x86_64.ll +++ b/test/CodeGen/X86/cpus-no-x86_64.ll @@ -2,10 +2,10 @@ ; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 -; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 +; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR define void @foo() { ret void diff --git a/test/CodeGen/X86/equiv_with_fndef.ll b/test/CodeGen/X86/equiv_with_fndef.ll index 3da0aa60250..efbb8ab3da6 100644 --- a/test/CodeGen/X86/equiv_with_fndef.ll +++ b/test/CodeGen/X86/equiv_with_fndef.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s 2>&1 | FileCheck %s +; RUN: not llc < %s 2>&1 | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/equiv_with_vardef.ll b/test/CodeGen/X86/equiv_with_vardef.ll index e5ea3673b6d..29c19a107ec 100644 --- a/test/CodeGen/X86/equiv_with_vardef.ll +++ b/test/CodeGen/X86/equiv_with_vardef.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s 2>&1 | FileCheck %s +; RUN: not llc < %s 2>&1 | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll b/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll index d0d28db04f4..34f3c258f73 100644 --- a/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll +++ b/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK +;RUN: not llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK ; Make sure we generate fatal error from the type legalizer for using a 64-bit ; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable. diff --git a/test/CodeGen/X86/fast-isel-args-fail2.ll b/test/CodeGen/X86/fast-isel-args-fail2.ll index 007ac1d9a3c..f7066577f2d 100644 --- a/test/CodeGen/X86/fast-isel-args-fail2.ll +++ b/test/CodeGen/X86/fast-isel-args-fail2.ll @@ -1,4 +1,5 @@ -; RUN: not --crash llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 +; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 +; REQUIRES: asserts %struct.s0 = type { x86_fp80, x86_fp80 } diff --git a/test/CodeGen/X86/inalloca-regparm.ll b/test/CodeGen/X86/inalloca-regparm.ll index d379333a962..9dd916bfbb3 100644 --- a/test/CodeGen/X86/inalloca-regparm.ll +++ b/test/CodeGen/X86/inalloca-regparm.ll @@ -1,5 +1,5 @@ ; RUN: llc -mtriple=i686-windows-msvc < %s -o /dev/null -; RUN: not --crash llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s ; This will compile successfully on x86 but not x86_64, because %b will become a ; register parameter. diff --git a/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll b/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll index c8074dfa295..c4bdfb6a103 100644 --- a/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll +++ b/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll @@ -1,7 +1,5 @@ ; RUN: not llc < %s -mtriple i386-unknown-linux-gnu -mattr +avx -o /dev/null 2> %t ; RUN: FileCheck %s --input-file %t -; XFAIL: * -; Temporarily disable this since the llc return code depents on bots. define <4 x float> @testxmm_1(<4 x float> %_xmm0, i32 %_l) { ; CHECK: error: inline assembly requires more registers than available diff --git a/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll b/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll index bd8022f8e51..7278089348e 100644 --- a/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll +++ b/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll @@ -1,7 +1,5 @@ ; RUN: not llc < %s -mtriple i386-unknown-linux-gnu -mattr +avx512vl -o /dev/null 2> %t ; RUN: FileCheck %s --input-file %t -; XFAIL: * -; Temporarily disable this since the llc return code depents on bots. define <4 x float> @testxmm_1(<4 x float> %_xmm0, i64 %_l) { ; CHECK: error: inline assembly requires more registers than available diff --git a/test/CodeGen/X86/invalid-liveness.mir b/test/CodeGen/X86/invalid-liveness.mir index 416921ddcd0..c324241805a 100644 --- a/test/CodeGen/X86/invalid-liveness.mir +++ b/test/CodeGen/X86/invalid-liveness.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s # REQUIRES: asserts --- | diff --git a/test/CodeGen/X86/label-redefinition.ll b/test/CodeGen/X86/label-redefinition.ll index b5570e6931b..9e88a18e873 100644 --- a/test/CodeGen/X86/label-redefinition.ll +++ b/test/CodeGen/X86/label-redefinition.ll @@ -1,5 +1,5 @@ ; PR7054 -; RUN: not --crash llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly" +; RUN: not llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target triple = "i386-apple-darwin10.0.0" diff --git a/test/CodeGen/X86/llc-print-machineinstrs.mir b/test/CodeGen/X86/llc-print-machineinstrs.mir index c3f8df03133..a890840a478 100644 --- a/test/CodeGen/X86/llc-print-machineinstrs.mir +++ b/test/CodeGen/X86/llc-print-machineinstrs.mir @@ -1,6 +1,6 @@ # Check that -print-machineinstrs doesn't assert when it's passed an unknown pass name. # RUN: llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=greedy %s -o /dev/null -# RUN: not --crash llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s +# RUN: not llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s # CHECK: LLVM ERROR: "unknown" pass is not registered. ... diff --git a/test/CodeGen/X86/macho-comdat.ll b/test/CodeGen/X86/macho-comdat.ll index c96212127db..60560470ed5 100644 --- a/test/CodeGen/X86/macho-comdat.ll +++ b/test/CodeGen/X86/macho-comdat.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple x86_64-apple-darwin < %s 2> %t +; RUN: not llc -mtriple x86_64-apple-darwin < %s 2> %t ; RUN: FileCheck < %t %s $f = comdat any diff --git a/test/CodeGen/X86/named-reg-alloc.ll b/test/CodeGen/X86/named-reg-alloc.ll index 34c5ea99f94..c33b4eb75d0 100644 --- a/test/CodeGen/X86/named-reg-alloc.ll +++ b/test/CodeGen/X86/named-reg-alloc.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/X86/named-reg-notareg.ll b/test/CodeGen/X86/named-reg-notareg.ll index 6da65e2dfd0..18c517d8781 100644 --- a/test/CodeGen/X86/named-reg-notareg.ll +++ b/test/CodeGen/X86/named-reg-notareg.ll @@ -1,5 +1,5 @@ -; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s -; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_stack() nounwind { entry: diff --git a/test/CodeGen/X86/nonconst-static-ev.ll b/test/CodeGen/X86/nonconst-static-ev.ll index 23643a2aafd..a0aa6152bd4 100644 --- a/test/CodeGen/X86/nonconst-static-ev.ll +++ b/test/CodeGen/X86/nonconst-static-ev.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t +; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0) diff --git a/test/CodeGen/X86/nonconst-static-iv.ll b/test/CodeGen/X86/nonconst-static-iv.ll index 0e35116e3f8..b1a03cf8b2e 100644 --- a/test/CodeGen/X86/nonconst-static-iv.ll +++ b/test/CodeGen/X86/nonconst-static-iv.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t +; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0) diff --git a/test/CodeGen/X86/read-fp-no-frame-pointer.ll b/test/CodeGen/X86/read-fp-no-frame-pointer.ll index f59388e450b..9f78c294ce8 100644 --- a/test/CodeGen/X86/read-fp-no-frame-pointer.ll +++ b/test/CodeGen/X86/read-fp-no-frame-pointer.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s define i32 @get_frame() nounwind { entry: diff --git a/test/CodeGen/X86/segmented-stacks.ll b/test/CodeGen/X86/segmented-stacks.ll index 467182c9f40..c4539f7b125 100644 --- a/test/CodeGen/X86/segmented-stacks.ll +++ b/test/CodeGen/X86/segmented-stacks.ll @@ -22,9 +22,9 @@ ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null -; RUN: not --crash llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log +; RUN: not llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log ; RUN: FileCheck %s -input-file=%t.log -check-prefix=X64-Solaris -; RUN: not --crash llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log +; RUN: not llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log ; RUN: FileCheck %s -input-file=%t.log -check-prefix=X32-FreeBSD ; X64-Solaris: Segmented stacks not supported on this platform diff --git a/test/CodeGen/XCore/alignment.ll b/test/CodeGen/XCore/alignment.ll index 0c561ee4f6c..28bdf3b7420 100644 --- a/test/CodeGen/XCore/alignment.ll +++ b/test/CodeGen/XCore/alignment.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s +; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s ; CHECK: emitPrologue unsupported alignment: 8 define void @f() nounwind { diff --git a/test/CodeGen/XCore/codemodel.ll b/test/CodeGen/XCore/codemodel.ll index fdc0d086c67..93b9d6d911d 100644 --- a/test/CodeGen/XCore/codemodel.ll +++ b/test/CodeGen/XCore/codemodel.ll @@ -1,7 +1,7 @@ -; RUN: not --crash llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM -; RUN: not --crash llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM -; RUN: not --crash llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM +; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM +; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM +; RUN: not llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM ; BAD_CM: Target only supports CodeModel Small or Large diff --git a/test/CodeGen/XCore/section-name.ll b/test/CodeGen/XCore/section-name.ll index 4bf6aa1fc67..65161db34be 100644 --- a/test/CodeGen/XCore/section-name.ll +++ b/test/CodeGen/XCore/section-name.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s +; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s @bar = internal global i32 zeroinitializer diff --git a/test/DebugInfo/COFF/types-recursive-unnamed.ll b/test/DebugInfo/COFF/types-recursive-unnamed.ll index 3f0a584b0e3..5e8edf5eb4f 100644 --- a/test/DebugInfo/COFF/types-recursive-unnamed.ll +++ b/test/DebugInfo/COFF/types-recursive-unnamed.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc < %s -filetype=obj 2>&1 | FileCheck %s +; RUN: not llc < %s -filetype=obj 2>&1 | FileCheck %s ; ; Verify the compiler produces an error message when trying to emit circular ; references to unnamed structs which are not supported in CodeView debug diff --git a/test/LTO/X86/attrs.ll b/test/LTO/X86/attrs.ll index 4444735188f..d1967470cdd 100644 --- a/test/LTO/X86/attrs.ll +++ b/test/LTO/X86/attrs.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s >%t1 ; RUN: llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=+aes -o %t2 %t1 ; RUN: llvm-objdump -d %t2 | FileCheck -check-prefix=WITH_AES %s -; RUN: not --crash llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s +; RUN: not llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s target triple = "x86_64-unknown-linux-gnu" declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) diff --git a/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s b/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s index e831ac5c2af..34d88918a34 100644 --- a/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s +++ b/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s # We cannot switch subtargets mid-bundle .syntax unified diff --git a/test/MC/ARM/Windows/invalid-relocation.s b/test/MC/ARM/Windows/invalid-relocation.s index 61d11fb6a6b..c3e74e97634 100644 --- a/test/MC/ARM/Windows/invalid-relocation.s +++ b/test/MC/ARM/Windows/invalid-relocation.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \ +# RUN: not llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \ # RUN: | FileCheck %s .def invalid_relocation diff --git a/test/MC/COFF/section-comdat-conflict.s b/test/MC/COFF/section-comdat-conflict.s index 2710b76be56..7ed452a5cdc 100644 --- a/test/MC/COFF/section-comdat-conflict.s +++ b/test/MC/COFF/section-comdat-conflict.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s // CHECK: conflicting sections for symbol diff --git a/test/MC/COFF/section-comdat-conflict2.s b/test/MC/COFF/section-comdat-conflict2.s index 2b863299561..e2dfc2d68b2 100644 --- a/test/MC/COFF/section-comdat-conflict2.s +++ b/test/MC/COFF/section-comdat-conflict2.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s // CHECK: two sections have the same comdat diff --git a/test/MC/Disassembler/AMDGPU/si-support.txt b/test/MC/Disassembler/AMDGPU/si-support.txt index 5538983597f..f3f5ab946eb 100644 --- a/test/MC/Disassembler/AMDGPU/si-support.txt +++ b/test/MC/Disassembler/AMDGPU/si-support.txt @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s # CHECK: LLVM ERROR: Disassembly not yet supported for subtarget 0x00 0x00 0x00 0x7e diff --git a/test/MC/ELF/ARM/bss-non-zero-value.s b/test/MC/ELF/ARM/bss-non-zero-value.s index da946f1c95d..999b8b019c9 100644 --- a/test/MC/ELF/ARM/bss-non-zero-value.s +++ b/test/MC/ELF/ARM/bss-non-zero-value.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out +// RUN: not llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out // RUN: FileCheck --input-file=%t.out %s // CHECK: non-zero initializer found in section '.bss' .bss diff --git a/test/MC/ELF/common-error3.s b/test/MC/ELF/common-error3.s index e5204914970..a84779e653e 100644 --- a/test/MC/ELF/common-error3.s +++ b/test/MC/ELF/common-error3.s @@ -1,5 +1,5 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s # CHECK: Symbol: C redeclared as different type .comm C,4,4 - .comm C,8,4 + .comm C,8,4 \ No newline at end of file diff --git a/test/MC/ELF/section-numeric-invalid-type.s b/test/MC/ELF/section-numeric-invalid-type.s index 0e721099ff7..19796dc64ac 100644 --- a/test/MC/ELF/section-numeric-invalid-type.s +++ b/test/MC/ELF/section-numeric-invalid-type.s @@ -1,7 +1,7 @@ // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux-gnu %s -o - \ // RUN: | llvm-readobj -S --symbols | FileCheck --check-prefix=OBJ %s -// RUN: not --crash llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \ +// RUN: not llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \ // RUN: | FileCheck --check-prefix=ASM %s .section .sec,"a",@0x7fffffff diff --git a/test/MC/MachO/variable-errors.s b/test/MC/MachO/variable-errors.s index 952212041d5..28308c691d9 100644 --- a/test/MC/MachO/variable-errors.s +++ b/test/MC/MachO/variable-errors.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err +// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err // RUN: FileCheck < %t.err %s .data diff --git a/test/MC/Mips/micromips64-unsupported.s b/test/MC/Mips/micromips64-unsupported.s index 05c4bc9df04..bc38cfb41f7 100644 --- a/test/MC/Mips/micromips64-unsupported.s +++ b/test/MC/Mips/micromips64-unsupported.s @@ -1,8 +1,8 @@ -# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 -# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 -# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 -# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 # 64R6: microMIPS64R6 is not supported # 64: microMIPS64 is not supported diff --git a/test/MC/Mips/micromips64r6-unsupported.s b/test/MC/Mips/micromips64r6-unsupported.s index d2afff72aa7..402e66724e4 100644 --- a/test/MC/Mips/micromips64r6-unsupported.s +++ b/test/MC/Mips/micromips64r6-unsupported.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \ +# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \ # RUN: -mcpu=mips64r6 %s 2>&1 | FileCheck %s -check-prefix=CHECK-OPTION # RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mcpu=mips64r6 \ # RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-MM-DIRECTIVE diff --git a/test/MC/Mips/nooddspreg-cmdarg.s b/test/MC/Mips/nooddspreg-cmdarg.s index ef38331b516..2ccce74a5f1 100644 --- a/test/MC/Mips/nooddspreg-cmdarg.s +++ b/test/MC/Mips/nooddspreg-cmdarg.s @@ -5,10 +5,10 @@ # RUN: llvm-readobj --sections --section-data --section-relocations - | \ # RUN: FileCheck %s -check-prefix=CHECK-OBJ -# RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0 +# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0 # -# RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0 +# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0 # # CHECK-ASM-NOT: .module nooddspreg diff --git a/test/MC/PowerPC/ppc64-localentry-error1.s b/test/MC/PowerPC/ppc64-localentry-error1.s index c028da8ce61..e47640fbeb0 100644 --- a/test/MC/PowerPC/ppc64-localentry-error1.s +++ b/test/MC/PowerPC/ppc64-localentry-error1.s @@ -1,7 +1,7 @@ -# RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t +# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t # RUN: FileCheck < %t %s -# RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t +# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t # RUN: FileCheck < %t %s sym: diff --git a/test/MC/PowerPC/ppc64-localentry-error2.s b/test/MC/PowerPC/ppc64-localentry-error2.s index 89a30ee4c8a..b05687fe7b6 100644 --- a/test/MC/PowerPC/ppc64-localentry-error2.s +++ b/test/MC/PowerPC/ppc64-localentry-error2.s @@ -1,7 +1,7 @@ -# RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t +# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t # RUN: FileCheck < %t %s -# RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t +# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t # RUN: FileCheck < %t %s .globl remote_sym diff --git a/test/MC/PowerPC/pr24686.s b/test/MC/PowerPC/pr24686.s index 35a379c697e..28cba230b8c 100644 --- a/test/MC/PowerPC/pr24686.s +++ b/test/MC/PowerPC/pr24686.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \ +# RUN: not llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \ # RUN: 2>&1 | FileCheck %s _stext: diff --git a/test/MC/RISCV/mattr-invalid-combination.s b/test/MC/RISCV/mattr-invalid-combination.s index f75fd3723ed..340a2f25787 100644 --- a/test/MC/RISCV/mattr-invalid-combination.s +++ b/test/MC/RISCV/mattr-invalid-combination.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \ +# RUN: not llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \ # RUN: | FileCheck %s -check-prefix=RV64E # RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target diff --git a/test/MC/WebAssembly/blockaddress.ll b/test/MC/WebAssembly/blockaddress.ll index 2b733e0d37c..52127ab27c8 100644 --- a/test/MC/WebAssembly/blockaddress.ll +++ b/test/MC/WebAssembly/blockaddress.ll @@ -1,6 +1,6 @@ ; TODO(sbc): Make this test pass by adding support for unnamed tempoaries ; in wasm relocations. -; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s target triple = "wasm32-unknown-unknown" diff --git a/test/MC/WebAssembly/data-symbol-in-text-section.ll b/test/MC/WebAssembly/data-symbol-in-text-section.ll index 84d7c537a4f..7e9b28ac243 100644 --- a/test/MC/WebAssembly/data-symbol-in-text-section.ll +++ b/test/MC/WebAssembly/data-symbol-in-text-section.ll @@ -1,4 +1,4 @@ -; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s ; CHECK: data symbols must live in a data section: data_symbol target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" diff --git a/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s b/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s index 697b8bf6ab6..5ce788098f3 100644 --- a/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s +++ b/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s @@ -1,5 +1,5 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s # CHECK: ERROR: Fragment can't be larger than a bundle size diff --git a/test/MC/X86/AlignedBundling/bundle-lock-option-error.s b/test/MC/X86/AlignedBundling/bundle-lock-option-error.s index b849d2b3330..b0b595f4812 100644 --- a/test/MC/X86/AlignedBundling/bundle-lock-option-error.s +++ b/test/MC/X86/AlignedBundling/bundle-lock-option-error.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # Missing .bundle_align_mode argument # CHECK: error: invalid option diff --git a/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s b/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s index c02d0d6b19b..67ac55ed2f0 100644 --- a/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s +++ b/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s @@ -1,5 +1,5 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s # Switching mode will change subtarget, which we can't do within a bundle .text diff --git a/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s b/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s index 65ee2d5b9f3..2f716544b15 100644 --- a/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s +++ b/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # .bundle_lock can't come without a .bundle_align_mode before it diff --git a/test/MC/X86/AlignedBundling/switch-section-locked-error.s b/test/MC/X86/AlignedBundling/switch-section-locked-error.s index 6ea3c36beb1..a5812fd28ab 100644 --- a/test/MC/X86/AlignedBundling/switch-section-locked-error.s +++ b/test/MC/X86/AlignedBundling/switch-section-locked-error.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # This test invokes .bundle_lock and then switches to a different section # w/o the appropriate unlock. diff --git a/test/MC/X86/AlignedBundling/unlock-without-lock-error.s b/test/MC/X86/AlignedBundling/unlock-without-lock-error.s index 811ef95a451..a73f19ea483 100644 --- a/test/MC/X86/AlignedBundling/unlock-without-lock-error.s +++ b/test/MC/X86/AlignedBundling/unlock-without-lock-error.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # .bundle_unlock can't come without a .bundle_lock before it diff --git a/test/MC/X86/check-end-of-data-region.s b/test/MC/X86/check-end-of-data-region.s index 50f5dab73d3..3f7d9b617ef 100644 --- a/test/MC/X86/check-end-of-data-region.s +++ b/test/MC/X86/check-end-of-data-region.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: not llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR .align 4 .data_region jt32 diff --git a/test/MC/X86/encoder-fail.s b/test/MC/X86/encoder-fail.s index d8d321fa8a1..3e845fe7561 100644 --- a/test/MC/X86/encoder-fail.s +++ b/test/MC/X86/encoder-fail.s @@ -1,3 +1,3 @@ -// RUN: not --crash llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s // CHECK: LLVM ERROR: Cannot encode high byte register in REX-prefixed instruction movzx %dh, %rsi diff --git a/test/MC/X86/invalid-sleb.s b/test/MC/X86/invalid-sleb.s index 7d7df351ce4..ad27444d608 100644 --- a/test/MC/X86/invalid-sleb.s +++ b/test/MC/X86/invalid-sleb.s @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s // CHECK: sleb128 and uleb128 expressions must be absolute diff --git a/test/MC/X86/reloc-bss.s b/test/MC/X86/reloc-bss.s index 6463b866f09..3cf26d8b28e 100644 --- a/test/MC/X86/reloc-bss.s +++ b/test/MC/X86/reloc-bss.s @@ -1,4 +1,4 @@ -# RUN: not --crash llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s # CHECK: LLVM ERROR: cannot have fixups in virtual section! .section .init_array,"awT",@nobits diff --git a/test/MachineVerifier/live-ins-01.mir b/test/MachineVerifier/live-ins-01.mir index 5d6d2fa399e..51c05dacf05 100644 --- a/test/MachineVerifier/live-ins-01.mir +++ b/test/MachineVerifier/live-ins-01.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # REQUIRES: systemz-registered-target # Test that a the machine verifier reports an error when a register in diff --git a/test/MachineVerifier/live-ins-02.mir b/test/MachineVerifier/live-ins-02.mir index 2cc63ac0cd2..d76325cdd10 100644 --- a/test/MachineVerifier/live-ins-02.mir +++ b/test/MachineVerifier/live-ins-02.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # REQUIRES: systemz-registered-target # Test that a the machine verifier reports an error when a register in diff --git a/test/MachineVerifier/live-ins-03.mir b/test/MachineVerifier/live-ins-03.mir index ae640c439d3..b5345ccdc3b 100644 --- a/test/MachineVerifier/live-ins-03.mir +++ b/test/MachineVerifier/live-ins-03.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # REQUIRES: systemz-registered-target # Test that a the machine verifier reports an error when a register in diff --git a/test/MachineVerifier/test_copy.mir b/test/MachineVerifier/test_copy.mir index 64c2761e7ea..e234f45287e 100644 --- a/test/MachineVerifier/test_copy.mir +++ b/test/MachineVerifier/test_copy.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- | ; ModuleID = 'test.ll' diff --git a/test/MachineVerifier/test_copy_mismatch_types.mir b/test/MachineVerifier/test_copy_mismatch_types.mir index 3b7e54e0c1c..905977938d5 100644 --- a/test/MachineVerifier/test_copy_mismatch_types.mir +++ b/test/MachineVerifier/test_copy_mismatch_types.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- | ; ModuleID = 'test.ll' diff --git a/test/MachineVerifier/test_g_add.mir b/test/MachineVerifier/test_g_add.mir index 331f4bf351a..9cd990bb8cc 100644 --- a/test/MachineVerifier/test_g_add.mir +++ b/test/MachineVerifier/test_g_add.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_addrspacecast.mir b/test/MachineVerifier/test_g_addrspacecast.mir index fb71057c585..88b41137879 100644 --- a/test/MachineVerifier/test_g_addrspacecast.mir +++ b/test/MachineVerifier/test_g_addrspacecast.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_bitcast.mir b/test/MachineVerifier/test_g_bitcast.mir index a399c859404..3446d5fc86e 100644 --- a/test/MachineVerifier/test_g_bitcast.mir +++ b/test/MachineVerifier/test_g_bitcast.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, amdgpu-registered-target --- diff --git a/test/MachineVerifier/test_g_brjt.mir b/test/MachineVerifier/test_g_brjt.mir index 7a8417efab8..e05dd5fadbc 100644 --- a/test/MachineVerifier/test_g_brjt.mir +++ b/test/MachineVerifier/test_g_brjt.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_build_vector.mir b/test/MachineVerifier/test_g_build_vector.mir index 0c013dfa477..77b5beb2fdd 100644 --- a/test/MachineVerifier/test_g_build_vector.mir +++ b/test/MachineVerifier/test_g_build_vector.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- name: g_build_vector diff --git a/test/MachineVerifier/test_g_build_vector_trunc.mir b/test/MachineVerifier/test_g_build_vector_trunc.mir index 296713fce9f..d73e37e1e6e 100644 --- a/test/MachineVerifier/test_g_build_vector_trunc.mir +++ b/test/MachineVerifier/test_g_build_vector_trunc.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- | target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" diff --git a/test/MachineVerifier/test_g_concat_vectors.mir b/test/MachineVerifier/test_g_concat_vectors.mir index 53e2eca0080..640c4a4ceed 100644 --- a/test/MachineVerifier/test_g_concat_vectors.mir +++ b/test/MachineVerifier/test_g_concat_vectors.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- | target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" diff --git a/test/MachineVerifier/test_g_constant.mir b/test/MachineVerifier/test_g_constant.mir index cfdcae929ce..fa5daff870b 100644 --- a/test/MachineVerifier/test_g_constant.mir +++ b/test/MachineVerifier/test_g_constant.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_dyn_stackalloc.mir b/test/MachineVerifier/test_g_dyn_stackalloc.mir index 51c74e5992d..e798f23e789 100644 --- a/test/MachineVerifier/test_g_dyn_stackalloc.mir +++ b/test/MachineVerifier/test_g_dyn_stackalloc.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_extract.mir b/test/MachineVerifier/test_g_extract.mir index 2f326cb56cc..62064ae8021 100644 --- a/test/MachineVerifier/test_g_extract.mir +++ b/test/MachineVerifier/test_g_extract.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_fcmp.mir b/test/MachineVerifier/test_g_fcmp.mir index 15373f8ff38..c7416d47dcd 100644 --- a/test/MachineVerifier/test_g_fcmp.mir +++ b/test/MachineVerifier/test_g_fcmp.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_fconstant.mir b/test/MachineVerifier/test_g_fconstant.mir index 249a74a5015..d917d9c846f 100644 --- a/test/MachineVerifier/test_g_fconstant.mir +++ b/test/MachineVerifier/test_g_fconstant.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_icmp.mir b/test/MachineVerifier/test_g_icmp.mir index 74448e736fd..9582a179512 100644 --- a/test/MachineVerifier/test_g_icmp.mir +++ b/test/MachineVerifier/test_g_icmp.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_insert.mir b/test/MachineVerifier/test_g_insert.mir index d12a2206c6c..0785370ec17 100644 --- a/test/MachineVerifier/test_g_insert.mir +++ b/test/MachineVerifier/test_g_insert.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_intrinsic.mir b/test/MachineVerifier/test_g_intrinsic.mir index aac733a3bdf..157edc09b80 100644 --- a/test/MachineVerifier/test_g_intrinsic.mir +++ b/test/MachineVerifier/test_g_intrinsic.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: amdgpu-registered-target --- diff --git a/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir b/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir index 75e4e623c3e..8e8627d2e72 100644 --- a/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir +++ b/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: amdgpu-registered-target --- diff --git a/test/MachineVerifier/test_g_inttoptr.mir b/test/MachineVerifier/test_g_inttoptr.mir index d0d356a1d7b..2769c66c8cc 100644 --- a/test/MachineVerifier/test_g_inttoptr.mir +++ b/test/MachineVerifier/test_g_inttoptr.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_jump_table.mir b/test/MachineVerifier/test_g_jump_table.mir index 3c837c29514..406edcbea5c 100644 --- a/test/MachineVerifier/test_g_jump_table.mir +++ b/test/MachineVerifier/test_g_jump_table.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_load.mir b/test/MachineVerifier/test_g_load.mir index ac28b513c1d..18a7718b71b 100644 --- a/test/MachineVerifier/test_g_load.mir +++ b/test/MachineVerifier/test_g_load.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_merge_values.mir b/test/MachineVerifier/test_g_merge_values.mir index 21b4079b5e1..4829e8f1317 100644 --- a/test/MachineVerifier/test_g_merge_values.mir +++ b/test/MachineVerifier/test_g_merge_values.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- name: g_merge_values diff --git a/test/MachineVerifier/test_g_phi.mir b/test/MachineVerifier/test_g_phi.mir index 11e18e2220a..c108ea61354 100644 --- a/test/MachineVerifier/test_g_phi.mir +++ b/test/MachineVerifier/test_g_phi.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- | ; ModuleID = 'test.ll' diff --git a/test/MachineVerifier/test_g_ptr_add.mir b/test/MachineVerifier/test_g_ptr_add.mir index 9a918d2fc7f..fd60a08e99c 100644 --- a/test/MachineVerifier/test_g_ptr_add.mir +++ b/test/MachineVerifier/test_g_ptr_add.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_ptrtoint.mir b/test/MachineVerifier/test_g_ptrtoint.mir index f289a3d1dbe..c9a50bbded7 100644 --- a/test/MachineVerifier/test_g_ptrtoint.mir +++ b/test/MachineVerifier/test_g_ptrtoint.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_select.mir b/test/MachineVerifier/test_g_select.mir index ca0a94d6bc9..d40b276c9ba 100644 --- a/test/MachineVerifier/test_g_select.mir +++ b/test/MachineVerifier/test_g_select.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +#RUN: not llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_sext_inreg.mir b/test/MachineVerifier/test_g_sext_inreg.mir index 120f9995d87..32573cc9e0c 100644 --- a/test/MachineVerifier/test_g_sext_inreg.mir +++ b/test/MachineVerifier/test_g_sext_inreg.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- | diff --git a/test/MachineVerifier/test_g_sextload.mir b/test/MachineVerifier/test_g_sextload.mir index f12fe1cb6bf..ee822ea1104 100644 --- a/test/MachineVerifier/test_g_sextload.mir +++ b/test/MachineVerifier/test_g_sextload.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_shuffle_vector.mir b/test/MachineVerifier/test_g_shuffle_vector.mir index 740293e7924..7e07fa9d4fc 100644 --- a/test/MachineVerifier/test_g_shuffle_vector.mir +++ b/test/MachineVerifier/test_g_shuffle_vector.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- name: g_shuffle_vector diff --git a/test/MachineVerifier/test_g_store.mir b/test/MachineVerifier/test_g_store.mir index 183935f052d..bb82042d669 100644 --- a/test/MachineVerifier/test_g_store.mir +++ b/test/MachineVerifier/test_g_store.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_trunc.mir b/test/MachineVerifier/test_g_trunc.mir index 9dbeab2c603..fd97b09af15 100644 --- a/test/MachineVerifier/test_g_trunc.mir +++ b/test/MachineVerifier/test_g_trunc.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_g_zextload.mir b/test/MachineVerifier/test_g_zextload.mir index 3b65bf9c172..bcb96e3875f 100644 --- a/test/MachineVerifier/test_g_zextload.mir +++ b/test/MachineVerifier/test_g_zextload.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: global-isel, aarch64-registered-target --- diff --git a/test/MachineVerifier/test_memccpy_intrinsics.mir b/test/MachineVerifier/test_memccpy_intrinsics.mir index 03ba9e0d06f..acdd9dd2b28 100644 --- a/test/MachineVerifier/test_memccpy_intrinsics.mir +++ b/test/MachineVerifier/test_memccpy_intrinsics.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# RUN: not llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- diff --git a/test/MachineVerifier/test_phis_precede_nonphis.mir b/test/MachineVerifier/test_phis_precede_nonphis.mir index 0253e6ab952..fa69b40fddf 100644 --- a/test/MachineVerifier/test_phis_precede_nonphis.mir +++ b/test/MachineVerifier/test_phis_precede_nonphis.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s +# RUN: not llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- | diff --git a/test/MachineVerifier/verifier-generic-extend-truncate.mir b/test/MachineVerifier/verifier-generic-extend-truncate.mir index 38cf1859e6d..8390d9bf3ce 100644 --- a/test/MachineVerifier/verifier-generic-extend-truncate.mir +++ b/test/MachineVerifier/verifier-generic-extend-truncate.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # REQUIRES: x86-registered-target # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers diff --git a/test/MachineVerifier/verifier-generic-types-1.mir b/test/MachineVerifier/verifier-generic-types-1.mir index 884209f1736..bc2d2580ed1 100644 --- a/test/MachineVerifier/verifier-generic-types-1.mir +++ b/test/MachineVerifier/verifier-generic-types-1.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # REQUIRES: x86-registered-target # CHECK-NOT: Type mismatch diff --git a/test/MachineVerifier/verifier-generic-types-2.mir b/test/MachineVerifier/verifier-generic-types-2.mir index 5558a2b654a..27a14c222c6 100644 --- a/test/MachineVerifier/verifier-generic-types-2.mir +++ b/test/MachineVerifier/verifier-generic-types-2.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # REQUIRES: x86-registered-target # CHECK: Bad machine code: Generic instruction is missing a virtual register type diff --git a/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir index a723ee205ef..fb4777898ed 100644 --- a/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir +++ b/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +# RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s # REQUIRES: amdgpu-registered-target # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use. diff --git a/test/MachineVerifier/verifier-phi-fail0.mir b/test/MachineVerifier/verifier-phi-fail0.mir index aa488f064cc..80a50b50937 100644 --- a/test/MachineVerifier/verifier-phi-fail0.mir +++ b/test/MachineVerifier/verifier-phi-fail0.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # REQUIRES: x86-registered-target --- diff --git a/test/MachineVerifier/verifier-pseudo-terminators.mir b/test/MachineVerifier/verifier-pseudo-terminators.mir index 6e9ec9c0887..831ca83baa2 100644 --- a/test/MachineVerifier/verifier-pseudo-terminators.mir +++ b/test/MachineVerifier/verifier-pseudo-terminators.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s # REQUIRES: amdgpu-registered-target # Make sure that mismatched successors are caught when a _term diff --git a/test/MachineVerifier/verify-regbankselected.mir b/test/MachineVerifier/verify-regbankselected.mir index ed022ed5eaf..027fc666457 100644 --- a/test/MachineVerifier/verify-regbankselected.mir +++ b/test/MachineVerifier/verify-regbankselected.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- | diff --git a/test/MachineVerifier/verify-regops.mir b/test/MachineVerifier/verify-regops.mir index ec17c3d0558..9219586ffc0 100644 --- a/test/MachineVerifier/verify-regops.mir +++ b/test/MachineVerifier/verify-regops.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \ +# RUN: not llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \ # RUN: 2>&1 | FileCheck %s # REQUIRES: x86-registered-target # diff --git a/test/MachineVerifier/verify-selected.mir b/test/MachineVerifier/verify-selected.mir index b14f977caf1..a38f67ca6e6 100644 --- a/test/MachineVerifier/verify-selected.mir +++ b/test/MachineVerifier/verify-selected.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- | diff --git a/test/Object/coff-invalid.test b/test/Object/coff-invalid.test index da5d687c6e2..3ab3f41b15f 100644 --- a/test/Object/coff-invalid.test +++ b/test/Object/coff-invalid.test @@ -7,7 +7,7 @@ SECTIONS-NEXT: Name: .text (2E 74 65 78 74 00 00 00) SECTIONS-NEXT: VirtualSize: 0x0 SECTIONS-NEXT: VirtualAddress: 0x1000000 -RUN: not --crash llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \ +RUN: not llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \ RUN: FileCheck %s CHECK: Sections with relocations should have an address of 0 diff --git a/test/Object/elf-invalid-phdr.test b/test/Object/elf-invalid-phdr.test index 68a26788e11..b779171dfbb 100644 --- a/test/Object/elf-invalid-phdr.test +++ b/test/Object/elf-invalid-phdr.test @@ -20,7 +20,7 @@ # - Section: .text # # Then editing the e_phoff in with a hexeditor to set it to 0xffffff -RUN: not --crash llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \ +RUN: not llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \ RUN: | FileCheck %s -CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56 +CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56 \ No newline at end of file diff --git a/test/Object/invalid.test b/test/Object/invalid.test index 442d38d46d0..4d19b66238c 100644 --- a/test/Object/invalid.test +++ b/test/Object/invalid.test @@ -47,7 +47,7 @@ Sections: ## when instead of expected SHT_RELA section it locates a section of a different type. # RUN: yaml2obj %s --docnum=3 -o %t3 -# RUN: not --crash llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s +# RUN: not llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s # RELA: LLVM ERROR: Section is not SHT_RELA diff --git a/test/Object/wasm-invalid-file.yaml b/test/Object/wasm-invalid-file.yaml index 9870b47ee85..5ea192d6617 100644 --- a/test/Object/wasm-invalid-file.yaml +++ b/test/Object/wasm-invalid-file.yaml @@ -1,7 +1,7 @@ # RUN: yaml2obj %s -o %t.wasm # RUN: echo -e -n "\x01" >> %t.wasm # Append a new section but truncate the encoding of the section size -# RUN: not --crash llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE +# RUN: not llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE !WASM FileHeader: diff --git a/test/Object/wasm-string-outside-section.test b/test/Object/wasm-string-outside-section.test index 3fa6217bae8..5f618228dc9 100644 --- a/test/Object/wasm-string-outside-section.test +++ b/test/Object/wasm-string-outside-section.test @@ -1,3 +1,3 @@ -RUN: not --crash llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s +RUN: not llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s CHECK: LLVM ERROR: EOF while reading string diff --git a/test/Other/close-stderr.ll b/test/Other/close-stderr.ll new file mode 100644 index 00000000000..b310bc2c042 --- /dev/null +++ b/test/Other/close-stderr.ll @@ -0,0 +1,13 @@ +; RUN: sh -c 'opt --reject-this-option 2>&-; echo $?; opt -o /dev/null /dev/null 2>&-; echo $?;' \ +; RUN: | FileCheck %s + +; CHECK: {{^1$}} +; On valgrind, we got 127 here. +; XFAIL: valgrind + +; CHECK: {{^0$}} +; XFAIL: vg_leak +; REQUIRES: shell + +; Test that the error handling when writing to stderr fails exits the +; program cleanly rather than aborting. diff --git a/test/Other/optimization-remarks-inline.ll b/test/Other/optimization-remarks-inline.ll index bc2200545bb..bcd90bc28d3 100644 --- a/test/Other/optimization-remarks-inline.ll +++ b/test/Other/optimization-remarks-inline.ll @@ -10,7 +10,7 @@ ; RUN: opt < %s -inline -pass-remarks='inl' -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s ; RUN: opt < %s -inline -S 2>&1 | FileCheck --check-prefix=REMARKS %s -; RUN: not --crash opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s +; RUN: not opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s define i32 @foo(i32 %x, i32 %y) #0 { entry: diff --git a/test/TableGen/HwModeSelect.td b/test/TableGen/HwModeSelect.td index 0c63e140f39..6480268f3b3 100644 --- a/test/TableGen/HwModeSelect.td +++ b/test/TableGen/HwModeSelect.td @@ -1,4 +1,4 @@ -// RUN: not --crash llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s +// RUN: not llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s // The HwModeSelect class is intended to serve as a base class for other // classes that are then used to select a value based on the HW mode. diff --git a/test/Transforms/BlockExtractor/invalid-block.ll b/test/Transforms/BlockExtractor/invalid-block.ll index 4b284ddbcdb..f444764e991 100644 --- a/test/Transforms/BlockExtractor/invalid-block.ll +++ b/test/Transforms/BlockExtractor/invalid-block.ll @@ -1,5 +1,5 @@ ; RUN: echo 'bar invalidbb' > %t -; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s +; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; CHECK: Invalid block define void @bar() { diff --git a/test/Transforms/BlockExtractor/invalid-function.ll b/test/Transforms/BlockExtractor/invalid-function.ll index 9af46ef2dcf..4044815893e 100644 --- a/test/Transforms/BlockExtractor/invalid-function.ll +++ b/test/Transforms/BlockExtractor/invalid-function.ll @@ -1,5 +1,5 @@ ; RUN: echo 'foo bb' > %t -; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s +; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; CHECK: Invalid function define void @bar() { diff --git a/test/Transforms/BlockExtractor/invalid-line.ll b/test/Transforms/BlockExtractor/invalid-line.ll index f0a4231660d..7e409d35916 100644 --- a/test/Transforms/BlockExtractor/invalid-line.ll +++ b/test/Transforms/BlockExtractor/invalid-line.ll @@ -1,5 +1,5 @@ ; RUN: echo 'foo' > %t -; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s +; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; CHECK: Invalid line define void @bar() { diff --git a/test/Transforms/FunctionImport/not-prevailing.ll b/test/Transforms/FunctionImport/not-prevailing.ll index 043b3a89adc..0e0dd53950a 100644 --- a/test/Transforms/FunctionImport/not-prevailing.ll +++ b/test/Transforms/FunctionImport/not-prevailing.ll @@ -1,6 +1,6 @@ ; RUN: opt -module-summary %s -o %t1.bc ; RUN: opt -module-summary -o %t2.bc %S/Inputs/not-prevailing.ll -; RUN: not --crash llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \ +; RUN: not llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \ ; RUN: -r %t1.bc,foo,x -r %t2.bc,foo,x -save-temps 2>&1 | FileCheck %s ; CHECK: Interposable and available_externally/linkonce_odr/weak_odr symbol diff --git a/test/Transforms/GCOVProfiling/version.ll b/test/Transforms/GCOVProfiling/version.ll index c72b64260ff..239c62f4a6b 100644 --- a/test/Transforms/GCOVProfiling/version.ll +++ b/test/Transforms/GCOVProfiling/version.ll @@ -4,7 +4,7 @@ ; RUN: opt -insert-gcov-profiling -disable-output < %t/2 ; RUN: head -c8 %t/version.gcno | grep '^oncg.204' ; RUN: rm %t/version.gcno -; RUN: not --crash opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 +; RUN: not opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 ; RUN: opt -insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2 ; RUN: head -c8 %t/version.gcno | grep '^oncg.704' ; RUN: rm %t/version.gcno @@ -12,7 +12,7 @@ ; RUN: opt -passes=insert-gcov-profiling -disable-output < %t/2 ; RUN: head -c8 %t/version.gcno | grep '^oncg.204' ; RUN: rm %t/version.gcno -; RUN: not --crash opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 +; RUN: not opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 ; RUN: opt -passes=insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2 ; RUN: head -c8 %t/version.gcno | grep '^oncg.704' ; RUN: rm %t/version.gcno diff --git a/test/Transforms/InstCombine/limit-max-iterations.ll b/test/Transforms/InstCombine/limit-max-iterations.ll index af027998eda..a2ef4ebcbb5 100644 --- a/test/Transforms/InstCombine/limit-max-iterations.ll +++ b/test/Transforms/InstCombine/limit-max-iterations.ll @@ -2,7 +2,7 @@ ; RUN: opt < %s -instcombine --instcombine-max-iterations=0 -S | FileCheck %s --check-prefix=ZERO ; RUN: opt < %s -instcombine --instcombine-max-iterations=1 -S | FileCheck %s --check-prefix=ONE ; RUN: opt < %s -instcombine -S | FileCheck %s --check-prefix=FIXPOINT -; RUN: not --crash opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP +; RUN: not opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP ; Based on xor-of-icmps-with-extra-uses.ll. This requires multiple iterations of ; InstCombine to reach a fixpoint. diff --git a/test/tools/llvm-lto2/X86/pipeline.ll b/test/tools/llvm-lto2/X86/pipeline.ll index abc2f20a072..f9759b59085 100644 --- a/test/tools/llvm-lto2/X86/pipeline.ll +++ b/test/tools/llvm-lto2/X86/pipeline.ll @@ -28,13 +28,13 @@ define void @patatino() { ; CUSTOM-NEXT: } ; Check that invalid pipelines are caught as errors. -; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \ +; RUN: not llvm-lto2 run %t1.bc -o %t.o \ ; RUN: -r %t1.bc,patatino,px -opt-pipeline foogoo 2>&1 | \ ; RUN: FileCheck %s --check-prefix=ERR ; ERR: LLVM ERROR: unable to parse pass pipeline description 'foogoo': unknown pass name 'foogoo' -; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \ +; RUN: not llvm-lto2 run %t1.bc -o %t.o \ ; RUN: -r %t1.bc,patatino,px -aa-pipeline patatino \ ; RUN: -opt-pipeline loweratomic 2>&1 | \ ; RUN: FileCheck %s --check-prefix=AAERR diff --git a/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s b/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s index 50b5fab9351..a1b53980936 100644 --- a/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s +++ b/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s @@ -1,6 +1,6 @@ // REQUIRES: aarch64-registered-target // RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \ -// RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s +// RUN: | not llvm-readobj --unwind - | FileCheck %s // Older versions of LLVM had a bug where we would accidentally // truncate the number of epilogue scopes to a uint8_t; make diff --git a/test/tools/llvm-readobj/COFF/arm64-win-error2.s b/test/tools/llvm-readobj/COFF/arm64-win-error2.s index 5256de05cb2..74a61dd0201 100644 --- a/test/tools/llvm-readobj/COFF/arm64-win-error2.s +++ b/test/tools/llvm-readobj/COFF/arm64-win-error2.s @@ -6,7 +6,7 @@ // REQUIRES: aarch64-registered-target // RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \ -// RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s +// RUN: | not llvm-readobj --unwind - 2>&1 | FileCheck %s // CHECK: LLVM ERROR: Malformed unwind data