RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
Code Issues Projects Releases Wiki Activity

[RISCV][NFC] Fix formatting

Browse Source
This commit is contained in:
Jim Lin 2021-04-09 13:20:07 +08:00
parent 00f53956b9
commit c850cfde51
2 changed files with 151 additions and 150 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Target/RISCV/RISCV.td
View File

@ -180,6 +180,7 @@ def FeatureStdExtZvlsseg
def HasStdExtZvlsseg : Predicate<"Subtarget->hasStdExtZvlsseg()">, def HasStdExtZvlsseg : Predicate<"Subtarget->hasStdExtZvlsseg()">,
AssemblerPredicate<(all_of FeatureStdExtZvlsseg), AssemblerPredicate<(all_of FeatureStdExtZvlsseg),
"'Zvlsseg' (Vector segment load/store instructions)">; "'Zvlsseg' (Vector segment load/store instructions)">;
def FeatureExtZvamo def FeatureExtZvamo
: SubtargetFeature<"experimental-zvamo", "HasStdExtZvamo", "true", : SubtargetFeature<"experimental-zvamo", "HasStdExtZvamo", "true",
"'Zvamo' (Vector AMO Operations)", "'Zvamo' (Vector AMO Operations)",