RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

[mips] Attempting to use register $32 should be an error instead of an assertion.

Browse Source 
Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3201

llvm-svn: 204932
This commit is contained in:
Daniel Sanders 2014-03-27 15:00:44 +00:00
parent 5a66a4eb38
commit c8f23efcc8
2 changed files with 9 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -1217,7 +1217,7 @@ unsigned MipsAsmParser::getGPR(int RegNo) {
int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
if (RegNum >
getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs())
getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1)
return -1;
if (RegClass == Mips::GPR32RegClassID || RegClass == Mips::GPR64RegClassID)

8
test/MC/Mips/mips-register-names-invalid.s Normal file
View File

@ -0,0 +1,8 @@
# RUN: not llvm-mc %s -triple=mips-unknown-freebsd -show-encoding 2>%t0
# RUN: FileCheck %s < %t0
# $32 used to trigger an assertion instead of the usual error message due to
# an off-by-one bug.
# CHECK: :[[@LINE+1]]:18: error: invalid operand for instruction
add $32, $0, $0