RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity

Add assertion checks here to turn silent miscompiles into aborts.

Browse Source 
llvm-svn: 85639
This commit is contained in:
Dan Gohman 2009-10-30 23:59:06 +00:00
parent 3d1f3f707f
commit c917bbdeae
1 changed files with 8 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/CodeGen/ScheduleDAGEmit.cpp
View File

@ -50,8 +50,10 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU,
break;
}
}
TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
SU->CopyDstRC, SU->CopySrcRC);
bool Success = TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
SU->CopyDstRC, SU->CopySrcRC);
(void)Success;
assert(Success && "copyRegToReg failed!");
} else {
// Copy from physical register.
assert(I->getReg() && "Unknown physical register!");
@ -59,8 +61,10 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU,
bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
SU->CopyDstRC, SU->CopySrcRC);
bool Success = TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
SU->CopyDstRC, SU->CopySrcRC);
(void)Success;
assert(Success && "copyRegToReg failed!");
}
break;
}