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Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
llvm-svn: 122544
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@ -36,7 +36,7 @@ ScheduleDAG::~ScheduleDAG() {}
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/// getInstrDesc helper to handle SDNodes.
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const TargetInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
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if (!Node->isMachineOpcode()) return NULL;
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if (!Node || !Node->isMachineOpcode()) return NULL;
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return &TII->get(Node->getMachineOpcode());
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}
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@ -435,6 +435,13 @@ void ScheduleDAGRRList::AdvancePastStalls(SUnit *SU) {
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/// Record this SUnit in the HazardRecognizer.
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/// Does not update CurCycle.
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void ScheduleDAGRRList::EmitNode(SUnit *SU) {
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if (!EnableSchedCycles || HazardRec->getMaxLookAhead() == 0)
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return;
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// Check for phys reg copy.
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if (!SU->getNode())
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return;
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switch (SU->getNode()->getOpcode()) {
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default:
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assert(SU->getNode()->isMachineOpcode() &&
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@ -645,13 +652,13 @@ static bool isOperandOf(const SUnit *SU, SDNode *N) {
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/// CopyAndMoveSuccessors - Clone the specified node and move its scheduled
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/// successors to the newly created node.
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SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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if (SU->getNode()->getGluedNode())
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return NULL;
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SDNode *N = SU->getNode();
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if (!N)
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return NULL;
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if (SU->getNode()->getGluedNode())
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return NULL;
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SUnit *NewSU;
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bool TryUnfold = false;
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for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
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