diff --git a/test/CodeGen/PowerPC/mulli.ll b/test/CodeGen/PowerPC/mulli.ll
index 3e417f9720a..92fcac0741a 100644
--- a/test/CodeGen/PowerPC/mulli.ll
+++ b/test/CodeGen/PowerPC/mulli.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --extra_scrub
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
 define i64 @test1(i64 %x) {
@@ -68,3 +68,64 @@ define i64 @test6(i64 %x) {
   %y = mul i64 %x, -4294971392
   ret i64 %y
 }
+
+define i64 @test7(i64 %x) {
+; CHECK-LABEL: test7:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lis 4, 31
+; CHECK-NEXT:    ori 4, 4, 65535
+; CHECK-NEXT:    sldi 4, 4, 13
+; CHECK-NEXT:    mulld 3, 3, 4
+; CHECK-NEXT:    blr
+  %y = mul i64 %x, 17179860992
+  ret i64 %y
+}
+
+define i64 @test8(i64 %x) {
+; CHECK-LABEL: test8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    li 4, -4
+; CHECK-NEXT:    sldi 4, 4, 32
+; CHECK-NEXT:    ori 4, 4, 8192
+; CHECK-NEXT:    mulld 3, 3, 4
+; CHECK-NEXT:    blr
+  %y = mul i64 %x, -17179860992
+  ret i64 %y
+}
+
+define i64 @test9(i64 %x) {
+; CHECK-LABEL: test9:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lis 4, 16
+; CHECK-NEXT:    li 5, 8193
+; CHECK-NEXT:    ori 4, 4, 1
+; CHECK-NEXT:    sldi 5, 5, 19
+; CHECK-NEXT:    sldi 4, 4, 12
+; CHECK-NEXT:    mulld 4, 3, 4
+; CHECK-NEXT:    mulld 3, 3, 5
+; CHECK-NEXT:    sub 3, 4, 3
+; CHECK-NEXT:    blr
+  %y = mul i64 %x, 4294971392
+  %z = mul i64 %x, 4295491584
+  %res = sub i64 %y, %z
+  ret i64 %res
+}
+
+define i64 @test10(i64 %x) {
+; CHECK-LABEL: test10:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lis 4, 31
+; CHECK-NEXT:    lis 5, 16383
+; CHECK-NEXT:    ori 4, 4, 65535
+; CHECK-NEXT:    ori 5, 5, 57344
+; CHECK-NEXT:    sldi 4, 4, 13
+; CHECK-NEXT:    mulld 4, 3, 4
+; CHECK-NEXT:    mulld 3, 3, 5
+; CHECK-NEXT:    sub 3, 4, 3
+; CHECK-NEXT:    blr
+  %y = mul i64 %x, 17179860992
+  %z = mul i64 %x, 1073733632
+  %res = sub i64 %y, %z
+  ret i64 %res
+}
+