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[X86] Add FeatureCMPXCHG8B and FeatureSlowUAMem16 to 'lakemont' in X86.td

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We already had CMPXCH8B feature on this CPU for the frontend so
this doesn't have much effect.

The FeatureSlowUAMem16 only matters if someone compiles with
-march=lakemont -msse which doesn't make sense, but is consistent
with all our pre-sse4.2 CPUs. Maybe the feature flag should be
FeatureFastUAMem16 and set on the newer CPUs instead.
This commit is contained in:
Craig Topper 2020-07-28 17:55:50 -07:00
parent 36ab9584ef
commit c95d9699fd
2 changed files with 3 additions and 1 deletions
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3
lib/Target/X86/X86.td
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@ -1081,7 +1081,8 @@ foreach P = ["pentium4", "pentium4m"] in {
}
// Intel Quark.
def : Proc<"lakemont", [FeatureInsertVZEROUPPER]>;
def : Proc<"lakemont", [FeatureSlowUAMem16, FeatureCMPXCHG8B,
FeatureInsertVZEROUPPER]>;
// Intel Core Duo.
def : ProcessorModel<"yonah", SandyBridgeModel,

1
test/CodeGen/X86/cmpxchg8b.ll
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@ -3,6 +3,7 @@
; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X64
; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefixes=I486
; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=i686-unknown- -mcpu=lakemont | FileCheck %s --check-prefixes=CHECK,X86
; Basic 64-bit cmpxchg
define void @t1(i64* nocapture %p) nounwind ssp {