AArch64: account for possible frame index operand in compares.

If the address of a local is used in a comparison, AArch64 can fold the
address-calculation into the comparison via "adds". Unfortunately, a couple of
places (both hit in this one test) are not ready to deal with that yet and just
assume the first source operand is a register.

llvm-svn: 316035

lib/Target/AArch64/AArch64InstrInfo.cpp

@@ -1038,6 +1038,12 @@ bool AArch64InstrInfo::areMemAccessesTriviallyDisjoint(
 bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
                                       unsigned &SrcReg2, int &CmpMask,
                                       int &CmpValue) const {
+  // The first operand can be a frame index where we'd normally expect a
+  // register.
+  assert(MI.getNumOperands() >= 2 && "All AArch64 cmps should have 2 operands");
+  if (!MI.getOperand(1).isReg())
+    return false;
+
   switch (MI.getOpcode()) {
   default:
     break;

lib/Target/AArch64/AArch64RedundantCopyElimination.cpp

@@ -201,6 +201,9 @@ bool AArch64RedundantCopyElimination::knownRegValInBlock(
     // CMP is an alias for SUBS with a dead destination register.
     case AArch64::SUBSWri:
     case AArch64::SUBSXri: {
+      // Sometimes the first operand is a FrameIndex. Bail if tht happens.
+      if (!PredI.getOperand(1).isReg())
+        return false;
       MCPhysReg DstReg = PredI.getOperand(0).getReg();
       MCPhysReg SrcReg = PredI.getOperand(1).getReg();
 

test/CodeGen/AArch64/cmp-frameindex.ll

@@ -0,0 +1,19 @@
+; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
+
+; CHECK: test_frameindex_cmp:
+; CHECK: cmn sp, #{{[0-9]+}}
+define void @test_frameindex_cmp() {
+  %stack = alloca i8
+  %stack.int = ptrtoint i8* %stack to i64
+  %cmp = icmp ne i64 %stack.int, 0
+  br i1 %cmp, label %bb1, label %bb2
+
+bb1:
+  call void @bar()
+  ret void
+
+bb2:
+  ret void
+}
+
+declare void @bar()