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[ARMAttributeParser] Correctly parse and print Tag_THUMB_ISA_use=3
I took the "Permitted"/"Not Permitted" combo from the `Tag_ARM_ISA_use` case (GNU tools print "Yes"). Reviewed By: compnerd, MaskRay, simon_tatham Differential Revision: https://reviews.llvm.org/D90305
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@ -113,7 +113,7 @@ Error ARMAttributeParser::ARM_ISA_use(AttrType tag) {
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}
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Error ARMAttributeParser::THUMB_ISA_use(AttrType tag) {
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static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2"};
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static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2", "Permitted"};
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return parseStringAttribute("THUMB_ISA_use", tag, makeArrayRef(strings));
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}
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@ -2,6 +2,8 @@
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// RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
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// RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
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// RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
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// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Baseline
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// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Mainline
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// This isn't intended to be a through check of the build attributes emitted
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// for each target (that's tested elsewhere), but just to check that the
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@ -30,6 +32,20 @@
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// v7M: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// v7M: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// v8M_Baseline-NOT: .cpu
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// v8M_Baseline: .eabi_attribute 6, 16 @ Tag_CPU_arch
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// v8M_Baseline: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v8M_Baseline: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v8M_Baseline: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use
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// v8M_Baseline: .eabi_attribute 34, 0 @ Tag_CPU_unaligned_access
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// v8M_Mainline-NOT: .cpu
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// v8M_Mainline: .eabi_attribute 6, 17 @ Tag_CPU_arch
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// v8M_Mainline: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v8M_Mainline: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v8M_Mainline: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use
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// v8M_Mainline: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// Cortex-A15: .cpu cortex-a15
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// Cortex-A15: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// Cortex-A15: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
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34
test/MC/ARM/directive-arch-armv8m.s
Normal file
34
test/MC/ARM/directive-arch-armv8m.s
Normal file
@ -0,0 +1,34 @@
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@ Test the .arch directive for armv8m
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@ This test case will check the default .ARM.attributes value for the
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@ armv8-a architecture when using the armv8m.base alias.
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@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
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@ RUN: | FileCheck %s -check-prefix CHECK-ASM
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@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
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@ RUN: | llvm-readobj --arch-specific - | FileCheck %s -check-prefix CHECK-ATTR
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.syntax unified
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.arch armv8m.base
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@ CHECK-ASM: .arch armv8-m.base
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@ CHECK-ATTR: FileAttributes {
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@ CHECK-ATTR: Attribute {
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@ CHECK-ATTR: TagName: CPU_name
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@ CHECK-ATTR: Value: 8-M.Baseline
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@ CHECK-ATTR: }
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@ CHECK-ATTR: Attribute {
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@ CHECK-ATTR: TagName: CPU_arch
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@ CHECK-ATTR: Description: ARM v8
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@ CHECK-ATTR: }
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@ CHECK-ATTR: Attribute {
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@ CHECK-ATTR: TagName: CPU_arch_profile
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@ CHECK-ATTR: Description: Microcontroller
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@ CHECK-ATTR: }
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@ CHECK-ATTR: Attribute {
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@ CHECK-ATTR: TagName: THUMB_ISA_use
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@ CHECK-ATTR: Description: Permitted
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@ CHECK-ATTR: }
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@ CHECK-ATTR: }
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@ -127,6 +127,10 @@ TEST(ThumbISABuildAttr, testBuildAttr) {
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ARMBuildAttrs::Not_Allowed));
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EXPECT_TRUE(testBuildAttr(9, 1, ARMBuildAttrs::THUMB_ISA_use,
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ARMBuildAttrs::Allowed));
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EXPECT_TRUE(testBuildAttr(9, 2, ARMBuildAttrs::THUMB_ISA_use,
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ARMBuildAttrs::AllowThumb32));
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EXPECT_TRUE(testBuildAttr(9, 3, ARMBuildAttrs::THUMB_ISA_use,
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ARMBuildAttrs::AllowThumbDerived));
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}
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TEST(FPArchBuildAttr, testBuildAttr) {
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