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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00

Make DenseMap's insert return a pair, to more closely resemble std::map.

llvm-svn: 53177
This commit is contained in:
Dan Gohman 2008-07-07 17:46:23 +00:00
parent 1d321b8875
commit c97817aac3
7 changed files with 39 additions and 27 deletions

View File

@ -147,14 +147,16 @@ public:
return end();
}
bool insert(const std::pair<KeyT, ValueT> &KV) {
std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
BucketT *TheBucket;
if (LookupBucketFor(KV.first, TheBucket))
return false; // Already in map.
return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
false); // Already in map.
// Otherwise, insert the new element.
InsertIntoBucket(KV.first, KV.second, TheBucket);
return true;
TheBucket = InsertIntoBucket(KV.first, KV.second, TheBucket);
return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
true);
}
bool erase(const KeyT &Val) {

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@ -41,10 +41,6 @@ public:
return TheMap.count(V);
}
bool insert(const ValueT &V) {
return TheMap.insert(std::make_pair(V, 0));
}
void erase(const ValueT &V) {
TheMap.erase(V);
}
@ -90,6 +86,10 @@ public:
const_iterator begin() const { return ConstIterator(TheMap.begin()); }
const_iterator end() const { return ConstIterator(TheMap.end()); }
std::pair<iterator, bool> insert(const ValueT &V) {
return TheMap.insert(std::make_pair(V, 0));
}
};
} // end namespace llvm

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@ -115,7 +115,7 @@ class VISIBILITY_HIDDEN SelectionDAGLegalize {
LegalizedNodes.insert(std::make_pair(To, To));
}
void AddPromotedOperand(SDOperand From, SDOperand To) {
bool isNew = PromotedNodes.insert(std::make_pair(From, To));
bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
assert(isNew && "Got into the map somehow?");
// If someone requests legalization of the new node, return itself.
LegalizedNodes.insert(std::make_pair(To, To));
@ -6734,7 +6734,8 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
}
// Remember in a map if the values will be reused later.
bool isNew = ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi)));
bool isNew =
ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi))).second;
assert(isNew && "Value already expanded?!?");
}

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@ -413,9 +413,10 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
unsigned VRBase = 0;
if (TargetRegisterInfo::isVirtualRegister(SrcReg)) {
// Just use the input register directly!
SDOperand Op(Node, ResNo);
if (IsClone)
VRBaseMap.erase(SDOperand(Node, ResNo));
bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
return;
@ -472,9 +473,10 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
TII->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, DstRC, SrcRC);
}
SDOperand Op(Node, ResNo);
if (IsClone)
VRBaseMap.erase(SDOperand(Node, ResNo));
bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
}
@ -532,7 +534,8 @@ void ScheduleDAG::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
MI->addOperand(MachineOperand::CreateReg(VRBase, true));
}
bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase));
SDOperand Op(Node, i);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
}
@ -786,7 +789,8 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node,
} else
assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase));
SDOperand Op(Node, 0);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
}
@ -992,7 +996,7 @@ void ScheduleDAG::EmitCrossRCCopy(SUnit *SU,
// Copy from physical register.
assert(I->Reg && "Unknown physical register!");
unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase));
bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
TII->copyRegToReg(*BB, BB->end(), VRBase, I->Reg,

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@ -114,7 +114,7 @@ public:
/// insert - This returns true if the pointer was new to the set, false if it
/// was already in the set.
bool insert(const Type *Src, const Type *Dst) {
if (!TheMap.insert(std::make_pair(Src, PATypeHolder(Dst))))
if (!TheMap.insert(std::make_pair(Src, PATypeHolder(Dst))).second)
return false; // Already in map.
if (Src->isAbstract())
Src->addAbstractTypeUser(this);

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@ -209,11 +209,13 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
for (unsigned i = 0, e = array_lengthof(OpTbl2Addr); i != e; ++i) {
unsigned RegOp = OpTbl2Addr[i][0];
unsigned MemOp = OpTbl2Addr[i][1];
if (!RegOp2MemOpTable2Addr.insert(std::make_pair((unsigned*)RegOp, MemOp)))
if (!RegOp2MemOpTable2Addr.insert(std::make_pair((unsigned*)RegOp,
MemOp)).second)
assert(false && "Duplicated entries?");
unsigned AuxInfo = 0 | (1 << 4) | (1 << 5); // Index 0,folded load and store
if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
std::make_pair(RegOp, AuxInfo))))
std::make_pair(RegOp,
AuxInfo))).second)
AmbEntries.push_back(MemOp);
}
@ -297,14 +299,15 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
for (unsigned i = 0, e = array_lengthof(OpTbl0); i != e; ++i) {
unsigned RegOp = OpTbl0[i][0];
unsigned MemOp = OpTbl0[i][1];
if (!RegOp2MemOpTable0.insert(std::make_pair((unsigned*)RegOp, MemOp)))
if (!RegOp2MemOpTable0.insert(std::make_pair((unsigned*)RegOp,
MemOp)).second)
assert(false && "Duplicated entries?");
unsigned FoldedLoad = OpTbl0[i][2];
// Index 0, folded load or store.
unsigned AuxInfo = 0 | (FoldedLoad << 4) | ((FoldedLoad^1) << 5);
if (RegOp != X86::FsMOVAPDrr && RegOp != X86::FsMOVAPSrr)
if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
std::make_pair(RegOp, AuxInfo))))
std::make_pair(RegOp, AuxInfo))).second)
AmbEntries.push_back(MemOp);
}
@ -423,12 +426,13 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
for (unsigned i = 0, e = array_lengthof(OpTbl1); i != e; ++i) {
unsigned RegOp = OpTbl1[i][0];
unsigned MemOp = OpTbl1[i][1];
if (!RegOp2MemOpTable1.insert(std::make_pair((unsigned*)RegOp, MemOp)))
if (!RegOp2MemOpTable1.insert(std::make_pair((unsigned*)RegOp,
MemOp)).second)
assert(false && "Duplicated entries?");
unsigned AuxInfo = 1 | (1 << 4); // Index 1, folded load
if (RegOp != X86::FsMOVAPDrr && RegOp != X86::FsMOVAPSrr)
if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
std::make_pair(RegOp, AuxInfo))))
std::make_pair(RegOp, AuxInfo))).second)
AmbEntries.push_back(MemOp);
}
@ -629,11 +633,12 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
for (unsigned i = 0, e = array_lengthof(OpTbl2); i != e; ++i) {
unsigned RegOp = OpTbl2[i][0];
unsigned MemOp = OpTbl2[i][1];
if (!RegOp2MemOpTable2.insert(std::make_pair((unsigned*)RegOp, MemOp)))
if (!RegOp2MemOpTable2.insert(std::make_pair((unsigned*)RegOp,
MemOp)).second)
assert(false && "Duplicated entries?");
unsigned AuxInfo = 2 | (1 << 4); // Index 1, folded load
if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
std::make_pair(RegOp, AuxInfo))))
std::make_pair(RegOp, AuxInfo))).second)
AmbEntries.push_back(MemOp);
}

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@ -85,7 +85,7 @@ namespace {
/// AddToWorkList - Add the specified instruction to the worklist if it
/// isn't already in it.
void AddToWorkList(Instruction *I) {
if (WorklistMap.insert(std::make_pair(I, Worklist.size())))
if (WorklistMap.insert(std::make_pair(I, Worklist.size())).second)
Worklist.push_back(I);
}