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Revert "[X86] Check immediate before get it."
This reverts commit 9eb2f723c24523194b833779d20b027bf89a4f55.
This commit is contained in:
Luo, Yuanke
parent
2f43148446
commit
c9854fe645
@ -6357,7 +6357,7 @@ bool X86InstrInfo::unfoldMemoryOperand(
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case X86::CMP8ri: {
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MachineOperand &MO0 = DataMI->getOperand(0);
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MachineOperand &MO1 = DataMI->getOperand(1);
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if (MO1.isImm() && MO1.getImm() == 0) {
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if (MO1.getImm() == 0) {
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unsigned NewOpc;
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switch (DataMI->getOpcode()) {
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default: llvm_unreachable("Unreachable!");
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@ -1,119 +0,0 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-- -run-pass machinelicm -mcpu=skx -o - %s | FileCheck %s
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--- |
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@x = dso_local global i32 0, align 4
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@z = dso_local local_unnamed_addr global [1024 x i32] zeroinitializer, align 16
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@y = dso_local local_unnamed_addr constant i32* null, align 8
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; Function Attrs: nofree norecurse nosync nounwind uwtable writeonly mustprogress
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define dso_local void @_Z3foov() local_unnamed_addr #0 {
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%1 = load i32*, i32** @y, align 8, !tbaa !3
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%2 = icmp eq i32* %1, @x
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%3 = zext i1 %2 to i32
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br label %5
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4: ; preds = %5
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ret void
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5: ; preds = %5, %0
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%lsr.iv = phi i64 [ %lsr.iv.next, %5 ], [ -4096, %0 ]
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%uglygep = getelementptr i8, i8* bitcast ([1024 x i32]* @z to i8*), i64 %lsr.iv
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%uglygep2 = bitcast i8* %uglygep to i32*
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%scevgep = getelementptr i32, i32* %uglygep2, i64 1024
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store i32 %3, i32* %scevgep, align 4, !tbaa !7
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%lsr.iv.next = add nsw i64 %lsr.iv, 4
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%6 = icmp eq i64 %lsr.iv.next, 0
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br i1 %6, label %4, label %5, !llvm.loop !9
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}
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attributes #0 = { nofree norecurse nosync nounwind uwtable writeonly mustprogress "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+x87,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="generic" }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"uwtable", i32 1}
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!2 = !{!"clang version 13.0.0 (https://github.com/llvm/llvm-project.git c42dd5dbb015afaef99cf876195c474c63c2393e)"}
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!3 = !{!4, !4, i64 0}
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!4 = !{!"any pointer", !5, i64 0}
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!5 = !{!"omnipotent char", !6, i64 0}
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!6 = !{!"Simple C++ TBAA"}
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!7 = !{!8, !8, i64 0}
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!8 = !{!"int", !5, i64 0}
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!9 = distinct !{!9, !10, !11}
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!10 = !{!"llvm.loop.mustprogress"}
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!11 = !{!"llvm.loop.unroll.disable"}
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...
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---
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name: _Z3foov
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alignment: 16
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins: []
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack: []
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo: {}
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body: |
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; CHECK-LABEL: name: _Z3foov
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; CHECK: bb.0 (%ir-block.0):
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: renamable $eax = MOV32r0 implicit-def dead $eflags
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; CHECK: renamable $rcx = MOV64ri32 -4096
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; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm $rip, 1, $noreg, @y, $noreg :: (dereferenceable load 8 from @y, !tbaa !3)
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; CHECK: JMP_1 %bb.2
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; CHECK: bb.1 (%ir-block.4):
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; CHECK: RET 0
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; CHECK: bb.2 (%ir-block.5):
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; CHECK: successors: %bb.1(0x04000000), %bb.2(0x7c000000)
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; CHECK: liveins: $eax, $rcx
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; CHECK: CMP64ri32 [[MOV64rm]], @x, implicit-def $eflags
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; CHECK: renamable $al = SETCCr 4, implicit killed $eflags, implicit killed $eax, implicit-def $eax
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; CHECK: MOV32mr renamable $rcx, 1, $noreg, @z + 4096, $noreg, renamable $eax :: (store 4 into %ir.scevgep, !tbaa !7)
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; CHECK: renamable $rcx = ADD64ri8 killed renamable $rcx, 4, implicit-def $eflags
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; CHECK: JCC_1 %bb.1, 4, implicit killed $eflags
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; CHECK: JMP_1 %bb.2
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bb.0 (%ir-block.0):
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successors: %bb.2(0x80000000)
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renamable $eax = MOV32r0 implicit-def dead $eflags
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renamable $rcx = MOV64ri32 -4096
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JMP_1 %bb.2
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bb.1 (%ir-block.4):
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RET 0
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bb.2 (%ir-block.5):
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successors: %bb.1(0x04000000), %bb.2(0x7c000000)
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liveins: $eax, $rcx
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CMP64mi32 $rip, 1, $noreg, @y, $noreg, @x, implicit-def $eflags :: (dereferenceable load 8 from @y, !tbaa !3)
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renamable $al = SETCCr 4, implicit killed $eflags, implicit killed $eax, implicit-def $eax
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MOV32mr renamable $rcx, 1, $noreg, @z + 4096, $noreg, renamable $eax :: (store 4 into %ir.scevgep, !tbaa !7)
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renamable $rcx = ADD64ri8 killed renamable $rcx, 4, implicit-def $eflags
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JCC_1 %bb.1, 4, implicit killed $eflags
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JMP_1 %bb.2
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...
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