1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00

Use LaneBitmask::getLane in a few more places

llvm-svn: 308655
This commit is contained in:
Krzysztof Parzyszek 2017-07-20 19:15:56 +00:00
parent bbaa26af71
commit ca0dd2ee63
2 changed files with 3 additions and 3 deletions

View File

@ -2239,7 +2239,7 @@ JoinVals::analyzeValue(unsigned ValNo, JoinVals &Other) {
const MachineInstr *DefMI = nullptr;
if (VNI->isPHIDef()) {
// Conservatively assume that all lanes in a PHI are valid.
LaneBitmask Lanes = SubRangeJoin ? LaneBitmask(1)
LaneBitmask Lanes = SubRangeJoin ? LaneBitmask::getLane(0)
: TRI->getSubRegIndexLaneMask(SubIdx);
V.ValidLanes = V.WriteLanes = Lanes;
} else {
@ -2247,7 +2247,7 @@ JoinVals::analyzeValue(unsigned ValNo, JoinVals &Other) {
assert(DefMI != nullptr);
if (SubRangeJoin) {
// We don't care about the lanes when joining subregister ranges.
V.WriteLanes = V.ValidLanes = LaneBitmask(1);
V.WriteLanes = V.ValidLanes = LaneBitmask::getLane(0);
if (DefMI->isImplicitDef()) {
V.ValidLanes = LaneBitmask::getNone();
V.ErasableImplicitDef = true;

View File

@ -201,7 +201,7 @@ static LaneBitmask getUsedRegMask(const MachineOperand &MO,
return MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(SubReg);
auto MaxMask = MRI.getMaxLaneMaskForVReg(MO.getReg());
if (MaxMask.getAsInteger() == 1) // cannot have subregs
if (MaxMask == LaneBitmask::getLane(0)) // cannot have subregs
return MaxMask;
// For a tentative schedule LIS isn't updated yet but livemask should remain