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[x86] add tests for add X, (cmov constants); NFC
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121
test/CodeGen/X86/add-cmov.ll
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121
test/CodeGen/X86/add-cmov.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-- | FileCheck %s
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define i64 @select_consts_i64(i64 %offset, i32 %x) {
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; CHECK-LABEL: select_consts_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testl %esi, %esi
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: cmovneq %rcx, %rax
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; CHECK-NEXT: addq %rdi, %rax
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; CHECK-NEXT: retq
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%b = icmp eq i32 %x, 0
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%s = select i1 %b, i64 42, i64 0
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%r = add i64 %s, %offset
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ret i64 %r
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}
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define i32 @select_consts_i32(i32 %offset, i64 %x) {
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; CHECK-LABEL: select_consts_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: cmpq $42, %rsi
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; CHECK-NEXT: movl $43, %eax
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: addl %edi, %eax
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; CHECK-NEXT: retq
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%b = icmp sgt i64 %x, 41
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%s = select i1 %b, i32 0, i32 43
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%r = add i32 %offset, %s
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ret i32 %r
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}
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define i16 @select_consts_i16(i16 %offset, i1 %b) {
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; CHECK-LABEL: select_consts_i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb $1, %sil
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; CHECK-NEXT: movl $44, %eax
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; CHECK-NEXT: cmovel %ecx, %eax
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; CHECK-NEXT: addl %edi, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%s = select i1 %b, i16 44, i16 0
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%r = add i16 %s, %offset
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ret i16 %r
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}
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define i8 @select_consts_i8(i8 %offset, i1 %b) {
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; CHECK-LABEL: select_consts_i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb $1, %sil
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; CHECK-NEXT: movl $45, %eax
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; CHECK-NEXT: cmovnel %ecx, %eax
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; CHECK-NEXT: addb %dil, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%s = select i1 %b, i8 0, i8 45
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%r = add i8 %offset, %s
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ret i8 %r
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}
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define i32 @select_consts_use_i32(i32 %offset, i64 %x, i32* %p) {
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; CHECK-LABEL: select_consts_use_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: cmpq $42, %rsi
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; CHECK-NEXT: movl $43, %eax
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: movl %eax, (%rdx)
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; CHECK-NEXT: addl %edi, %eax
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; CHECK-NEXT: retq
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%b = icmp sgt i64 %x, 41
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%s = select i1 %b, i32 0, i32 43
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store i32 %s, i32* %p
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%r = add i32 %offset, %s
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ret i32 %r
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}
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define i32 @select_40_43_i32(i32 %offset, i64 %x) {
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; CHECK-LABEL: select_40_43_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpq $42, %rsi
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; CHECK-NEXT: setl %al
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; CHECK-NEXT: leal (%rax,%rax,2), %eax
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; CHECK-NEXT: leal 40(%rdi,%rax), %eax
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; CHECK-NEXT: retq
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%b = icmp sgt i64 %x, 41
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%s = select i1 %b, i32 40, i32 43
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%r = add i32 %offset, %s
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ret i32 %r
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}
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define i32 @select_0_1_i32(i32 %offset, i64 %x) {
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; CHECK-LABEL: select_0_1_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cmpq $42, %rsi
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; CHECK-NEXT: adcl $0, %eax
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; CHECK-NEXT: retq
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%b = icmp ugt i64 %x, 41
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%s = select i1 %b, i32 0, i32 1
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%r = add i32 %offset, %s
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ret i32 %r
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}
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define i32 @select_1_0_i32(i32 %offset, i64 %x) {
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; CHECK-LABEL: select_1_0_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cmpq $42, %rsi
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; CHECK-NEXT: sbbl $-1, %eax
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; CHECK-NEXT: retq
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%b = icmp ugt i64 %x, 41
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%s = select i1 %b, i32 1, i32 0
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%r = add i32 %offset, %s
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ret i32 %r
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}
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