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Add AVX512 unmasked FMA intrinsics and support.
llvm-svn: 194824
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@ -1864,6 +1864,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmadd_ps_512 : GCCBuiltin<"__builtin_ia32_vfmaddps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmadd_pd_512 : GCCBuiltin<"__builtin_ia32_vfmaddpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsub_ss : GCCBuiltin<"__builtin_ia32_vfmsubss">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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@ -1888,6 +1896,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsub_ps_512 : GCCBuiltin<"__builtin_ia32_vfmsubps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsub_pd_512 : GCCBuiltin<"__builtin_ia32_vfmsubpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmadd_ss : GCCBuiltin<"__builtin_ia32_vfnmaddss">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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@ -1912,6 +1928,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmadd_ps_512 : GCCBuiltin<"__builtin_ia32_vfnmaddps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmadd_pd_512 : GCCBuiltin<"__builtin_ia32_vfnmaddpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmsub_ss : GCCBuiltin<"__builtin_ia32_vfnmsubss">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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@ -1936,6 +1960,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmsub_ps_512 : GCCBuiltin<"__builtin_ia32_vfnmsubps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfnmsub_pd_512 : GCCBuiltin<"__builtin_ia32_vfnmsubpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmaddsub_ps : GCCBuiltin<"__builtin_ia32_vfmaddsubps">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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@ -1954,6 +1986,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmaddsub_ps_512 : GCCBuiltin<"__builtin_ia32_vfmaddsubps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmaddsub_pd_512 : GCCBuiltin<"__builtin_ia32_vfmaddsubpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsubadd_ps : GCCBuiltin<"__builtin_ia32_vfmsubaddps">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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@ -1972,6 +2012,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsubadd_ps_512 : GCCBuiltin<"__builtin_ia32_vfmsubaddps512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v16f32_ty, llvm_v16f32_ty, llvm_v16f32_ty],
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[IntrNoMem]>;
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def int_x86_fma_vfmsubadd_pd_512 : GCCBuiltin<"__builtin_ia32_vfmsubaddpd512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v8f64_ty, llvm_v8f64_ty, llvm_v8f64_ty],
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[IntrNoMem]>;
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}
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//===----------------------------------------------------------------------===//
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@ -11648,7 +11648,19 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
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case Intrinsic::x86_fma_vfmaddsub_ps_256:
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case Intrinsic::x86_fma_vfmaddsub_pd_256:
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case Intrinsic::x86_fma_vfmsubadd_ps_256:
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case Intrinsic::x86_fma_vfmsubadd_pd_256: {
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case Intrinsic::x86_fma_vfmsubadd_pd_256:
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case Intrinsic::x86_fma_vfmadd_ps_512:
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case Intrinsic::x86_fma_vfmadd_pd_512:
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case Intrinsic::x86_fma_vfmsub_ps_512:
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case Intrinsic::x86_fma_vfmsub_pd_512:
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case Intrinsic::x86_fma_vfnmadd_ps_512:
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case Intrinsic::x86_fma_vfnmadd_pd_512:
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case Intrinsic::x86_fma_vfnmsub_ps_512:
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case Intrinsic::x86_fma_vfnmsub_pd_512:
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case Intrinsic::x86_fma_vfmaddsub_ps_512:
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case Intrinsic::x86_fma_vfmaddsub_pd_512:
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case Intrinsic::x86_fma_vfmsubadd_ps_512:
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case Intrinsic::x86_fma_vfmsubadd_pd_512: {
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unsigned Opc;
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switch (IntNo) {
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default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
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@ -11656,36 +11668,48 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
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case Intrinsic::x86_fma_vfmadd_pd:
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case Intrinsic::x86_fma_vfmadd_ps_256:
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case Intrinsic::x86_fma_vfmadd_pd_256:
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case Intrinsic::x86_fma_vfmadd_ps_512:
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case Intrinsic::x86_fma_vfmadd_pd_512:
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Opc = X86ISD::FMADD;
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break;
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case Intrinsic::x86_fma_vfmsub_ps:
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case Intrinsic::x86_fma_vfmsub_pd:
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case Intrinsic::x86_fma_vfmsub_ps_256:
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case Intrinsic::x86_fma_vfmsub_pd_256:
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case Intrinsic::x86_fma_vfmsub_ps_512:
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case Intrinsic::x86_fma_vfmsub_pd_512:
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Opc = X86ISD::FMSUB;
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break;
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case Intrinsic::x86_fma_vfnmadd_ps:
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case Intrinsic::x86_fma_vfnmadd_pd:
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case Intrinsic::x86_fma_vfnmadd_ps_256:
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case Intrinsic::x86_fma_vfnmadd_pd_256:
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case Intrinsic::x86_fma_vfnmadd_ps_512:
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case Intrinsic::x86_fma_vfnmadd_pd_512:
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Opc = X86ISD::FNMADD;
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break;
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case Intrinsic::x86_fma_vfnmsub_ps:
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case Intrinsic::x86_fma_vfnmsub_pd:
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case Intrinsic::x86_fma_vfnmsub_ps_256:
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case Intrinsic::x86_fma_vfnmsub_pd_256:
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case Intrinsic::x86_fma_vfnmsub_ps_512:
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case Intrinsic::x86_fma_vfnmsub_pd_512:
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Opc = X86ISD::FNMSUB;
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break;
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case Intrinsic::x86_fma_vfmaddsub_ps:
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case Intrinsic::x86_fma_vfmaddsub_pd:
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case Intrinsic::x86_fma_vfmaddsub_ps_256:
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case Intrinsic::x86_fma_vfmaddsub_pd_256:
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case Intrinsic::x86_fma_vfmaddsub_ps_512:
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case Intrinsic::x86_fma_vfmaddsub_pd_512:
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Opc = X86ISD::FMADDSUB;
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break;
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case Intrinsic::x86_fma_vfmsubadd_ps:
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case Intrinsic::x86_fma_vfmsubadd_pd:
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case Intrinsic::x86_fma_vfmsubadd_ps_256:
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case Intrinsic::x86_fma_vfmsubadd_pd_256:
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case Intrinsic::x86_fma_vfmsubadd_ps_512:
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case Intrinsic::x86_fma_vfmsubadd_pd_512:
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Opc = X86ISD::FMSUBADD;
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break;
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}
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97
test/CodeGen/X86/avx512-fma-intrinsics.ll
Normal file
97
test/CodeGen/X86/avx512-fma-intrinsics.ll
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@ -0,0 +1,97 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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define <16 x float> @test_x86_vfmadd_ps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfmadd_ps_z
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; CHECK: vfmadd213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfmadd_pd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfmadd_pd_z
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; CHECK: vfmadd213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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define <16 x float> @test_x86_vfmsubps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfmsubps_z
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; CHECK: vfmsub213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfmsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfmsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfmsubpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfmsubpd_z
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; CHECK: vfmsub213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfmsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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define <16 x float> @test_x86_vfnmadd_ps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfnmadd_ps_z
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; CHECK: vfnmadd213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfnmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfnmadd.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfnmadd_pd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfnmadd_pd_z
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; CHECK: vfnmadd213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfnmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfnmadd.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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define <16 x float> @test_x86_vfnmsubps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfnmsubps_z
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; CHECK: vfnmsub213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfnmsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfnmsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfnmsubpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfnmsubpd_z
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; CHECK: vfnmsub213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfnmsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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define <16 x float> @test_x86_vfmaddsubps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfmaddsubps_z
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; CHECK: vfmaddsub213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfmaddsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfmaddsubpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfmaddsubpd_z
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; CHECK: vfmaddsub213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfmaddsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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define <16 x float> @test_x86_vfmsubaddps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
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; CHECK-LABEL: test_x86_vfmsubaddps_z
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; CHECK: vfmsubadd213ps %zmm
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%res = call <16 x float> @llvm.x86.fma.vfmsubadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) nounwind
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.fma.vfmsubadd.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone
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define <8 x double> @test_x86_vfmsubaddpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {
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; CHECK-LABEL: test_x86_vfmsubaddpd_z
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; CHECK: vfmsubadd213pd %zmm
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%res = call <8 x double> @llvm.x86.fma.vfmsubadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) nounwind
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.fma.vfmsubadd.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone
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