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All callee-saved registers are live-out of a return block.

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llvm-svn: 83223
This commit is contained in:
David Goodwin 2009-10-01 23:28:47 +00:00
parent a4b73e486e
commit cb4a66977c
1 changed files with 21 additions and 18 deletions
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39
lib/CodeGen/PostRASchedulerList.cpp
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@ -313,8 +313,10 @@ void SchedulePostRATDList::StartBlock(MachineBasicBlock *BB) {
// Clear "do not change" set. // Clear "do not change" set.
KeepRegs.clear(); KeepRegs.clear();
bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn());
// Determine the live-out physregs for this block. // Determine the live-out physregs for this block.
if (!BB->empty() && BB->back().getDesc().isReturn()) { if (IsReturnBlock) {
// In a return block, examine the function live-out regs. // In a return block, examine the function live-out regs.
for (MachineRegisterInfo::liveout_iterator I = MRI.liveout_begin(), for (MachineRegisterInfo::liveout_iterator I = MRI.liveout_begin(),
E = MRI.liveout_end(); I != E; ++I) { E = MRI.liveout_end(); I != E; ++I) {
@ -348,24 +350,25 @@ void SchedulePostRATDList::StartBlock(MachineBasicBlock *BB) {
DefIndices[AliasReg] = ~0u; DefIndices[AliasReg] = ~0u;
} }
} }
}
// Also mark as live-out any callee-saved registers that were not // Mark live-out callee-saved registers. In a return block this is
// saved in the prolog. // all callee-saved registers. In non-return this is any
const MachineFrameInfo *MFI = MF.getFrameInfo(); // callee-saved register that is not saved in the prolog.
BitVector Pristine = MFI->getPristineRegs(BB); const MachineFrameInfo *MFI = MF.getFrameInfo();
for (const unsigned *I = TRI->getCalleeSavedRegs(); *I; ++I) { BitVector Pristine = MFI->getPristineRegs(BB);
unsigned Reg = *I; for (const unsigned *I = TRI->getCalleeSavedRegs(); *I; ++I) {
if (!Pristine.test(Reg)) continue; unsigned Reg = *I;
Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); if (!IsReturnBlock && !Pristine.test(Reg)) continue;
KillIndices[Reg] = BB->size(); Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
DefIndices[Reg] = ~0u; KillIndices[Reg] = BB->size();
// Repeat, for all aliases. DefIndices[Reg] = ~0u;
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { // Repeat, for all aliases.
unsigned AliasReg = *Alias; for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
Classes[AliasReg] = reinterpret_cast<TargetRegisterClass *>(-1); unsigned AliasReg = *Alias;
KillIndices[AliasReg] = BB->size(); Classes[AliasReg] = reinterpret_cast<TargetRegisterClass *>(-1);
DefIndices[AliasReg] = ~0u; KillIndices[AliasReg] = BB->size();
} DefIndices[AliasReg] = ~0u;
} }
} }
} }