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Add XOP Intrinsics and tests
llvm-svn: 147949
This commit is contained in:
Jan Sjödin
parent
01bf090299
commit
cb98434ebe
@ -1959,6 +1959,535 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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[IntrNoMem]>;
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}
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//===----------------------------------------------------------------------===//
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// XOP
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def int_x86_xop_vpermil2pd : GCCBuiltin<"__builtin_ia32_vpermil2pd">,
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Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpermil2pd_256 :
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GCCBuiltin<"__builtin_ia32_vpermil2pd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty,
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llvm_v4f64_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpermil2ps : GCCBuiltin<"__builtin_ia32_vpermil2ps">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpermil2ps_256 :
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GCCBuiltin<"__builtin_ia32_vpermil2ps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty,
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llvm_v8f32_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vfrcz_pd :
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GCCBuiltin<"__builtin_ia32_vfrczpd">,
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Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_x86_xop_vfrcz_ps :
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GCCBuiltin<"__builtin_ia32_vfrczps">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
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def int_x86_xop_vfrcz_sd :
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GCCBuiltin<"__builtin_ia32_vfrczsd">,
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Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vfrcz_ss :
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GCCBuiltin<"__builtin_ia32_vfrczss">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vfrcz_pd_256 :
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GCCBuiltin<"__builtin_ia32_vfrczpd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty], [IntrNoMem]>;
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def int_x86_xop_vfrcz_ps_256 :
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GCCBuiltin<"__builtin_ia32_vfrczps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty], [IntrNoMem]>;
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def int_x86_xop_vpcmov :
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GCCBuiltin<"__builtin_ia32_vpcmov">,
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Intrinsic<[llvm_v2i64_ty],
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[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v2di :
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GCCBuiltin<"__builtin_ia32_vpcmov_v2di">,
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Intrinsic<[llvm_v2i64_ty],
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[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v4si :
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GCCBuiltin<"__builtin_ia32_vpcmov_v4si">,
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Intrinsic<[llvm_v4i32_ty],
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[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v8hi :
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GCCBuiltin<"__builtin_ia32_vpcmov_v8hi">,
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Intrinsic<[llvm_v8i16_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v16qi :
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GCCBuiltin<"__builtin_ia32_vpcmov_v16qi">,
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Intrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v2df :
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GCCBuiltin<"__builtin_ia32_vpcmov_v2df">,
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Intrinsic<[llvm_v2f64_ty],
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[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v4sf :
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GCCBuiltin<"__builtin_ia32_vpcmov_v4sf">,
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_256">,
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Intrinsic<[llvm_v4i64_ty],
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[llvm_v4i64_ty, llvm_v4i64_ty, llvm_v4i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v4di_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v4di256">,
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Intrinsic<[llvm_v4i64_ty],
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[llvm_v4i64_ty, llvm_v4i64_ty, llvm_v4i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v8si_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v8si256">,
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Intrinsic<[llvm_v8i32_ty],
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[llvm_v8i32_ty, llvm_v8i32_ty, llvm_v8i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v16hi_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v16hi256">,
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Intrinsic<[llvm_v16i16_ty],
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[llvm_v16i16_ty, llvm_v16i16_ty, llvm_v16i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v32qi_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v32qi256">,
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Intrinsic<[llvm_v32i8_ty],
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[llvm_v32i8_ty, llvm_v32i8_ty, llvm_v32i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v4df_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v4df256">,
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcmov_v8sf_256 :
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GCCBuiltin<"__builtin_ia32_vpcmov_v8sf256">,
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Intrinsic<[llvm_v8f32_ty],
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[llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomeqb :
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GCCBuiltin<"__builtin_ia32_vpcomeqb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomeqw :
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GCCBuiltin<"__builtin_ia32_vpcomeqw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomeqd :
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GCCBuiltin<"__builtin_ia32_vpcomeqd">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomeqq :
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GCCBuiltin<"__builtin_ia32_vpcomeqq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomequb :
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GCCBuiltin<"__builtin_ia32_vpcomequb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomequd :
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GCCBuiltin<"__builtin_ia32_vpcomequd">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomequq :
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GCCBuiltin<"__builtin_ia32_vpcomequq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomequw :
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GCCBuiltin<"__builtin_ia32_vpcomequw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseb :
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GCCBuiltin<"__builtin_ia32_vpcomfalseb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalsed :
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GCCBuiltin<"__builtin_ia32_vpcomfalsed">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseq :
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GCCBuiltin<"__builtin_ia32_vpcomfalseq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseub :
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GCCBuiltin<"__builtin_ia32_vpcomfalseub">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseud :
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GCCBuiltin<"__builtin_ia32_vpcomfalseud">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseuq :
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GCCBuiltin<"__builtin_ia32_vpcomfalseuq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalseuw :
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GCCBuiltin<"__builtin_ia32_vpcomfalseuw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomfalsew :
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GCCBuiltin<"__builtin_ia32_vpcomfalsew">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeb :
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GCCBuiltin<"__builtin_ia32_vpcomgeb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomged :
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GCCBuiltin<"__builtin_ia32_vpcomged">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeq :
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GCCBuiltin<"__builtin_ia32_vpcomgeq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeub :
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GCCBuiltin<"__builtin_ia32_vpcomgeub">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeud :
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GCCBuiltin<"__builtin_ia32_vpcomgeud">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeuq :
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GCCBuiltin<"__builtin_ia32_vpcomgeuq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgeuw :
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GCCBuiltin<"__builtin_ia32_vpcomgeuw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgew :
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GCCBuiltin<"__builtin_ia32_vpcomgew">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtb :
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GCCBuiltin<"__builtin_ia32_vpcomgtb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtd :
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GCCBuiltin<"__builtin_ia32_vpcomgtd">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtq :
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GCCBuiltin<"__builtin_ia32_vpcomgtq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtub :
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GCCBuiltin<"__builtin_ia32_vpcomgtub">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtud :
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GCCBuiltin<"__builtin_ia32_vpcomgtud">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtuq :
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GCCBuiltin<"__builtin_ia32_vpcomgtuq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtuw :
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GCCBuiltin<"__builtin_ia32_vpcomgtuw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomgtw :
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GCCBuiltin<"__builtin_ia32_vpcomgtw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleb :
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GCCBuiltin<"__builtin_ia32_vpcomleb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomled :
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GCCBuiltin<"__builtin_ia32_vpcomled">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleq :
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GCCBuiltin<"__builtin_ia32_vpcomleq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleub :
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GCCBuiltin<"__builtin_ia32_vpcomleub">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleud :
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GCCBuiltin<"__builtin_ia32_vpcomleud">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleuq :
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GCCBuiltin<"__builtin_ia32_vpcomleuq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomleuw :
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GCCBuiltin<"__builtin_ia32_vpcomleuw">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomlew :
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GCCBuiltin<"__builtin_ia32_vpcomlew">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltb :
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GCCBuiltin<"__builtin_ia32_vpcomltb">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltd :
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GCCBuiltin<"__builtin_ia32_vpcomltd">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltq :
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GCCBuiltin<"__builtin_ia32_vpcomltq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltub :
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GCCBuiltin<"__builtin_ia32_vpcomltub">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltud :
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GCCBuiltin<"__builtin_ia32_vpcomltud">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltuq :
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GCCBuiltin<"__builtin_ia32_vpcomltuq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_xop_vpcomltuw :
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GCCBuiltin<"__builtin_ia32_vpcomltuw">,
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||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomltw :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomltw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneb :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneb">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomned :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomned">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneq :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneub :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneub">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneud :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneud">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneuq :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneuq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomneuw :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomneuw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomnew :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomnew">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueb :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueb">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrued :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrued">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueq :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueub :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueub">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueud :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueud">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueuq :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueuq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtrueuw :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtrueuw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpcomtruew :
|
||||
GCCBuiltin<"__builtin_ia32_vpcomtruew">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vphaddbd :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddbd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddbq :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddbq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddbw :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddbw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphadddq :
|
||||
GCCBuiltin<"__builtin_ia32_vphadddq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddubd :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddubd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddubq :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddubq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddubw :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddubw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddudq :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddudq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphadduwd :
|
||||
GCCBuiltin<"__builtin_ia32_vphadduwd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphadduwq :
|
||||
GCCBuiltin<"__builtin_ia32_vphadduwq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddwd :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddwd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphaddwq :
|
||||
GCCBuiltin<"__builtin_ia32_vphaddwq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphsubbw :
|
||||
GCCBuiltin<"__builtin_ia32_vphsubbw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphsubdq :
|
||||
GCCBuiltin<"__builtin_ia32_vphsubdq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vphsubwd :
|
||||
GCCBuiltin<"__builtin_ia32_vphsubwd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
|
||||
def int_x86_xop_vpmacsdd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacsdd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacsdqh :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacsdqh">,
|
||||
Intrinsic<[llvm_v2i64_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacsdql :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacsdql">,
|
||||
Intrinsic<[llvm_v2i64_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacssdd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacssdd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacssdqh :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacssdqh">,
|
||||
Intrinsic<[llvm_v2i64_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacssdql :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacssdql">,
|
||||
Intrinsic<[llvm_v2i64_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacsswd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacsswd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacssww :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacssww">,
|
||||
Intrinsic<[llvm_v8i16_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacswd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacswd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmacsww :
|
||||
GCCBuiltin<"__builtin_ia32_vpmacsww">,
|
||||
Intrinsic<[llvm_v8i16_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmadcsswd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmadcsswd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpmadcswd :
|
||||
GCCBuiltin<"__builtin_ia32_vpmadcswd">,
|
||||
Intrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpperm :
|
||||
GCCBuiltin<"__builtin_ia32_vpperm">,
|
||||
Intrinsic<[llvm_v16i8_ty],
|
||||
[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vprotb :
|
||||
GCCBuiltin<"__builtin_ia32_vprotb">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vprotd :
|
||||
GCCBuiltin<"__builtin_ia32_vprotd">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vprotq :
|
||||
GCCBuiltin<"__builtin_ia32_vprotq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vprotw :
|
||||
GCCBuiltin<"__builtin_ia32_vprotw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshab :
|
||||
GCCBuiltin<"__builtin_ia32_vpshab">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshad :
|
||||
GCCBuiltin<"__builtin_ia32_vpshad">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshaq :
|
||||
GCCBuiltin<"__builtin_ia32_vpshaq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshaw :
|
||||
GCCBuiltin<"__builtin_ia32_vpshaw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshlb :
|
||||
GCCBuiltin<"__builtin_ia32_vpshlb">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshld :
|
||||
GCCBuiltin<"__builtin_ia32_vpshld">,
|
||||
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshlq :
|
||||
GCCBuiltin<"__builtin_ia32_vpshlq">,
|
||||
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_xop_vpshlw :
|
||||
GCCBuiltin<"__builtin_ia32_vpshlw">,
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
|
||||
[IntrNoMem]>;
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// MMX
|
||||
|
||||
|
||||
@ -1,89 +1,119 @@
|
||||
//====- X86InstrXOP.td - Describe the X86 Instruction Set --*- tablegen -*-===//
|
||||
//====- X86InstrXOP.td - Describe the X86 Instruction Set --*- tablegen -*-====//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//===-----------------------------------------------------------------------===//
|
||||
//
|
||||
// This file describes XOP (eXtended OPerations)
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//===-----------------------------------------------------------------------===//
|
||||
|
||||
multiclass xop2op<bits<8> opc, string OpcodeStr, X86MemOperand x86memop> {
|
||||
multiclass xop2op<bits<8> opc, string OpcodeStr, Intrinsic Int, PatFrag memop> {
|
||||
def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[]>, VEX;
|
||||
def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins x86memop:$src),
|
||||
[(set VR128:$dst, (Int VR128:$src))]>, VEX;
|
||||
def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[]>, VEX;
|
||||
[(set VR128:$dst, (Int (bitconvert (memop addr:$src))))]>, VEX;
|
||||
}
|
||||
|
||||
let isAsmParserOnly = 1 in {
|
||||
defm VPHSUBWD : xop2op<0xE2, "vphsubwd", f128mem>;
|
||||
defm VPHSUBDQ : xop2op<0xE3, "vphsubdq", f128mem>;
|
||||
defm VPHSUBBW : xop2op<0xE1, "vphsubbw", f128mem>;
|
||||
defm VPHADDWQ : xop2op<0xC7, "vphaddwq", f128mem>;
|
||||
defm VPHADDWD : xop2op<0xC6, "vphaddwd", f128mem>;
|
||||
defm VPHADDUWQ : xop2op<0xD7, "vphadduwq", f128mem>;
|
||||
defm VPHADDUWD : xop2op<0xD6, "vphadduwd", f128mem>;
|
||||
defm VPHADDUDQ : xop2op<0xDB, "vphaddudq", f128mem>;
|
||||
defm VPHADDUBW : xop2op<0xD1, "vphaddubw", f128mem>;
|
||||
defm VPHADDUBQ : xop2op<0xD3, "vphaddubq", f128mem>;
|
||||
defm VPHADDUBD : xop2op<0xD2, "vphaddubd", f128mem>;
|
||||
defm VPHADDDQ : xop2op<0xCB, "vphadddq", f128mem>;
|
||||
defm VPHADDBW : xop2op<0xC1, "vphaddbw", f128mem>;
|
||||
defm VPHADDBQ : xop2op<0xC3, "vphaddbq", f128mem>;
|
||||
defm VPHADDBD : xop2op<0xC2, "vphaddbd", f128mem>;
|
||||
defm VFRCZSS : xop2op<0x82, "vfrczss", f32mem>;
|
||||
defm VFRCZSD : xop2op<0x83, "vfrczsd", f64mem>;
|
||||
defm VFRCZPS : xop2op<0x80, "vfrczps", f128mem>;
|
||||
defm VFRCZPD : xop2op<0x81, "vfrczpd", f128mem>;
|
||||
defm VPHSUBWD : xop2op<0xE2, "vphsubwd", int_x86_xop_vphsubwd, memopv2i64>;
|
||||
defm VPHSUBDQ : xop2op<0xE3, "vphsubdq", int_x86_xop_vphsubdq, memopv2i64>;
|
||||
defm VPHSUBBW : xop2op<0xE1, "vphsubbw", int_x86_xop_vphsubbw, memopv2i64>;
|
||||
defm VPHADDWQ : xop2op<0xC7, "vphaddwq", int_x86_xop_vphaddwq, memopv2i64>;
|
||||
defm VPHADDWD : xop2op<0xC6, "vphaddwd", int_x86_xop_vphaddwd, memopv2i64>;
|
||||
defm VPHADDUWQ : xop2op<0xD7, "vphadduwq", int_x86_xop_vphadduwq, memopv2i64>;
|
||||
defm VPHADDUWD : xop2op<0xD6, "vphadduwd", int_x86_xop_vphadduwd, memopv2i64>;
|
||||
defm VPHADDUDQ : xop2op<0xDB, "vphaddudq", int_x86_xop_vphaddudq, memopv2i64>;
|
||||
defm VPHADDUBW : xop2op<0xD1, "vphaddubw", int_x86_xop_vphaddubw, memopv2i64>;
|
||||
defm VPHADDUBQ : xop2op<0xD3, "vphaddubq", int_x86_xop_vphaddubq, memopv2i64>;
|
||||
defm VPHADDUBD : xop2op<0xD2, "vphaddubd", int_x86_xop_vphaddubd, memopv2i64>;
|
||||
defm VPHADDDQ : xop2op<0xCB, "vphadddq", int_x86_xop_vphadddq, memopv2i64>;
|
||||
defm VPHADDBW : xop2op<0xC1, "vphaddbw", int_x86_xop_vphaddbw, memopv2i64>;
|
||||
defm VPHADDBQ : xop2op<0xC3, "vphaddbq", int_x86_xop_vphaddbq, memopv2i64>;
|
||||
defm VPHADDBD : xop2op<0xC2, "vphaddbd", int_x86_xop_vphaddbd, memopv2i64>;
|
||||
defm VFRCZPS : xop2op<0x80, "vfrczps", int_x86_xop_vfrcz_ps, memopv4f32>;
|
||||
defm VFRCZPD : xop2op<0x81, "vfrczpd", int_x86_xop_vfrcz_pd, memopv2f64>;
|
||||
}
|
||||
|
||||
multiclass xop2op256<bits<8> opc, string OpcodeStr> {
|
||||
// Scalar load 2 addr operand instructions
|
||||
let Constraints = "$src1 = $dst" in {
|
||||
multiclass xop2opsld<bits<8> opc, string OpcodeStr, Intrinsic Int,
|
||||
Operand memop, ComplexPattern mem_cpat> {
|
||||
def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1,
|
||||
VR128:$src2),
|
||||
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
|
||||
[(set VR128:$dst, (Int VR128:$src1, VR128:$src2))]>, VEX;
|
||||
def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1,
|
||||
memop:$src2),
|
||||
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
|
||||
[(set VR128:$dst, (Int VR128:$src1,
|
||||
(bitconvert mem_cpat:$src2)))]>, VEX;
|
||||
}
|
||||
|
||||
} // Constraints = "$src1 = $dst"
|
||||
|
||||
let isAsmParserOnly = 1 in {
|
||||
defm VFRCZSS : xop2opsld<0x82, "vfrczss", int_x86_xop_vfrcz_ss,
|
||||
ssmem, sse_load_f32>;
|
||||
defm VFRCZSD : xop2opsld<0x83, "vfrczsd", int_x86_xop_vfrcz_sd,
|
||||
sdmem, sse_load_f64>;
|
||||
}
|
||||
|
||||
|
||||
multiclass xop2op256<bits<8> opc, string OpcodeStr, Intrinsic Int,
|
||||
PatFrag memop> {
|
||||
def rrY : IXOP<opc, MRMSrcReg, (outs VR256:$dst), (ins VR256:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[]>, VEX, VEX_L;
|
||||
[(set VR256:$dst, (Int VR256:$src))]>, VEX, VEX_L;
|
||||
def rmY : IXOP<opc, MRMSrcMem, (outs VR256:$dst), (ins f256mem:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[]>, VEX;
|
||||
[(set VR256:$dst, (Int (bitconvert (memop addr:$src))))]>, VEX;
|
||||
}
|
||||
|
||||
let isAsmParserOnly = 1 in {
|
||||
defm VFRCZPS : xop2op256<0x80, "vfrczps">;
|
||||
defm VFRCZPD : xop2op256<0x81, "vfrczpd">;
|
||||
defm VFRCZPS : xop2op256<0x80, "vfrczps", int_x86_xop_vfrcz_ps_256,
|
||||
memopv8f32>;
|
||||
defm VFRCZPD : xop2op256<0x81, "vfrczpd", int_x86_xop_vfrcz_pd_256,
|
||||
memopv4f64>;
|
||||
}
|
||||
|
||||
multiclass xop3op<bits<8> opc, string OpcodeStr> {
|
||||
multiclass xop3op<bits<8> opc, string OpcodeStr, Intrinsic Int> {
|
||||
def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst),
|
||||
(ins VR128:$src1, VR128:$src2),
|
||||
!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[]>, VEX_4VOp3;
|
||||
[(set VR128:$dst, (Int VR128:$src1, VR128:$src2))]>, VEX_4VOp3;
|
||||
def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
|
||||
(ins VR128:$src1, f128mem:$src2),
|
||||
!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[]>, VEX_4V, VEX_W;
|
||||
[(set VR128:$dst,
|
||||
(Int VR128:$src1, (bitconvert (memopv2i64 addr:$src2))))]>,
|
||||
VEX_4V, VEX_W;
|
||||
def mr : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
|
||||
(ins f128mem:$src1, VR128:$src2),
|
||||
!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[]>, VEX_4VOp3;
|
||||
[(set VR128:$dst,
|
||||
(Int (bitconvert (memopv2i64 addr:$src1)), VR128:$src2))]>,
|
||||
VEX_4VOp3;
|
||||
}
|
||||
|
||||
let isAsmParserOnly = 1 in {
|
||||
defm VPSHLW : xop3op<0x95, "vpshlw">;
|
||||
defm VPSHLQ : xop3op<0x97, "vpshlq">;
|
||||
defm VPSHLD : xop3op<0x96, "vpshld">;
|
||||
defm VPSHLB : xop3op<0x94, "vpshlb">;
|
||||
defm VPSHAW : xop3op<0x99, "vpshaw">;
|
||||
defm VPSHAQ : xop3op<0x9B, "vpshaq">;
|
||||
defm VPSHAD : xop3op<0x9A, "vpshad">;
|
||||
defm VPSHAB : xop3op<0x98, "vpshab">;
|
||||
defm VPROTW : xop3op<0x91, "vprotw">;
|
||||
defm VPROTQ : xop3op<0x93, "vprotq">;
|
||||
defm VPROTD : xop3op<0x92, "vprotd">;
|
||||
defm VPROTB : xop3op<0x90, "vprotb">;
|
||||
defm VPSHLW : xop3op<0x95, "vpshlw", int_x86_xop_vpshlw>;
|
||||
defm VPSHLQ : xop3op<0x97, "vpshlq", int_x86_xop_vpshlq>;
|
||||
defm VPSHLD : xop3op<0x96, "vpshld", int_x86_xop_vpshld>;
|
||||
defm VPSHLB : xop3op<0x94, "vpshlb", int_x86_xop_vpshlb>;
|
||||
defm VPSHAW : xop3op<0x99, "vpshaw", int_x86_xop_vpshaw>;
|
||||
defm VPSHAQ : xop3op<0x9B, "vpshaq", int_x86_xop_vpshaq>;
|
||||
defm VPSHAD : xop3op<0x9A, "vpshad", int_x86_xop_vpshad>;
|
||||
defm VPSHAB : xop3op<0x98, "vpshab", int_x86_xop_vpshab>;
|
||||
defm VPROTW : xop3op<0x91, "vprotw", int_x86_xop_vprotw>;
|
||||
defm VPROTQ : xop3op<0x93, "vprotq", int_x86_xop_vprotq>;
|
||||
defm VPROTD : xop3op<0x92, "vprotd", int_x86_xop_vprotd>;
|
||||
defm VPROTB : xop3op<0x90, "vprotb", int_x86_xop_vprotb>;
|
||||
}
|
||||
|
||||
multiclass xop3opimm<bits<8> opc, string OpcodeStr> {
|
||||
@ -105,32 +135,35 @@ let isAsmParserOnly = 1 in {
|
||||
}
|
||||
|
||||
// Instruction where second source can be memory, but third must be register
|
||||
multiclass xop4opm2<bits<8> opc, string OpcodeStr> {
|
||||
multiclass xop4opm2<bits<8> opc, string OpcodeStr, Intrinsic Int> {
|
||||
def rr : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
|
||||
(ins VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
|
||||
[]>, VEX_4V, VEX_I8IMM;
|
||||
[(set VR128:$dst,
|
||||
(Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_4V, VEX_I8IMM;
|
||||
def rm : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
|
||||
(ins VR128:$src1, f128mem:$src2, VR128:$src3),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
|
||||
[]>, VEX_4V, VEX_I8IMM;
|
||||
[(set VR128:$dst,
|
||||
(Int VR128:$src1, (bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3))]>, VEX_4V, VEX_I8IMM;
|
||||
}
|
||||
|
||||
let isAsmParserOnly = 1 in {
|
||||
defm VPMADCSWD : xop4opm2<0xB6, "vpmadcswd">;
|
||||
defm VPMADCSSWD : xop4opm2<0xA6, "vpmadcsswd">;
|
||||
defm VPMACSWW : xop4opm2<0x95, "vpmacsww">;
|
||||
defm VPMACSWD : xop4opm2<0x96, "vpmacswd">;
|
||||
defm VPMACSSWW : xop4opm2<0x85, "vpmacssww">;
|
||||
defm VPMACSSWD : xop4opm2<0x86, "vpmacsswd">;
|
||||
defm VPMACSSDQL : xop4opm2<0x87, "vpmacssdql">;
|
||||
defm VPMACSSDQH : xop4opm2<0x8F, "vpmacssdqh">;
|
||||
defm VPMACSSDD : xop4opm2<0x8E, "vpmacssdd">;
|
||||
defm VPMACSDQL : xop4opm2<0x97, "vpmacsdql">;
|
||||
defm VPMACSDQH : xop4opm2<0x9F, "vpmacsdqh">;
|
||||
defm VPMACSDD : xop4opm2<0x9E, "vpmacsdd">;
|
||||
defm VPMADCSWD : xop4opm2<0xB6, "vpmadcswd", int_x86_xop_vpmadcswd>;
|
||||
defm VPMADCSSWD : xop4opm2<0xA6, "vpmadcsswd", int_x86_xop_vpmadcsswd>;
|
||||
defm VPMACSWW : xop4opm2<0x95, "vpmacsww", int_x86_xop_vpmacsww>;
|
||||
defm VPMACSWD : xop4opm2<0x96, "vpmacswd", int_x86_xop_vpmacswd>;
|
||||
defm VPMACSSWW : xop4opm2<0x85, "vpmacssww", int_x86_xop_vpmacssww>;
|
||||
defm VPMACSSWD : xop4opm2<0x86, "vpmacsswd", int_x86_xop_vpmacsswd>;
|
||||
defm VPMACSSDQL : xop4opm2<0x87, "vpmacssdql", int_x86_xop_vpmacssdql>;
|
||||
defm VPMACSSDQH : xop4opm2<0x8F, "vpmacssdqh", int_x86_xop_vpmacssdqh>;
|
||||
defm VPMACSSDD : xop4opm2<0x8E, "vpmacssdd", int_x86_xop_vpmacssdd>;
|
||||
defm VPMACSDQL : xop4opm2<0x97, "vpmacsdql", int_x86_xop_vpmacsdql>;
|
||||
defm VPMACSDQH : xop4opm2<0x9F, "vpmacsdqh", int_x86_xop_vpmacsdqh>;
|
||||
defm VPMACSDD : xop4opm2<0x9E, "vpmacsdd", int_x86_xop_vpmacsdd>;
|
||||
}
|
||||
|
||||
// Instruction where second source can be memory, third must be imm8
|
||||
@ -204,38 +237,594 @@ let isAsmParserOnly = 1 in {
|
||||
defm VPCMOV : xop4op256<0xA2, "vpcmov">;
|
||||
}
|
||||
|
||||
multiclass xop5op<bits<8> opc, string OpcodeStr> {
|
||||
multiclass xop5op<bits<8> opc, string OpcodeStr, Intrinsic Int128,
|
||||
Intrinsic Int256, PatFrag ld_128, PatFrag ld_256> {
|
||||
def rr : IXOP5<opc, MRMSrcReg, (outs VR128:$dst),
|
||||
(ins VR128:$src1, VR128:$src2, VR128:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>;
|
||||
[(set VR128:$dst,
|
||||
(Int128 VR128:$src1, VR128:$src2, VR128:$src3, imm:$src4))]>;
|
||||
def rm : IXOP5<opc, MRMSrcMem, (outs VR128:$dst),
|
||||
(ins VR128:$src1, VR128:$src2, f128mem:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>, VEX_W, MemOp4;
|
||||
[(set VR128:$dst,
|
||||
(Int128 VR128:$src1, VR128:$src2, (ld_128 addr:$src3), imm:$src4))]>,
|
||||
VEX_W, MemOp4;
|
||||
def mr : IXOP5<opc, MRMSrcMem, (outs VR128:$dst),
|
||||
(ins VR128:$src1, f128mem:$src2, VR128:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>;
|
||||
[(set VR128:$dst,
|
||||
(Int128 VR128:$src1, (ld_128 addr:$src2), VR128:$src3, imm:$src4))]>;
|
||||
def rrY : IXOP5<opc, MRMSrcReg, (outs VR256:$dst),
|
||||
(ins VR256:$src1, VR256:$src2, VR256:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>;
|
||||
[(set VR256:$dst,
|
||||
(Int256 VR256:$src1, VR256:$src2, VR256:$src3, imm:$src4))]>;
|
||||
def rmY : IXOP5<opc, MRMSrcMem, (outs VR256:$dst),
|
||||
(ins VR256:$src1, VR256:$src2, f256mem:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>, VEX_W, MemOp4;
|
||||
[(set VR256:$dst,
|
||||
(Int256 VR256:$src1, VR256:$src2, (ld_256 addr:$src3), imm:$src4))]>,
|
||||
VEX_W, MemOp4;
|
||||
def mrY : IXOP5<opc, MRMSrcMem, (outs VR256:$dst),
|
||||
(ins VR256:$src1, f256mem:$src2, VR256:$src3, i8imm:$src4),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
|
||||
[]>;
|
||||
[(set VR256:$dst,
|
||||
(Int256 VR256:$src1, (ld_256 addr:$src2), VR256:$src3, imm:$src4))]>;
|
||||
}
|
||||
|
||||
defm VPERMIL2PD : xop5op<0x49, "vpermil2pd">;
|
||||
defm VPERMIL2PS : xop5op<0x48, "vpermil2ps">;
|
||||
defm VPERMIL2PD : xop5op<0x49, "vpermil2pd", int_x86_xop_vpermil2pd,
|
||||
int_x86_xop_vpermil2pd_256, memopv2f64, memopv4f64>;
|
||||
defm VPERMIL2PS : xop5op<0x48, "vpermil2ps", int_x86_xop_vpermil2ps,
|
||||
int_x86_xop_vpermil2ps_256, memopv4f32, memopv8f32>;
|
||||
|
||||
// XOP Intrinsics patterns
|
||||
|
||||
// VPCOM EQ
|
||||
def : Pat<(int_x86_xop_vpcomeqw VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomeqw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomequw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomequw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomequq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomequq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomequd VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomequd VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomequb VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomequb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomeqq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomeqq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomeqd VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomeqd VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomeqb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 4))>;
|
||||
def : Pat<(int_x86_xop_vpcomeqb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 4))>;
|
||||
|
||||
// VPCOM FALSE
|
||||
def : Pat<(int_x86_xop_vpcomfalsew VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalsew VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalsed VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalsed VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomfalseb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomfalseb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
// VPCOM GE
|
||||
def : Pat<(int_x86_xop_vpcomgew VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgew VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomged VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomged VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgeb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 3))>;
|
||||
def : Pat<(int_x86_xop_vpcomgeb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 3))>;
|
||||
|
||||
// VPCOM GT
|
||||
def : Pat<(int_x86_xop_vpcomgtw VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtd VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtd VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomgtb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 2))>;
|
||||
def : Pat<(int_x86_xop_vpcomgtb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 2))>;
|
||||
|
||||
// VPCOM LE
|
||||
def : Pat<(int_x86_xop_vpcomlew VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomlew VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomled VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomled VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomleb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 1))>;
|
||||
def : Pat<(int_x86_xop_vpcomleb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 1))>;
|
||||
|
||||
// VPCOM LT
|
||||
def : Pat<(int_x86_xop_vpcomltw VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltd VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltd VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomltb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 0))>;
|
||||
def : Pat<(int_x86_xop_vpcomltb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 0))>;
|
||||
|
||||
// VPCOM NE
|
||||
def : Pat<(int_x86_xop_vpcomnew VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomnew VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomned VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomned VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomneb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 5))>;
|
||||
def : Pat<(int_x86_xop_vpcomneb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 5))>;
|
||||
|
||||
// VPCOM TRUE
|
||||
def : Pat<(int_x86_xop_vpcomtruew VR128:$src1, VR128:$src2),
|
||||
(VPCOMWri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtruew VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMWmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueuw VR128:$src1, VR128:$src2),
|
||||
(VPCOMUWri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueuw VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUWmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueuq VR128:$src1, VR128:$src2),
|
||||
(VPCOMUQri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueuq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUQmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueud VR128:$src1, VR128:$src2),
|
||||
(VPCOMUDri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueud VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUDmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueub VR128:$src1, VR128:$src2),
|
||||
(VPCOMUBri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueub VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMUBmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueq VR128:$src1, VR128:$src2),
|
||||
(VPCOMQri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueq VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMQmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrued VR128:$src1, VR128:$src2),
|
||||
(VPCOMDri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrued VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMDmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
def : Pat<(int_x86_xop_vpcomtrueb VR128:$src1, VR128:$src2),
|
||||
(VPCOMBri VR128:$src1, VR128:$src2, (i8 6))>;
|
||||
def : Pat<(int_x86_xop_vpcomtrueb VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2))),
|
||||
(VPCOMBmi VR128:$src1, addr:$src2, (i8 6))>;
|
||||
|
||||
// VPPERM
|
||||
def : Pat<(int_x86_xop_vpperm VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPPERMrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpperm VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPPERMrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpperm VR128:$src1, (bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPPERMmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
|
||||
// VPCMOV
|
||||
def : Pat<(int_x86_xop_vpcmov VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov VR128:$src1, (bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv4i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_256 VR256:$src1,
|
||||
(bitconvert (memopv4i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
// VPCMOV di
|
||||
def : Pat<(int_x86_xop_vpcmov_v2di VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v2di VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v2di VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4di_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4di_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4di_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
// VPCMOV si
|
||||
def : Pat<(int_x86_xop_vpcmov_v4si VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4si VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4si VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8si_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8si_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8si_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
|
||||
// VPCMOV hi
|
||||
def : Pat<(int_x86_xop_vpcmov_v8hi VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8hi VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8hi VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v16hi_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v16hi_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v16hi_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
// VPCMOV qi
|
||||
def : Pat<(int_x86_xop_vpcmov_v16qi VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v16qi VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v16qi VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v32qi_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v32qi_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v32qi_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
// VPCMOV df
|
||||
def : Pat<(int_x86_xop_vpcmov_v2df VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v2df VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v2df VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4df_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4df_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4df_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
// VPCMOV sf
|
||||
def : Pat<(int_x86_xop_vpcmov_v4sf VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(VPCMOVrr VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4sf VR128:$src1, VR128:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrm VR128:$src1, VR128:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v4sf VR128:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR128:$src3),
|
||||
(VPCMOVmr VR128:$src1, addr:$src2, VR128:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8sf_256 VR256:$src1, VR256:$src2, VR256:$src3),
|
||||
(VPCMOVrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8sf_256 VR256:$src1, VR256:$src2,
|
||||
(bitconvert (memopv2i64 addr:$src3))),
|
||||
(VPCMOVrmY VR256:$src1, VR256:$src2, addr:$src3)>;
|
||||
def : Pat<(int_x86_xop_vpcmov_v8sf_256 VR256:$src1,
|
||||
(bitconvert (memopv2i64 addr:$src2)),
|
||||
VR256:$src3),
|
||||
(VPCMOVmrY VR256:$src1, addr:$src2, VR256:$src3)>;
|
||||
|
||||
|
||||
1059
test/CodeGen/X86/xop-intrinsics-x86_64.ll
Normal file
1059
test/CodeGen/X86/xop-intrinsics-x86_64.ll
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user