mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
[AArch64] Fix -Wimplicit-fallthrough warnings. NFCI.
llvm-svn: 307393
This commit is contained in:
parent
7b53bd9054
commit
cbc9dfc291
@ -167,6 +167,7 @@ bool AArch64CondBrTuning::tryToTuneBranch(MachineInstr &MI,
|
||||
case AArch64::SUBWrs:
|
||||
case AArch64::SUBWrx:
|
||||
IsFlagSetting = false;
|
||||
LLVM_FALLTHROUGH;
|
||||
case AArch64::ADDSWri:
|
||||
case AArch64::ADDSWrr:
|
||||
case AArch64::ADDSWrs:
|
||||
@ -226,6 +227,7 @@ bool AArch64CondBrTuning::tryToTuneBranch(MachineInstr &MI,
|
||||
case AArch64::SUBXrs:
|
||||
case AArch64::SUBXrx:
|
||||
IsFlagSetting = false;
|
||||
LLVM_FALLTHROUGH;
|
||||
case AArch64::ADDSXri:
|
||||
case AArch64::ADDSXrr:
|
||||
case AArch64::ADDSXrs:
|
||||
|
@ -2114,7 +2114,7 @@ bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr,
|
||||
|
||||
switch (VT.SimpleTy) {
|
||||
default: llvm_unreachable("Unexpected value type.");
|
||||
case MVT::i1: VTIsi1 = true;
|
||||
case MVT::i1: VTIsi1 = true; LLVM_FALLTHROUGH;
|
||||
case MVT::i8: Opc = OpcTable[Idx][0]; break;
|
||||
case MVT::i16: Opc = OpcTable[Idx][1]; break;
|
||||
case MVT::i32: Opc = OpcTable[Idx][2]; break;
|
||||
|
@ -1282,6 +1282,7 @@ static UsedNZCV getUsedNZCV(AArch64CC::CondCode CC) {
|
||||
case AArch64CC::HI: // Z clear and C set
|
||||
case AArch64CC::LS: // Z set or C clear
|
||||
UsedFlags.Z = true;
|
||||
LLVM_FALLTHROUGH;
|
||||
case AArch64CC::HS: // C set
|
||||
case AArch64CC::LO: // C clear
|
||||
UsedFlags.C = true;
|
||||
@ -1300,6 +1301,7 @@ static UsedNZCV getUsedNZCV(AArch64CC::CondCode CC) {
|
||||
case AArch64CC::GT: // Z clear, N and V the same
|
||||
case AArch64CC::LE: // Z set, N and V differ
|
||||
UsedFlags.Z = true;
|
||||
LLVM_FALLTHROUGH;
|
||||
case AArch64CC::GE: // N and V the same
|
||||
case AArch64CC::LT: // N and V differ
|
||||
UsedFlags.N = true;
|
||||
|
@ -163,6 +163,7 @@ AArch64RedundantCopyElimination::knownRegValInBlock(
|
||||
case AArch64::ADDSWri:
|
||||
case AArch64::ADDSXri:
|
||||
IsCMN = true;
|
||||
LLVM_FALLTHROUGH;
|
||||
// CMP is an alias for SUBS with a dead destination register.
|
||||
case AArch64::SUBSWri:
|
||||
case AArch64::SUBSXri: {
|
||||
|
Loading…
Reference in New Issue
Block a user