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[PATCH] [mips] Fix forbidden slot hazard handling
MipsHazardSchedule has to determine what the next physical machine instruction is to decide whether to insert a nop. In case where a branch with a forbidden slot appears at the end of a basic block, first *real* instruction of the next physical basic block was determined using getFirstNonDebugInstr(). Unfortunately this only considers DBG_VALUEs and not other transient opcodes such as EHLABEL. As EHLABEL passes the SafeInForbiddenSlot predicate and the instruction after the EHLABEL can be a CTI, we observed test failures in the LNT testsuite. Reviewers: dsanders Differential Review: http://reviews.llvm.org/D19051 llvm-svn: 268052
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@ -91,6 +91,14 @@ FunctionPass *llvm::createMipsHazardSchedule() {
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return new MipsHazardSchedule();
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}
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// Find the next real instruction from the current position.
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static Iter getNextMachineInstr(Iter Position) {
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Iter I = Position, E = Position->getParent()->end();
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I = std::find_if_not(I, E, [](const Iter &Insn) { return Insn->isTransient(); });
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assert(I != E);
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return I;
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}
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bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
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const MipsSubtarget *STI =
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@ -113,14 +121,14 @@ bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
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bool InsertNop = false;
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// Next instruction in the basic block.
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if (std::next(I) != FI->end() &&
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!TII->SafeInForbiddenSlot(*std::next(I))) {
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!TII->SafeInForbiddenSlot(*getNextMachineInstr(std::next(I)))) {
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InsertNop = true;
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} else {
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// Next instruction in the physical successor basic block.
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for (auto *Succ : FI->successors()) {
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if (FI->isLayoutSuccessor(Succ) &&
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Succ->getFirstNonDebugInstr() != Succ->end() &&
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!TII->SafeInForbiddenSlot(*Succ->getFirstNonDebugInstr())) {
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getNextMachineInstr(Succ->begin()) != Succ->end() &&
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!TII->SafeInForbiddenSlot(*getNextMachineInstr(Succ->begin()))) {
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InsertNop = true;
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break;
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}
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