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[X86][SSE] Regenerate vector load-trunc test

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llvm-svn: 283881
This commit is contained in:
Simon Pilgrim 2016-10-11 13:55:49 +00:00
parent e5236e5c4f
commit cc850df16d
1 changed files with 20 additions and 1 deletions
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21
test/CodeGen/X86/vec-trunc-store.ll
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@ -1,6 +1,18 @@
; RUN: llc < %s -march=x86-64
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
define void @foo(<8 x i32>* %p) nounwind {
; CHECK-LABEL: foo:
; CHECK: # BB#0:
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: movdqa 16(%rdi), %xmm1
; CHECK-NEXT: pslld $16, %xmm1
; CHECK-NEXT: psrad $16, %xmm1
; CHECK-NEXT: pslld $16, %xmm0
; CHECK-NEXT: psrad $16, %xmm0
; CHECK-NEXT: packssdw %xmm1, %xmm0
; CHECK-NEXT: movdqa %xmm0, (%rax)
; CHECK-NEXT: retq
%t = load <8 x i32>, <8 x i32>* %p
%cti69 = trunc <8 x i32> %t to <8 x i16> ; <<8 x i16>> [#uses=1]
store <8 x i16> %cti69, <8 x i16>* undef
@ -8,6 +20,13 @@ define void @foo(<8 x i32>* %p) nounwind {
}
define void @bar(<4 x i32>* %p) nounwind {
; CHECK-LABEL: bar:
; CHECK: # BB#0:
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-NEXT: movq %xmm0, (%rax)
; CHECK-NEXT: retq
%t = load <4 x i32>, <4 x i32>* %p
%cti44 = trunc <4 x i32> %t to <4 x i16> ; <<4 x i16>> [#uses=1]
store <4 x i16> %cti44, <4 x i16>* undef