From ccb6e4cddf6bc9851056ce2ae05fbeef2a973aab Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 3 May 2020 23:53:08 -0700 Subject: [PATCH] [X86] Simplify some code in combineTruncatedArithmetic. NFC We haven't promoted AND/OR/XOR to vXi64 types for a while. So there's no reason to use isOperationLegalOrPromote. So we can just use isOperationLegal by merging with ADD handling. --- lib/Target/X86/X86ISelLowering.cpp | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index ae279e2a469..946c634ac27 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -43347,17 +43347,6 @@ static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG, // of one truncation. // i.e. if one of the inputs will constant fold or the input is repeated. switch (SrcOpcode) { - case ISD::AND: - case ISD::XOR: - case ISD::OR: { - SDValue Op0 = Src.getOperand(0); - SDValue Op1 = Src.getOperand(1); - if (TLI.isOperationLegalOrPromote(SrcOpcode, VT) && - (Op0 == Op1 || IsFreeTruncation(Op0) || IsFreeTruncation(Op1))) - return TruncateArithmetic(Op0, Op1); - break; - } - case ISD::MUL: // X86 is rubbish at scalar and vector i64 multiplies (until AVX512DQ) - its // better to truncate if we have the chance. @@ -43366,6 +43355,9 @@ static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG, !TLI.isOperationLegal(SrcOpcode, SrcVT)) return TruncateArithmetic(Src.getOperand(0), Src.getOperand(1)); LLVM_FALLTHROUGH; + case ISD::AND: + case ISD::XOR: + case ISD::OR: case ISD::ADD: { SDValue Op0 = Src.getOperand(0); SDValue Op1 = Src.getOperand(1);