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[AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions
This does not affect codegen but might benefit llvm-mca.
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cdf3a5cb61
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@ -124,6 +124,8 @@ class MTBUF_Real <MTBUF_Pseudo ps> :
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let SchedRW = ps.SchedRW;
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let SchedRW = ps.SchedRW;
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let mayLoad = ps.mayLoad;
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let mayLoad = ps.mayLoad;
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let mayStore = ps.mayStore;
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let mayStore = ps.mayStore;
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let IsAtomicRet = ps.IsAtomicRet;
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let IsAtomicNoRet = ps.IsAtomicNoRet;
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bits<12> offset;
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bits<12> offset;
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bits<5> cpol;
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bits<5> cpol;
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@ -362,6 +364,8 @@ class MUBUF_Real <MUBUF_Pseudo ps> :
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let SchedRW = ps.SchedRW;
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let SchedRW = ps.SchedRW;
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let mayLoad = ps.mayLoad;
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let mayLoad = ps.mayLoad;
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let mayStore = ps.mayStore;
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let mayStore = ps.mayStore;
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let IsAtomicRet = ps.IsAtomicRet;
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let IsAtomicNoRet = ps.IsAtomicNoRet;
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bits<12> offset;
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bits<12> offset;
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bits<5> cpol;
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bits<5> cpol;
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@ -69,6 +69,8 @@ class DS_Real <DS_Pseudo ps> :
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let SchedRW = ps.SchedRW;
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let SchedRW = ps.SchedRW;
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let mayLoad = ps.mayLoad;
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let mayLoad = ps.mayLoad;
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let mayStore = ps.mayStore;
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let mayStore = ps.mayStore;
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let IsAtomicRet = ps.IsAtomicRet;
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let IsAtomicNoRet = ps.IsAtomicNoRet;
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// encoding fields
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// encoding fields
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bits<10> vdst;
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bits<10> vdst;
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@ -92,6 +92,8 @@ class FLAT_Real <bits<7> op, FLAT_Pseudo ps> :
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let SchedRW = ps.SchedRW;
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let SchedRW = ps.SchedRW;
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let mayLoad = ps.mayLoad;
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let mayLoad = ps.mayLoad;
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let mayStore = ps.mayStore;
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let mayStore = ps.mayStore;
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let IsAtomicRet = ps.IsAtomicRet;
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let IsAtomicNoRet = ps.IsAtomicNoRet;
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let VM_CNT = ps.VM_CNT;
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let VM_CNT = ps.VM_CNT;
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let LGKM_CNT = ps.LGKM_CNT;
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let LGKM_CNT = ps.LGKM_CNT;
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@ -66,6 +66,8 @@ class SM_Real <SM_Pseudo ps>
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let SchedRW = ps.SchedRW;
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let SchedRW = ps.SchedRW;
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let SubtargetPredicate = ps.SubtargetPredicate;
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let SubtargetPredicate = ps.SubtargetPredicate;
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let AsmMatchConverter = ps.AsmMatchConverter;
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let AsmMatchConverter = ps.AsmMatchConverter;
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let IsAtomicRet = ps.IsAtomicRet;
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let IsAtomicNoRet = ps.IsAtomicNoRet;
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let TSFlags = ps.TSFlags;
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let TSFlags = ps.TSFlags;
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