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https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
sink handling of target-independent machine instrs (other
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp file. This allows elimination of the NO_ASM_WRITER_BOILERPLATE hack among other things. llvm-svn: 95177
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@ -346,8 +346,25 @@ void AsmPrinter::EmitFunctionBody() {
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// FIXME: Clean up processDebugLoc.
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// FIXME: Clean up processDebugLoc.
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processDebugLoc(II, true);
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processDebugLoc(II, true);
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EmitInstruction(II);
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switch (II->getOpcode()) {
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case TargetInstrInfo::DBG_LABEL:
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case TargetInstrInfo::EH_LABEL:
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case TargetInstrInfo::GC_LABEL:
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printLabel(II);
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break;
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case TargetInstrInfo::INLINEASM:
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printInlineAsm(II);
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break;
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case TargetInstrInfo::IMPLICIT_DEF:
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printImplicitDef(II);
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break;
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case TargetInstrInfo::KILL:
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printKill(II);
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break;
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default:
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EmitInstruction(II);
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break;
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}
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if (VerboseAsm)
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if (VerboseAsm)
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EmitComments(*II);
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EmitComments(*II);
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O << '\n';
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O << '\n';
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@ -1154,20 +1154,6 @@ void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
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case ARM::t2MOVi32imm:
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case ARM::t2MOVi32imm:
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assert(0 && "Should be lowered by thumb2it pass");
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assert(0 && "Should be lowered by thumb2it pass");
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default: break;
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default: break;
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case TargetInstrInfo::DBG_LABEL:
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case TargetInstrInfo::EH_LABEL:
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case TargetInstrInfo::GC_LABEL:
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printLabel(MI);
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return;
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case TargetInstrInfo::KILL:
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printKill(MI);
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return;
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case TargetInstrInfo::INLINEASM:
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printInlineAsm(MI);
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return;
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case TargetInstrInfo::IMPLICIT_DEF:
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printImplicitDef(MI);
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return;
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case ARM::PICADD: { // FIXME: Remove asm string from td file.
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case ARM::PICADD: { // FIXME: Remove asm string from td file.
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// This is a pseudo op for a label + instruction sequence, which looks like:
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// This is a pseudo op for a label + instruction sequence, which looks like:
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// LPC0:
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// LPC0:
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@ -24,7 +24,6 @@ using namespace llvm;
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// Include the auto-generated portion of the assembly writer.
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// Include the auto-generated portion of the assembly writer.
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#define MachineInstr MCInst
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#define MachineInstr MCInst
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#define ARMAsmPrinter ARMInstPrinter // FIXME: REMOVE.
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#define ARMAsmPrinter ARMInstPrinter // FIXME: REMOVE.
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#define NO_ASM_WRITER_BOILERPLATE
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#include "ARMGenAsmWriter.inc"
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#include "ARMGenAsmWriter.inc"
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#undef MachineInstr
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#undef MachineInstr
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#undef ARMAsmPrinter
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#undef ARMAsmPrinter
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@ -181,27 +181,8 @@ bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
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MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
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switch (MI->getOpcode()) {
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case TargetInstrInfo::DBG_LABEL:
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case TargetInstrInfo::EH_LABEL:
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case TargetInstrInfo::GC_LABEL:
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printLabel(MI);
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return;
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case TargetInstrInfo::KILL:
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printKill(MI);
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return;
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case TargetInstrInfo::INLINEASM:
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printInlineAsm(MI);
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return;
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case TargetInstrInfo::IMPLICIT_DEF:
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printImplicitDef(MI);
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return;
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default: break;
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}
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MCInst TmpInst;
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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MCInstLowering.Lower(MI, TmpInst);
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printMCInst(&TmpInst);
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printMCInst(&TmpInst);
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}
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}
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@ -25,7 +25,6 @@ using namespace llvm;
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// Include the auto-generated portion of the assembly writer.
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// Include the auto-generated portion of the assembly writer.
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#define MachineInstr MCInst
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#define MachineInstr MCInst
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#define NO_ASM_WRITER_BOILERPLATE
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#include "MSP430GenAsmWriter.inc"
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#include "MSP430GenAsmWriter.inc"
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#undef MachineInstr
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#undef MachineInstr
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@ -24,7 +24,6 @@ using namespace llvm;
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// Include the auto-generated portion of the assembly writer.
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// Include the auto-generated portion of the assembly writer.
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#define MachineInstr MCInst
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#define MachineInstr MCInst
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#define NO_ASM_WRITER_BOILERPLATE
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#include "X86GenAsmWriter.inc"
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#include "X86GenAsmWriter.inc"
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#undef MachineInstr
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#undef MachineInstr
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@ -24,7 +24,6 @@ using namespace llvm;
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// Include the auto-generated portion of the assembly writer.
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// Include the auto-generated portion of the assembly writer.
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#define MachineInstr MCInst
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#define MachineInstr MCInst
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#define NO_ASM_WRITER_BOILERPLATE
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#include "X86GenAsmWriter1.inc"
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#include "X86GenAsmWriter1.inc"
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#undef MachineInstr
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#undef MachineInstr
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@ -411,11 +411,6 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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X86MCInstLower MCInstLowering(OutContext, Mang, *this);
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X86MCInstLower MCInstLowering(OutContext, Mang, *this);
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switch (MI->getOpcode()) {
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switch (MI->getOpcode()) {
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case TargetInstrInfo::DBG_LABEL:
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case TargetInstrInfo::EH_LABEL:
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case TargetInstrInfo::GC_LABEL:
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printLabel(MI);
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return;
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case TargetInstrInfo::DEBUG_VALUE: {
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case TargetInstrInfo::DEBUG_VALUE: {
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// FIXME: if this is implemented for another target before it goes
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// FIXME: if this is implemented for another target before it goes
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// away completely, the common part should be moved into AsmPrinter.
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// away completely, the common part should be moved into AsmPrinter.
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@ -455,15 +450,6 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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printOperand(MI, NOps-2);
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printOperand(MI, NOps-2);
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return;
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return;
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}
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}
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case TargetInstrInfo::INLINEASM:
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printInlineAsm(MI);
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return;
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case TargetInstrInfo::IMPLICIT_DEF:
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printImplicitDef(MI);
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return;
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case TargetInstrInfo::KILL:
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printKill(MI);
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return;
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case X86::MOVPC32r: {
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case X86::MOVPC32r: {
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MCInst TmpInst;
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MCInst TmpInst;
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// This is a pseudo op for a two instruction sequence with a label, which
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// This is a pseudo op for a two instruction sequence with a label, which
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@ -692,24 +692,6 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
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StringTable.EmitString(O);
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StringTable.EmitString(O);
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O << ";\n\n";
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O << ";\n\n";
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O << "\n#ifndef NO_ASM_WRITER_BOILERPLATE\n";
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O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
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<< " printInlineAsm(MI);\n"
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<< " return;\n"
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<< " } else if (MI->isLabel()) {\n"
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<< " printLabel(MI);\n"
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<< " return;\n"
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<< " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n"
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<< " printImplicitDef(MI);\n"
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<< " return;\n"
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<< " } else if (MI->getOpcode() == TargetInstrInfo::KILL) {\n"
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<< " printKill(MI);\n"
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<< " return;\n"
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<< " }\n\n";
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O << "\n#endif\n";
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O << " O << \"\\t\";\n\n";
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O << " O << \"\\t\";\n\n";
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O << " // Emit the opcode for the instruction.\n"
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O << " // Emit the opcode for the instruction.\n"
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