RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
Code Issues Projects Releases Wiki Activity

[AMDGPU] Shrinking V_SUBBREV_U32

Browse Source 
V_SUBBREV_U32 is a commute opcode for V_SUBB_U32. However, when
we try to commute V_SUBB_U32 in order to shrink it we do not then
process V_SUBBREV_U32 and it stay VOP3. This is fixed.

Differential Revision: https://reviews.llvm.org/D43699

llvm-svn: 326011
This commit is contained in:
Stanislav Mekhanoshin 2018-02-24 01:32:32 +00:00
parent 2d03f8789b
commit cd2f8e9283
3 changed files with 8 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/AMDGPU/SIShrinkInstructions.cpp
View File

@ -92,7 +92,8 @@ static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII,
case AMDGPU::V_ADDC_U32_e64:
case AMDGPU::V_SUBB_U32_e64:
if (TII->getNamedOperand(MI, AMDGPU::OpName::src1)->isImm())
case AMDGPU::V_SUBBREV_U32_e64:
if (!isVGPR(TII->getNamedOperand(MI, AMDGPU::OpName::src1), TRI, MRI))
return false;
// Additional verification is needed for sdst/src2.
return true;

8
test/CodeGen/AMDGPU/combine-cond-add-sub.ll
View File

@ -19,8 +19,8 @@ bb:
}
; GCN-LABEL: {{^}}sub1:
; GCN: v_cmp_gt_u32_e{{32|64}} [[CC:[^,]+]], v{{[0-9]+}}, v{{[0-9]+}}
; GCN: v_subb_u32_e{{32|64}} v{{[0-9]+}}, {{[^,]+}}, v{{[0-9]+}}, 0, [[CC]]
; GCN: v_cmp_gt_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
; GCN: v_subbrev_u32_e32 v{{[0-9]+}}, vcc, 0, v{{[0-9]+}}, vcc
; GCN-NOT: v_cndmask
define amdgpu_kernel void @sub1(i32 addrspace(1)* nocapture %arg) {
@ -134,8 +134,8 @@ bb:
}
; GCN-LABEL: {{^}}sext_flclass:
; GCN: v_cmp_class_f32_e{{32|64}} [[CC:[^,]+]],
; GCN: v_subb_u32_e{{32|64}} v{{[0-9]+}}, {{[^,]+}}, v{{[0-9]+}}, 0, [[CC]]
; GCN: v_cmp_class_f32_e32 vcc,
; GCN: v_subbrev_u32_e32 v{{[0-9]+}}, vcc, 0, v{{[0-9]+}}, vcc
; GCN-NOT: v_cndmask
define amdgpu_kernel void @sext_flclass(i32 addrspace(1)* nocapture %arg, float %x) {

4
test/CodeGen/AMDGPU/shrink-carry.mir
View File

@ -1,7 +1,7 @@
# RUN: llc -march=amdgcn -verify-machineinstrs -start-before si-shrink-instructions -stop-before si-insert-skips -o - %s | FileCheck -check-prefix=GCN %s
# GCN-LABEL: name: subbrev{{$}}
# GCN: V_SUBBREV_U32_e64 0, undef $vgpr0, killed $vcc, implicit $exec
# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
---
name: subbrev
@ -25,7 +25,7 @@ body: |
...
# GCN-LABEL: name: subb{{$}}
# GCN: V_SUBB_U32_e64 undef $vgpr0, 0, killed $vcc, implicit $exec
# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
---
name: subb